Texas Instruments TPS2061D, TPS2061DBV, TPS2061DGN, TPS2062D, TPS2062DGN Schematic [ru]

	TPS2061, TPS2062, TPS2063
	TPS2065, TPS2066, TPS2067
www.ti.com	SLVS490I –DECEMBER 2003–REVISED OCTOBER 2009

CURRENT-LIMITED, POWER-DISTRIBUTION SWITCHES

Check for Samples: TPS2061 TPS2062 TPS2063 TPS2065 TPS2066 TPS2067

FEATURES

APPLICATIONS

•

70-mΩ High-Side MOSFET

•

Heavy Capacitive Loads

•

1-A Continuous Current

•

Short-Circuit Protections

• Thermal and Short-Circuit Protection

TPS2061/TPS2065

TPS2062/TPS2066

•

Accurate Current Limit

D AND DGN PACKAGE

D AND DGN PACKAGE

(TOP VIEW)

(TOP VIEW)

(1.1 A min, 1.9 A max)

GND

OUT

1

8

GND

1

8

OC1

• Operating Range: 2.7 V to 5.5 V

IN

2

7

OUT

IN

2

7

OUT1

IN

3

6

OUT

†

3

6

OUT2

†

EN1 †

• 0.6-ms Typical Rise Time

EN

4

5

OC

4

5

OC2

EN2

•

Undervoltage Lockout

TPS2061/TPS2065

TPS2063/TPS2067

DBV PACKAGE

D PACKAGE

• Deglitched Fault Report (OC)

(TOP VIEW)

(TOP VIEW)

OUT

GND

• No OC Glitch During Power Up

IN

1

16

OC1

15

OUT1

GND

IN1

2

• 1-μA Maximum Standby Supply Current

†

14

OUT2

†

†

3

4

13

OC2

EN1

•

Bidirectional Switch

OC

EN

EN2

GND

5

12

OC3

• Ambient Temperature Range: -40°C to 85°C

IN2

6

11

OUT3

EN3

10

NC

†

7

9

NC

8

NC

• Built-in Soft-Start

† All Enable Inputs Are Active High For TPS2065, TPS2066, and TPS2067

• UL Listed - File No. E169910

DESCRIPTION

The TPS206x power-distribution switches are intended for applications where heavy capacitive loads and short-circuits are likely to be encountered. This device incorporates 70-mΩ N-channel MOSFET power switches for power-distribution systems that require multiple power switches in a single package. Each switch is controlled by a logic enable input. Gate drive is provided by an internal charge pump designed to control the power-switch rise times and fall times to minimize current surges during switching. The charge pump requires no external components and allows operation from supplies as low as 2.7 V.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PowerPAD is a trademark of Texas Instruments.

UNLESS OTHERWISE NOTED this	document	contains	Copyright © 2003–2009, Texas Instruments Incorporated
PRODUCTION DATA information current as of publication date.
Products conform to specifications per	the terms	of Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.

TPS2061, TPS2062, TPS2063

TPS2065, TPS2066, TPS2067

SLVS490I –DECEMBER 2003–REVISED OCTOBER 2009

www.ti.com

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

DESCRIPTION (CONTINUED)

When the output load exceeds the current-limit threshold or a short is present, the device limits the output current to a safe level by switching into a constant-current mode, pulling the overcurrent (OCx) logic output low. When continuous heavy overloads and short-circuits increase the power dissipation in the switch, causing the junction temperature to rise, a thermal protection circuit shuts off the switch to prevent damage. Recovery from a thermal shutdown is automatic once the device has cooled sufficiently. Internal circuitry ensures that the switch remains off until valid input voltage is present. This power-distribution switch is designed to set current limit at 1.5 A typically.

AVAILABLE OPTION AND ORDERING INFORMATION

			RECOMMEND	TYPICAL			PACKAGED
			ED	SHORT-			DEVICES (1)
	TA	ENABLE	MAXIMUM	CIRCUIT	NUMBER OF
			CONTINUOUS	CURRENT	SWITCHES	MSOP (DGN)	SOIC (D)	SOT23 (DBV) (2)
			LOAD	LIMIT
			CURRENT	AT 25°C
		Active low			Single	TPS2061DGN	TPS2061D	-
		Active high				TPS2065DGN	TPS2065D	-
		Active low			Dual	TPS2062DGN	TPS2062D	-
	-40°C to 85°C	Active high	1 A	1.5 A		TPS2066DGN	TPS2066D	-
		Active low			Triple	-	TPS2063D	-
		Active high				-	TPS2067D	-
		Active low			Single	-	-	TPS2061DBV
		Active high				-	-	TPS2065DBV

(1)The package is available taped and reeled. Add an R suffix to device types (e.g., TPS2062DR).

(2)The printed circuit board layout is important for control of temperature rise when operated at high ambient temperatures.

ORDERING INFORMATION

	T	SOIC(D) (1)	STATUS	MSOP (DGN) (1)	STATUS	SOT23 (DBV) (2)	STATUS
	A
		TPS2061DG4	Active	TPS2061DGNG4	Active	-	-
		TPS2062DG4	Active	TPS2062DGNG4	Active	-	-
	-40°C to 85°C	TPS2065DG4	Active	TPS2065DGNG4	Active	-	-
		TPS2066DG4	Active	TPS2066DGNG4	Active	-	-
		-	-	-	-	TPS2061DBV	Active
		-	-	-	-	TPS2065DBV	Active

(1)For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com.

(2)The printed circuit board layout is important for control of temperature rise when operated at high ambient temperatures.

2

Submit Documentation Feedback

Copyright © 2003–2009, Texas Instruments Incorporated

Product Folder Link(s): TPS2061 TPS2062 TPS2063 TPS2065 TPS2066 TPS2067

	TPS2061, TPS2062, TPS2063
	TPS2065, TPS2066, TPS2067
www.ti.com	SLVS490I –DECEMBER 2003–REVISED OCTOBER 2009

ABSOLUTE MAXIMUM RATINGS

over operating free-air temperature range unless otherwise noted(1)

											UNIT
	(2)										-0.3 V to 6 V
	Input voltage range, VI(IN)
	Output voltage range, V						(2), V				-0.3 V to 6 V
			O(OUT)				O(OUTx)
	Input voltage range, VI(EN)				, VI(EN), V				, VI(ENx)		-0.3 V to 6 V
								I(ENx)
	Voltage range, V		, V								-0.3 V to 6 V
		I(OC)		I(OCx)
	Continuous output current, IO(OUT), IO(OUTx)										Internally limited
	Continuous total power dissipation										See Dissipation Rating Table
	Operating virtual junction temperature range, TJ										-40°C to 150°C
	Electrostatic discharge (ESD) protection									Human body model	2 kV
										Charge device model (CDM)	500 V

(1)Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2)All voltages are with respect to GND.

DISSIPATING RATING TABLE

	PACKAGE	TA ≤ 25°C	DERATING FACTOR	TA = 70°C	TA = 85°C
		POWER RATING	ABOVE TA = 25°C	POWER RATING	POWER RATING
	D-8(1)	585.82 mW	5.8582 mW/°C	322.20 mW	234.32 mW
	DGN-8(2)	1712.3 mW	17.123 mW/°C	941.78 mW	684.33 mW
	D-16(1)	898.47 mW	8.9847 mW/°C	494.15 mW	359.38 mW
	DBV-5(3)	285 mW	2.85 mW/°C	155 mW	114 mW
		704 mW	7.04 mW/°C	387 mW	281 mW

(1)Power ratings are based on the low-k board (1 signal, 1 layer).

(2) Power ratings are based on the high-k board (2 signal, 2 plane) with PowerPAD™ vias to the internal ground plane.

(3)Lower ratings are for low-k printed circuit board layout (single -sided). Higher ratings are for enhanced high-k layout, (2 signal, 2 plane) with a 1mm2 copper pad on pin 2 and 2 vias to the ground plane.

RECOMMENDED OPERATING CONDITIONS

				MIN	MAX	UNIT
Input voltage, VI(IN)				2.7	5.5	V
Input voltage, VI(EN)	, VI(EN), V		, VI(ENx)	0	5.5	V
		I(ENx)
Continuous output current, IO(OUT), IO(OUTx)				0	1	A
Operating virtual junction temperature, TJ				-40	125	°C

ELECTRICAL CHARACTERISTICS

over recommended operating junction temperature range, VI(IN) = 5.5 V, IO = 1 A, VI(ENx) = 0 V, or VI(ENx) = 5.5 V (unless otherwise noted)

		PARAMETER		TEST CONDITIONS (1)	MIN TYP	MAX	UNIT
	POWER SWITCH
		Static drain-source on-state	VI(IN) = 5 V or 3.3 V, IO = 1 A, -40°C ≤ TJ ≤ 125°C				mΩ
		resistance, 5-V operation			70	135
	rDS(on)	and 3.3-V operation
		Static drain-source on-state	VI(IN) = 2.7 V, IO = 1 A, -40°C ≤ TJ ≤ 125°C				mΩ
		resistance, 2.7-V			75	150
		operation
	tr	Rise time, output	VI(IN) = 5.5 V		0.6	1.5
			VI(IN) = 2.7 V	CL = 1 μF, RL = 5 Ω, TJ = 25°C	0.4	1	ms
	tf	Fall time, output	VI(IN) = 5.5 V		0.05	0.5
			VI(IN) = 2.7 V		0.05	0.5

(1)Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account separately.

Copyright © 2003–2009, Texas Instruments Incorporated

Submit Documentation Feedback

3

Product Folder Link(s): TPS2061 TPS2062 TPS2063 TPS2065 TPS2066 TPS2067

TPS2061, TPS2062, TPS2063

TPS2065, TPS2066, TPS2067

SLVS490I –DECEMBER 2003–REVISED OCTOBER 2009 www.ti.com

ELECTRICAL CHARACTERISTICS (continued)

over recommended operating junction temperature range, VI(IN) = 5.5 V, IO = 1 A, VI(ENx) = 0 V, or VI(ENx) = 5.5 V (unless otherwise noted)

PARAMETER

TEST CONDITIONS (1)

MIN

TYP

MAX

UNIT

ENABLE INPUT

OR EN

EN

VIH

High-level input voltage

2.7 V ≤ VI(IN) ≤ 5.5 V

2

V

VIL

Low-level input voltage

2.7 V ≤ VI(IN) ≤ 5.5 V

0.8

II

Input current

V

= 0 V or 5.5 V, VI(ENx) = 0 V or 5.5 V

-0.5

0.5

μA

I(ENx)

ton

Turnon time

CL = 100 μF, RL = 5 Ω

3

ms

toff

Turnoff time

CL = 100 μF, RL = 5 Ω

10

CURRENT LIMIT

IOS

Short-circuit output current

VI(IN) = 5 V, OUT connected to GND,

TJ = 25°C

1.1

1.5

1.9

A

device enabled into short-circuit

-40°C ≤ TJ ≤ 125°C

1.1

1.5

2.1

TPS2061, TPS2062,

1.6

2.3

2.7

IOC_TRIP

Overcurrent trip threshold

VI(IN) = 5 V, current ramp (≤ 100 A/s) on OUT

TPS2065, TPS2066

A

TPS2063, TPS2067

1.6

2.4

3.0

SUPPLY CURRENT (TPS2061, TPS2065)

No load on OUT, V

= 5.5 V,

TJ = 25°C

0.5

1

Supply current, low-level output

I(ENx)

μA

or VI(ENx) = 0 V

-40°C ≤ TJ ≤ 125°C

0.5

5

No load on OUT, V

= 0 V,

TJ = 25°C

43

60

Supply current, high-level output

I(ENx)

μA

or VI(ENx) = 5.5 V

-40°C ≤ TJ ≤ 125°C

43

70

Leakage current

OUT connected to ground, VI(EN)

= 5.5 V,

-40°C ≤ TJ ≤ 125°C

1

μA

or VI(EN) = 0 V

Reverse leakage current

VI(OUTx) = 5.5 V, IN = ground

TJ = 25°C

0

μA

SUPPLY CURRENT (TPS2062, TPS2066)

No load on OUT, V

= 5.5 V,

TJ = 25°C

0.5

1

Supply current, low-level output

I(ENx)

μA

or VI(ENx) = 0 V

-40°C ≤ TJ ≤ 125°C

0.5

5

No load on OUT, V

= 0 V,

TJ = 25°C

50

70

Supply current, high-level output

I(ENx)

μA

or VI(ENx) = 5.5 V

-40°C ≤ TJ ≤ 125°C

50

90

Leakage current

OUT connected to ground, VI(/ENx) = 5.5 V,

-40°C ≤ TJ ≤ 125°C

1

μA

or VI(ENx) = 0 V

Reverse leakage current

VI(OUTx) = 5.5 V, IN = ground

TJ = 25°C

0.2

μA

SUPPLY CURRENT (TPS2063, TPS2067)

Supply current, low-level output

No load on OUT, V

= 0 V

TJ = 25°C

0.5

2

μA

I(ENx)

-40°C ≤ TJ ≤ 125°C

0.5

10

Supply current, high-level output

No load on OUT, V

= 5.5 V

TJ = 25°C

65

90

μA

I(ENx)

-40°C ≤ TJ ≤ 125°C

65

110

OUT connected to ground, V

= 5.5 V,

Leakage current

I(ENx)

-40°C ≤ TJ ≤ 125°C

1

μA

or VI(ENx) = 0 V

Reverse leakage current

VI(OUTx) = 5.5 V, INx = ground

TJ = 25°C

0.2

μA

UNDERVOLTAGE LOCKOUT

Low-level input voltage, IN

2

2.5

V

Hysteresis, IN

TJ = 25°C

75

mV

OVERCURRENT

and

OC1

OC2

Output low voltage, VOL(OCx)

IO(OCx)

= 5 mA

0.4

V

Off-state current

VO(OCx)

= 5 V or 3.3 V

1

μA

deglitch

assertion or deassertion

4

8

15

ms

OC

OCx

THERMAL SHUTDOWN(2)

Thermal shutdown threshold

135

°C

Recovery from thermal shutdown

125

°C

Hysteresis

10

°C

(2)The thermal shutdown only reacts under overcurrent conditions.

4	Submit Documentation Feedback	Copyright © 2003–2009, Texas Instruments Incorporated
	Product Folder Link(s): TPS2061 TPS2062 TPS2063 TPS2065 TPS2066 TPS2067

TPS2061, TPS2062, TPS2063

TPS2065, TPS2066, TPS2067

www.ti.com

SLVS490I –DECEMBER 2003–REVISED OCTOBER 2009

DEVICE INFORMATION

Pin Functions (TPS2061 and TPS2065)

					PINS
				D or DGN Package		DBV Package		I/O	DESCRIPTION
			NAME	TPS2061	TPS2065	TPS2061	TPS2065
				4	-	4	-	I	Enable input, logic low turns on power switch
	EN
	EN			-	4	-	4	I	Enable input, logic high turns on power switch
	GND			1	1	2	2		Ground
	IN			2, 3	2,3	5	5	I	Input voltage
				5	5	3	3	O	Overcurrent, open-drain output, active-low
	OC
	OUT			6, 7, 8	6, 7, 8	1	1	O	Power-switch output
									Internally connected to GND; used to heat-sink the part
	PowerPAD™			-	-	-	-		to the circuit board traces. Should be connected to GND
									pin.

Functional Block Diagram

			(See Note A)
	IN		CS
		Charge
		Pump
	EN	Driver	Current
			Limit
	(See Note B)
		UVLO
		Thermal	Deglitch
	GND	Sense

Note A: Current sense

Note B: Active low (EN) for TPS2061. Active high (EN) for TPS2065.

OUT

OC

Copyright © 2003–2009, Texas Instruments Incorporated	Submit Documentation Feedback	5
Product Folder Link(s): TPS2061 TPS2062 TPS2063 TPS2065 TPS2066 TPS2067

TPS2061, TPS2062, TPS2063

TPS2065, TPS2066, TPS2067

SLVS490I –DECEMBER 2003–REVISED OCTOBER 2009 www.ti.com

Pin Functions (TPS2062 and TPS2066)

						PINS		I/O		DESCRIPTION
	NAME					NO.
						TPS2062	TPS2066
						3	-	I		Enable input, logic low turns on power switch IN-OUT1
	EN1
						4	-	I		Enable input, logic low turns on power switch IN-OUT2
	EN2
	EN1					-	3	I		Enable input, logic high turns on power switch IN-OUT1
	EN2					-	4	I		Enable input, logic high turns on power switch IN-OUT2
	GND					1	1			Ground
	IN					2	2	I		Input voltage
						8	8	O		Overcurrent, open-drain output, active low, IN-OUT1
	OC1
						5	5	O		Overcurrent, open-drain output, active low, IN-OUT2
	OC2
	OUT1					7	7	O		Power-switch output, IN-OUT1
	OUT2					6	6	O		Power-switch output, IN-OUT2
	PowerPAD™					-	-			Internally connected to GND; used to heat-sink the part to the circuit board traces.
										Should be connected to GND pin.
									Functional Block Diagram

	GND	Thermal	Deglitch
		Sense
	EN1
	(See Note B)
		Driver	Current
			Limit
		Charge
		Pump	(See Note A)
			CS
		UVLO
			(See Note A)
	IN		CS
		Charge
		Pump
		Driver	Current
			Limit
	EN2

(See Note B)

Thermal	Deglitch
Sense

Note A: Current sense

Note B: Active low (ENx) for TPS2062. Active high (ENx) for TPS2066.

OC1

OUT1

OUT2

OC2

6

Submit Documentation Feedback

Copyright © 2003–2009, Texas Instruments Incorporated

Product Folder Link(s): TPS2061 TPS2062 TPS2063 TPS2065 TPS2066 TPS2067

								TPS2061, TPS2062, TPS2063
								TPS2065, TPS2066, TPS2067
www.ti.com								SLVS490I –DECEMBER 2003–REVISED OCTOBER 2009
							Pin Functions (TPS2063 and TPS2067)
					PINS		I/O	DESCRIPTION
	NAME				TPS2063	TPS2067
					3	–	I	Enable input, logic low turns on power switch IN1-OUT1
	EN1
					4	–	I	Enable input, logic low turns on power switch IN1-OUT2
	EN2
					7	–	I	Enable input, logic low turns on power switch IN2-OUT3
	EN3
	EN1				–	3	I	Enable input, logic high turns on power switch IN1-OUT1
	EN2				–	4	I	Enable input, logic high turns on power switch IN1-OUT2
	EN3				–	7	I	Enable input, logic high turns on power switch IN2-OUT3
	GND				1, 5	1, 5		Ground
	IN1				2	2	I	Input voltage for OUT1 and OUT2
	IN2				6	6	I	Input voltage for OUT3
	NC				8, 9, 10	8, 9, 10		No connection
					16	16	O	Overcurrent, open-drain output, active low, IN1-OUT1
	OC1
					13	13	O	Overcurrent, open-drain output, active low, IN1-OUT2
	OC2
					12	12	O	Overcurrent, open-drain output, active low, IN2-OUT3
	OC3
	OUT1				15	15	O	Power-switch output, IN1-OUT1
	OUT2				14	14	O	Power-switch output, IN1-OUT2
	OUT3				11	11	O	Power-switch output, IN2-OUT3

Copyright © 2003–2009, Texas Instruments Incorporated

Submit Documentation Feedback

7

Product Folder Link(s): TPS2061 TPS2062 TPS2063 TPS2065 TPS2066 TPS2067

TPS2061, TPS2062, TPS2063

TPS2065, TPS2066, TPS2067

SLVS490I –DECEMBER 2003–REVISED OCTOBER 2009

www.ti.com

	Functional Block Diagram
			OC1
GND	Thermal
	Sense		Deglitch
EN1
(See Note B)		Current
	Driver
		Limit
		(See Note A)
		CS	OUT1
	UVLO
		(See Note A)
IN1		CS	OUT2
	Driver	Current
		Limit
EN2			OC2
(See Note B)	Thermal		Deglitch
	Sense
VCC	Charge
	Pump
Selector
		(See Note A)
IN2		CS	OUT3
EN3	Driver	Current
		Limit
(See Note B)
	UVLO		OC3
GND	Thermal		Deglitch
	Sense

Note A: Current sense

Note B: Active low (ENx) for TPS2063; Active high (ENx) for TPS2067

8

Submit Documentation Feedback

Copyright © 2003–2009, Texas Instruments Incorporated

Product Folder Link(s): TPS2061 TPS2062 TPS2063 TPS2065 TPS2066 TPS2067

TPS2061, TPS2062, TPS2063

TPS2065, TPS2066, TPS2067

www.ti.com

SLVS490I –DECEMBER 2003–REVISED OCTOBER 2009

PARAMETER MEASUREMENT INFORMATION

OUT

tr

tf

RL

CL

VO(OUT)

90%

90%

10%

10%

TEST CIRCUIT

50%

V

50%

VI(EN)

50%

50%

I(EN)

ton

toff

ton

toff

VO(OUT)

90%

10%

VO(OUT)

90%

10%

VOLTAGE WAVEFORMS

Figure 1. Test Circuit and Voltage Waveforms

RL = 5 W,

V

CL = 1 mF

V

I(EN)

TA = 255C

I(EN)

5 V/div

5 V/div

			VO(OUT)	RL = 5 W,
			2 V/div	CL = 1 mF
V				TA = 255C
O(OUT)
2 V/div
				t − T ime − 500 ms/div
	t − T ime − 500 ms/div
Figure 2. Turnon Delay and Rise Time With 1-μF			Figure 3. Turnoff Delay and Fall Time With 1-μF
	Load			Load

Copyright © 2003–2009, Texas Instruments Incorporated

Submit Documentation Feedback

9

Product Folder Link(s): TPS2061 TPS2062 TPS2063 TPS2065 TPS2066 TPS2067

TPS2061, TPS2062, TPS2063

TPS2065, TPS2066, TPS2067

SLVS490I –DECEMBER 2003–REVISED OCTOBER 2009

www.ti.com

PARAMETER MEASUREMENT INFORMATION (continued)

	RL = 5 W,
VI(EN)	CL = 100 mF
	TA = 255C
5 V/div

VO(OUT)

2 V/div

t − T ime − 500 ms/div

Figure 4. Turnon Delay and Rise Time With 100-μF

Load

VI(EN)

5 V/div

IO(OUT)

500 mA/div

t − T ime − 500 ms/div

Figure 6. Short-Circuit Current,

Device Enabled Into Short

VI(EN)

5 V/div

VO(OUT)	RL = 5 W,
	CL = 100 mF
2 V/div	TA = 255C

t − T ime − 500 ms/div

Figure 5. Turnoff Delay and Fall Time With 100-μF

Load

	VIN = 5 V
VI(EN)	RL = 5 W,
	TA = 255C
5 V/div

220 mF

470 mF

IO(OUT)

100 mF

500 mA/div

t − T ime − 1 ms/div

Figure 7. Inrush Current With Different

Load Capacitance

10

Submit Documentation Feedback

Copyright © 2003–2009, Texas Instruments Incorporated

Product Folder Link(s): TPS2061 TPS2062 TPS2063 TPS2065 TPS2066 TPS2067

	TPS2061, TPS2062, TPS2063
	TPS2065, TPS2066, TPS2067
www.ti.com	SLVS490I –DECEMBER 2003–REVISED OCTOBER 2009

PARAMETER MEASUREMENT INFORMATION (continued)

				VO(OC)
	VO(OC)
				2 V/div
	2 V/div

	IO(OUT)	IO(OUT)
		1 A/div
	1 A/div

t − T ime − 2 ms/div	t − T ime − 2 ms/div
Figure 8. 2-Ω Load Connected to Enabled Device	Figure 9. 1-Ω Load Connected to Enabled Device

				TYPICAL CHARACTERISTICS
		TURNON TIME					TURNOFF TIME
			vs					vs
		INPUT VOLTAGE					INPUT VOLTAGE
	1.0	CL = 100 mF,				2
	0.9						CL = 100 mF,
		RL = 5 W,					RL = 5 W,
	0.8	TA = 255C				1.9	TA = 255C
	0.7
− ms	0.6				− mS	1.8
Time	0.5				Time
Turnon	0.4				Turnoff	1.7
	0.3
	0.2					1.6
	0.1
	0					1.5
	2	3	4	5	6	2	3	4	5	6
			VI − Input V oltage − V					VI − Input V oltage − V
			Figure 10.					Figure 11.

Copyright © 2003–2009, Texas Instruments Incorporated

Submit Documentation Feedback

11

Product Folder Link(s): TPS2061 TPS2062 TPS2063 TPS2065 TPS2066 TPS2067

TPS2061, TPS2062, TPS2063

TPS2065, TPS2066, TPS2067

SLVS490I –DECEMBER 2003–REVISED OCTOBER 2009

www.ti.com

TYPICAL CHARACTERISTICS (continued)

			RISE TIME
			vs
		INPUT VOLTAGE
	0.6	CL = 1 mF,				0.25
		RL = 5 W,
	0.5	TA = 255C				0.2
ms	0.4				ms
						0.15
−					−
Time	0.3				Time
Rise					Fall	0.1
	0.2
	0.1					0.05
	0	3	4	5	6	0
	2
			VI − Input V oltage − V

		FALL TIME
		vs
	INPUT VOLTAGE
	CL = 1 mF,
	RL = 5 W,
	TA = 255C
2	3	4	5	6
		VI − Input V oltage − V

Figure 12.	Figure 13.
TPS2061, TPS2065	TPS2062, TPS2066
SUPPLY CURRENT, OUTPUT ENABLED	SUPPLY CURRENT, OUTPUT ENABLED
vs	vs
JUNCTION TEMPERATURE	JUNCTION TEMPERATURE

μ A	60					70
			VI = 5.5 V		μ A
−	50				−	60
Enabled					Enabled
		VI = 5 V
	40					50
Output					Output
						40
	30
Current,					Current,
						30
	20			VI = 2.7 V
− Supply			VI = 3.3 V		− Supply
						20
	10
I (IN)					(IN)	10
I					I
					I
	0	0	50	100	150	0
	−50
		TJ − Junction T emperature − 5C
			Figure 14.

		VI = 5.5 V
		VI = 3.3 V	VI = 5 V
			VI = 2.7 V
−50	0	50	100	150
	TJ − Junction T emperature − 5C

Figure 15.

12

Submit Documentation Feedback

Copyright © 2003–2009, Texas Instruments Incorporated

Product Folder Link(s): TPS2061 TPS2062 TPS2063 TPS2065 TPS2066 TPS2067

	TPS2061, TPS2062, TPS2063
	TPS2065, TPS2066, TPS2067
www.ti.com	SLVS490I –DECEMBER 2003–REVISED OCTOBER 2009

TYPICAL CHARACTERISTICS (continued)

TPS2063, TPS2067	TPS2061, TPS2065
SUPPLY CURRENT, OUTPUT ENABLED	SUPPLY CURRENT, OUTPUT DISABLED
vs	vs
JUNCTION TEMPERATURE	JUNCTION TEMPERATURE

	90					0.5
A					A			VI = 5.5 V
− μ	80		VI = 5.5 V		μ	0.45
EnabledOutputCurrent,Supply	70				DisabledOutputCurrent,−	0.4		VI = 5 V
	60			VI = 5 V		0.35
			VI = 3.3 V
						0.3			VI = 3.3 V
	50							VI = 2.7 V
	40					0.25
				VI = 2.7 V		0.2
(IN)I	30				Supply−	0.15
	10
−	20					0.1
					I(IN)
I						0.05
	0				I
						0
	−50	0	50	100	150
						−50	0	50	100	150
		TJ − Junction T emperature − 5C
							TJ − Junction T emperature − 5C
			Figure 16.					Figure 17.
		TPS2062, TPS2066					TPS2063, TPS2067
	SUPPLY CURRENT, OUTPUT DISABLED					SUPPLY CURRENT, OUTPUT DISABLED
			vs					vs
		JUNCTION TEMPERATURE					JUNCTION TEMPERATURE
μ A	0.5				μ A	0.5
	0.45	VI = 5.5 V				0.45		VI = 5.5 V
−			VI = 5 V		−			VI = 5 V
Disabled	0.35				Disabled	0.35
	0.4					0.4
Output	0.3	VI = 2.7 V	VI = 3.3 V		Output	0.3	VI = 3.3 V		VI = 2.7 V
Current,	0.25				Current,	0.25
	0.2					0.2
Supply−					Supply−
	0.1					0.1
	0.15					0.15
(IN)	0.05				(IN)	0.05
I					I
I					I
	0					0
	−50	0	50	100	150	−50	0	50	100	150
		TJ − Junction T emperature − 5C					TJ − Junction T emperature − 5C
			Figure 18.					Figure 19.

Copyright © 2003–2009, Texas Instruments Incorporated

Submit Documentation Feedback

13

Product Folder Link(s): TPS2061 TPS2062 TPS2063 TPS2065 TPS2066 TPS2067