TEXAS INSTRUMENTS TPS2030, TPS2031, TPS2032, TPS2033, TPS2034 Technical data

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TPS2014		TPS2030, TPS2031, TPS2032, TPS2033, TPS2034
		POWER DISTRIBUTION SWITCHES
		SLVS190B − DECEMBER 1998 − REVISED MARCH 2004

D33-mΩ (5-V Input) High-Side MOSFET

Switch

DShort-Circuit and Thermal Protection

DOvercurrent Logic Output

DOperating Range . . . 2.7 V to 5.5 V

DLogic-Level Enable Input

DTypical Rise Time . . . 6.1 ms

DUndervoltage Lockout

DMaximum Standby Supply Current . . . 10 µA

DNo Drain-Source Back-Gate Diode

DAvailable in 8-pin SOIC and PDIP Packages

DAmbient Temperature Range, − 40 °C to 85°C

D2-kV Human-Body-Model, 200-V Machine-Model ESD Protection

DUL Listed − File No. E169910

D OR P PACKAGE

(TOP VIEW)

GND	1	8	OUT

IN	2	7	OUT
IN	3	6	OUT
EN	4	5	OC

description

The TPS203x family of power distribution switches is intended for applications where heavy capacitive loads and short circuits are likely to be encountered. These devices are 50-mΩ N-channel MOSFET high-side power switches. The switch is controlled by a logic enable compatible with 5-V logic and 3-V logic. Gate drive is provided by an internal charge pump designed to control the power-switch rise times and fall times to minimize current surges during switching. The charge pump requires no external components and allows operation from supplies as low as 2.7 V.

When the output load exceeds the current-limit threshold or a short is present, the TPS203x limits the output current to a safe level by switching into a constant-current mode, pulling the overcurrent (OC) logic output low. When continuous heavy overloads and short circuits increase the power dissipation in the switch, causing the junction temperature to rise, a thermal protection circuit shuts off the switch to prevent damage. Recovery from a thermal shutdown is automatic once the device has cooled sufficiently. Internal circuitry ensures the switch remains off until valid input voltage is present.

The TPS203x devices differ only in short-circuit current threshold. The TPS2030 limits at 0.3-A load, the TPS2031 at 0.9-A load, the TPS2032 at 1.5-A load, the TPS2033 at 2.2-A load, and the TPS2034 at 3-A load (see Available Options). The TPS203x is available in an 8-pin small-outline integrated-circuit (SOIC) package and in an 8-pin dual-in-line (DIP) package and operates over a junction temperature range of −40 °C to 125°C.

GENERAL SWITCH CATALOG

33 mΩ, single	TPS201xA	0.2 A − 2 A		80 mΩ, dual	TPS2042	500 mA	80 mΩ, triple		80 mΩ, quad
	TPS202x	0.2 A − 2 A			TPS2052	500 mA
	TPS203x	0.2 A − 2 A			TPS2046	250 mA
					TPS2056	250 mA
80 mΩ, single	TPS2014	600 mA		260 mΩ	TPS2100/1
	TPS2015	1 A	IN1		IN1	500 mA	TPS2043	500 mA	TPS2044	500 mA
	TPS2041	500 mA	IN1		IN2	10 mA	TPS2043	500 mA	TPS2044	500 mA
	TPS2041	500 mA	IN2	OUT	IN2	10 mA	TPS2053	500 mA	TPS2054	500 mA
	TPS2051	500 mA					TPS2053	500 mA	TPS2054	500 mA
					TPS2102/3/4/5		TPS2047	250 mA	TPS2048	250 mA

	TPS2045	250 mA		1.3 Ω
	TPS2045	250 mA		1.3 Ω	IN1	500 mA	TPS2057	250 mA	TPS2058	250 mA
	TPS2055	250 mA			IN2	100 mA
					IN2	100 mA

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.	Copyright 1999 − 2004 Texas Instruments Incorporated
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.

TI.COM

TPS2030, TPS2031, TPS2032, TPS2033, TPS2034

POWER DISTRIBUTION SWITCHES

SLVS190B − DECEMBER 1998 − REVISED MARCH 2004

AVAILABLE OPTIONS

		RECOMMENDED	TYPICAL SHORT-CIRCUIT	PACKAGED DEVICES
		MAXIMUM CONTINUOUS	TYPICAL SHORT-CIRCUIT
TA	ENABLE	MAXIMUM CONTINUOUS	CURRENT LIMIT AT 25°C	SMALL OUTLINE	PLASTIC DIP
TA	ENABLE	LOAD CURRENT	CURRENT LIMIT AT 25°C	SMALL OUTLINE	PLASTIC DIP
		LOAD CURRENT	(A)	(D)†	(P)
		(A)	(A)	(D)†	(P)
		(A)
		0.2	0.3	TPS2030D	TPS2030P

		0.6	0.9	TPS2031D	TPS2031P

−40 °C to 85°C	Active high	1	1.5	TPS2032D	TPS2032P
		1.5	2.2	TPS2033D	TPS2033P

		2	3	TPS2034D	TPS2034P

†The D package is available taped and reeled. Add an R suffix to device type (e.g., TPS2030DR)

TPS2030 functional block diagram

	Power Switch
		†
IN		CS	OUT
	Charge
	Pump
EN	Driver	Current
EN	Driver	Limit
		Limit
			OC
	UVLO
	Thermal
GND	Sense

†Current Sense

				Terminal Functions

	TERMINAL
			I/O	DESCRIPTION
NAME		NO.	I/O	DESCRIPTION
NAME		D OR P
		D OR P

EN		4	I	Enable input. Logic high turns on power switch.

GND		1	I	Ground

IN		2, 3	I	Input voltage

		5	O	Overcurrent. Logic output active low
OC		5	O	Overcurrent. Logic output active low

OUT		6, 7, 8	O	Power-switch output

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TPS2030, TPS2031, TPS2032, TPS2033, TPS2034

POWER DISTRIBUTION SWITCHES

SLVS190B − DECEMBER 1998 − REVISED MARCH 2004

detailed description

power switch

The power switch is an N-channel MOSFET with a maximum on-state resistance of 50 mΩ (VI(IN) = 5 V). Configured as a high-side switch, the power switch prevents current flow from OUT to IN and IN to OUT when

disabled.

charge pump

An internal charge pump supplies power to the driver circuit and provides the necessary voltage to pull the gate of the MOSFET above the source. The charge pump operates from input voltages as low as 2.7 V and requires very little supply current.

driver

The driver controls the gate voltage of the power switch. To limit large current surges and reduce the associated electromagnetic interference (EMI) produced, the driver incorporates circuitry that controls the rise times and fall times of the output voltage. The rise and fall times are typically in the 2-ms to 9-ms range.

enable (EN)

The logic enable disables the power switch, the bias for the charge pump, driver, and other circuitry to reduce the supply current to less than 10 µA when a logic low is present on EN . A logic high input on EN restores bias to the drive and control circuits and turns the power on. The enable input is compatible with both TTL and CMOS logic levels.

overcurrent (OC )

The OC open drain output is asserted (active low) when an overcurrent or overtemperature condition is encountered. The output will remain asserted until the overcurrent or overtemperature condition is removed.

current sense

A sense FET monitors the current supplied to the load. The sense FET measures current more efficiently than conventional resistance methods. When an overload or short circuit is encountered, the current-sense circuitry sends a control signal to the driver. The driver, in turn, reduces the gate voltage and drives the power FET into its saturation region, which switches the output into a constant current mode and holds the current constant while varying the voltage on the load.

thermal sense

An internal thermal-sense circuit shuts off the power switch when the junction temperature rises to approximately 140°C. Hysteresis is built into the thermal sense circuit. After the device has cooled approximately 20°C, the switch turns back on. The switch continues to cycle off and on until the fault is removed.

undervoltage lockout

A voltage sense circuit monitors the input voltage. When the input voltage is below approximately 2 V, a control signal turns off the power switch.

TI.COM

TPS2030, TPS2031, TPS2032, TPS2033, TPS2034

POWER DISTRIBUTION SWITCHES

SLVS190B − DECEMBER 1998 − REVISED MARCH 2004

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†

Input voltage range, VI(IN) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 6 V Output voltage range, VO(OUT) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to V I(IN) + 0.3 V Input voltage range,VI(EN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 6 V Continuous output current, IO(OUT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . internally limited Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table

Operating virtual junction temperature range, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40 °C to 125°C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65 °C to 150°C Lead temperature soldering 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . 260°C

Electrostatic discharge (ESD) protection: Human body model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 kV Machine model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200V Charged device model (CDM) . . . . . . . . . . . . . . . . . . . . . . . . . 750 V

†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTE 1: All voltages are with respect to GND.

DISSIPATION RATING TABLE

PACKAGE	TA ≤ 25°C	DERATING FACTOR	TA = 70°C	TA = 85°C
PACKAGE	POWER RATING	ABOVE TA = 25°C	POWER RATING	POWER RATING
	POWER RATING	ABOVE TA = 25°C	POWER RATING	POWER RATING
D	725 mW	5.8 mW/°C	464 mW	377 mW

P	1175 mW	9.4 mW/°C	752 mW	611 mW

recommended operating conditions

		MIN	MAX	UNIT

Input voltage	VI(IN)	2.7	5.5	V
Input voltage	VI(EN)	0	5.5	V
	VI(EN)	0	5.5	V
	TPS2030	0	0.2

	TPS2031	0	0.6

Continuous output current, IO	TPS2032	0	1	A
	TPS2033	0	1.5

	TPS2034	0	2

Operating virtual junction temperature, TJ		−40	125	°C

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TPS2030, TPS2031, TPS2032, TPS2033, TPS2034

POWER DISTRIBUTION SWITCHES

SLVS190B − DECEMBER 1998 − REVISED MARCH 2004

electrical characteristics over recommended operating junction temperature range, VI(IN)= 5.5 V, IO = rated current, EN = 5 V (unless otherwise noted)

power switch

	PARAMETER	TEST CONDITIONS†			MIN TYP	MAX	UNIT
		VI(IN) = 5 V,	TJ = 25°C,	IO = 1.8 A	33	36
		VI(IN) = 5 V,	TJ = 85°C,	IO = 1.8 A	38	46
		VI(IN) = 5 V,	TJ = 125°C,	IO = 1.8 A	44	50
		VI(IN) = 3.3 V,	TJ = 25°C,	IO = 1.8 A	37	41
		VI(IN) = 3.3 V,	TJ = 85°C,	IO = 1.8 A	43	52
rDS(on)	Static drain-source on-state resistance	VI(IN) = 3.3 V,	TJ = 125°C,	IO = 1.8 A	51	61	mΩ
rDS(on)	Static drain-source on-state resistance	VI(IN) = 5 V,	TJ = 25°C,	IO = 0.18 A	30	34	mΩ
		VI(IN) = 5 V,	TJ = 25°C,	IO = 0.18 A	30	34
		VI(IN) = 5 V,	TJ = 85°C,	IO = 0.18 A	35	41
		VI(IN) = 5 V,	TJ = 125°C,	IO = 0.18 A	39	47
		VI(IN) = 3.3 V,	TJ = 25°C,	IO = 0.18 A	33	37
		VI(IN) = 3.3 V,	TJ = 85°C,	IO = 0.18 A	39	46
		VI(IN) = 3.3 V,	TJ = 125°C,	IO = 0.18 A	44	56
		VI(IN) = 5.5 V,	TJ = 25°C,		6.1
		CL = 1 µF,	RL = 10 Ω		6.1
tr	Rise time, output	CL = 1 µF,	RL = 10 Ω				ms
tr	Rise time, output	VI(IN) = 2.7 V,	TJ = 25°C,		8.6		ms
		CL = 1 µF,	RL = 10 Ω		8.6
		CL = 1 µF,	RL = 10 Ω
		VI(IN) = 5.5 V,	TJ = 25°C,		3.4
		CL = 1 µF,	RL = 10 Ω		3.4
tf	Fall time, output	CL = 1 µF,	RL = 10 Ω				ms
tf	Fall time, output	VI(IN) = 2.7 V,	TJ = 25°C,		3		ms
		CL = 1 µF,	RL = 10 Ω		3
		CL = 1 µF,	RL = 10 Ω

†Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account separately.

enable input (EN)

	PARAMETER	TEST CONDITIONS		MIN TYP	MAX	UNIT

VIH	High-level input voltage	2.7 V ≤ VI(IN) ≤ 5.5 V		2		V
VIL	Low-level input voltage	4.5 V ≤ VI(IN) ≤ 5.5 V			0.8	V
		2.7 V ≤ VI(IN) ≤ 4.5 V			0.5

II	Input current	EN = 0 V or EN = VI(IN)		−0.5	0.5	µA
ton	Turnon time	CL = 100 µF,	RL = 10 Ω		20	ms
toff	Turnoff time	CL = 100 µF,	RL = 10 Ω		40

current limit

	PARAMETER	TEST CONDITIONS†		MIN	TYP	MAX	UNIT
			TPS2030	0.22	0.3	0.4

		TJ = 25°C, VI = 5.5 V,	TPS2031	0.66	0.9	1.1

			TPS2032	1.1	1.5	1.8
IOS	Short-circuit output current	OUT connected to GND,	TPS2032	1.1	1.5	1.8	A
		Device enable into short circuit	TPS2033	1.65	2.2	2.7
			TPS2033	1.65	2.2	2.7

			TPS2034	2.2	3	3.8

†Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account separately.

TI.COM

TPS2030, TPS2031, TPS2032, TPS2033, TPS2034

POWER DISTRIBUTION SWITCHES

SLVS190B − DECEMBER 1998 − REVISED MARCH 2004

electrical characteristics over recommended operating junction temperature range, VI(IN)= 5.5 V, IO = rated current, EN = 5 V (unless otherwise noted) (continued)

supply current

PARAMETER	TEST CONDITIONS				MIN TYP	MAX	UNIT

Supply current, low-level output	No Load on OUT	EN = 0	TJ = 25°C		0.3	1	A
			−40	°C ≤ TJ ≤ 125°C		10


Supply current, high-level output	No Load on OUT	EN = VI(IN)	TJ = 25°C		58	75	A
			−40	°C ≤ TJ ≤ 125°C	75	100

Leakage current	OUT connected to ground	EN = 0	−40 °C ≤ TJ ≤ 125°C		10		A

undervoltage lockout

PARAMETER	TEST CONDITIONS	MIN	TYP	MAX	UNIT

Low-level input voltage		2		2.5	V

Hysteresis	TJ = 25°C		100		mV

overcurrent (OC)

PARAMETER	TEST CONDITIONS		MIN TYP MAX	UNIT

Output low voltage	IO = 10 mA,
Output low voltage	IO = 10 mA,	VOL(OC)	0.4	V
Off-state current†	V = 5 V,	V = 3.3 V	1	A
	O	O

†Specified by design, not production tested.

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TPS2030, TPS2031, TPS2032, TPS2033, TPS2034

POWER DISTRIBUTION SWITCHES

SLVS190B − DECEMBER 1998 − REVISED MARCH 2004

PARAMETER MEASUREMENT INFORMATION

OUT										tr				tf
OUT	RL	CL



								VO(OUT)
												90%	90%
												90%	90%
TEST CIRCUIT											10%		10%
											10%		10%


	VI(EN)				50%	50%
					50%	50%

			ton						toff
			ton						toff

	VO(OUT)						90%
						10%
						10%
				VOLTAGE WAVEFORMS
	Figure 1. Test Circuit and Voltage Waveforms
		Table of Timing Diagrams

															FIGURE

Turnon Delay and Rise TIme															2

Turnoff Delay and Fall Time															3

Turnon Delay and Rise TIme with 1-µF Load															4

Turnoff Delay and Rise TIme with 1-µF Load															5
Device Enabled Into Short															6

TPS2030, TPS2031, TPS2032, TPS2033, and TPS2034, Ramped Load on Enabled Device															7, 8, 9, 10,
															11
															11

TPS2034, Inrush Current															12

7.9-Ω Load Connected to an Enabled TPS2030 Device															13
3.7-Ω Load Connected to an Enabled TPS2030 Device															14

3.7-Ω Load Connected to an Enabled TPS2031 Device															15

2.6-Ω Load Connected to an Enabled TPS2031 Device															16

2.6-Ω Load Connected to an Enabled TPS2032 Device															17

1.2-Ω Load Connected to an Enabled TPS2032 Device															18

1.2-Ω Load Connected to an Enabled TPS2033 Device															19

0.9-Ω Load Connected to an Enabled TPS2033 Device															20

0.9-Ω Load Connected to an Enabled TPS2034 Device															21
0.5-Ω Load Connected to an Enabled TPS2034 Device															22

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TPS2030, TPS2031, TPS2032, TPS2033, TPS2034

POWER DISTRIBUTION SWITCHES

SLVS190B − DECEMBER 1998 − REVISED MARCH 2004

PARAMETER MEASUREMENT INFORMATION

			VI(EN) (5 V/div)
VI(EN)
						VO(OUT) (2 V/div)
								VIN = 5 V
V								RL = 27 Ω
O(OUT)								TA = 25°C
								TA = 25°C
0	2	4	6	8	10	12	14	16	18	20
				t − Time − ms

Figure 2. Turnon Delay and Rise Time

				VI(EN) (5 V/div)
VI(EN)
					VO(OUT) (2 V/div)
								VI(IN) = 5 V
								CL = 1 µF
VO(OUT)								RL = 27 Ω
								TA = 25°C
0	2	4	6	8	10	12	14	16	18	20
				t − Time − ms

Figure 4. Turnon Delay and Rise Time

With 1- F Load

			VI(EN) (5 V/div)
VI(EN)
							VI(IN) = 5 V
							RL = 27 Ω
							TA = 25°C
		VO(OUT) (2 V/div)
VO(OUT)
0	2	4	6	8	10	12	14	16	18	20
				t − Time − ms
Figure 3. Turnoff Delay and Fall Time
				VI(EN) (5 V/div)
VI(EN)
				VO(OUT) (2 V/div)
	VI(IN) = 5 V
	CL = 1 µF
V	RL = 27 Ω
O(OUT)	TA = 25°C
	TA = 25°C
0	2	4	6	8	10	12	14	16	18	20
				t − Time − ms

Figure 5. Turnoff Delay and Fall Time

With 1- F Load

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