TEXAS INSTRUMENTS TPS2041B, TPS2042B, TPS2043B, TPS2044B, TPS2051B Technical data

TPS2041B

		TPS2041B, TPS2042B
		TPS2043B, TPS2044B, TPS2051B
DGN−8 D−8	D−16	TPS2052B, TPS2053B, TPS2054B

www.ti.com	SLVS514E – APRIL 2004 – REVISED JANUARY 2006

CURRENT-LIMITED, POWER-DISTRIBUTION SWITCHES

FEATURES

∙70-mΩ High-Side MOSFET

∙500-mA Continuous Current

∙Thermal and Short-Circuit Protection

∙Accurate Current Limit (0.75 A min, 1.25 A max)

∙Operating Range: 2.7 V to 5.5 V

∙0.6-ms Typical Rise Time

∙Undervoltage Lockout

∙Deglitched Fault Report (OC)

∙No OC Glitch During Power Up

∙Maximum Standby Supply Current:

1-µA (Single, Dual) or 2-µA (Triple, Quad)

∙Bidirectional Switch

∙Ambient Temperature Range: -40°C to 85°C

∙ESD Protection

∙UL Recognized, File Number E169910

APPLICATIONS

∙Heavy Capacitive Loads

∙Short-Circuit Protections

	TPS2041B/TPS2051B																TPS2042B/TPS2052B
D AND DGN PACKAGES																	D AND DGN PACKAGES
					(TOP VIEW)																(TOP VIEW)
GND							1		8		OUT						GND					1		8
																										OC1
	IN						2		7		OUT							IN				2		7		OUT1
	IN						3		6		OUT								²			3		6		OUT2
																	EN1
	EN			²			4		5		OC								²			4		5		OC2
																	EN2
	TPS2043B/TPS2053B																TPS2044B/TPS2054B
					D PACKAGE															D PACKAGE
						(TOP VIEW)															(TOP VIEW)
GND							1		16							GND					1			16
												OC1															OC1
	IN1						2		15			OUT1					IN1				2			15		OUT1
		²					3		14			OUT2						²			3			14		OUT2
EN1																EN1
		²					4		13			OC2						²			4			13			OC2
EN2																EN2
GND							5		12			OC3				GND					5			12			OC3
	IN2						6		11			OUT3					IN2				6			11		OUT3
			²				7		10			NC						²			7			10		OUT4
EN3																EN3
	NC						8		9			NC						²			8			9			OC4
																EN4

²All enable inputs are active high for the TPS205xB series. NC − No connect

DESCRIPTION

The TPS204xB/TPS205xB power-distribution switches are intended for applications where heavy capacitive loads and short circuits are likely to be encountered. These devices incorporates 70-mΩ N-channel MOSFET power switches for power-distribution systems that require multiple power switches in a single package. Each switch is controlled by a logic enable input. Gate drive is provided by an internal charge pump designed to control the power-switch rise times and fall times to minimize current surges during switching. The charge pump requires no external components and allows operation from supplies as low as 2.7 V.

When the output load exceeds the current-limit threshold or a short is present, the device limits the output current to a safe level by switching into a constant-current mode, pulling the overcurrent (OCx) logic output low. When continuous heavy overloads and short-circuits increase the power dissipation in the switch, causing the junction temperature to rise, a thermal protection circuit shuts off the switch to prevent damage. Recovery from a thermal shutdown is automatic once the device has cooled sufficiently. Internal circuitry ensures that the switch remains off until valid input voltage is present. This power-distribution switch is designed to set current limit at 1 A typically.

GENERAL SWITCH CATALOG

80 mΩ, dual

TPS2042B

500 mA

33 mΩ, single

TPS201xA

0.2 A − 2 A

TPS2052B

500 mA

Ω

80 mΩ, triple

80 mΩ, quad

Ω

TPS2046

250 mA

80 m

, dual

80 m

, quad

TPS202x

0.2 A − 2 A

TPS203x

0.2 A − 2 A

TPS2056

250 mA

TPS2062

1 A

TPS2066

1 A

80 mΩ, single

TPS2014

600 mA

260 mΩ

TPS2100/1

TPS2080

500 mA

TPS2015

1 A

IN1

IN1

500 mA

TPS2081

500 mA

TPS2043B 500 mA

TPS2041B

500 mA

IN2

10 mA

TPS2082

500 mA

TPS2053B 500 mA

TPS2044B

500 mA

TPS2085

500 mA

IN2

OUT

TPS2051B

500 mA

TPS2102/3/4/5

TPS2090

250 mA

TPS2047

250 mA

TPS2086

500 mA

TPS2054B

500 mA

TPS2045

250 mA

1.3 Ω

TPS2091

250 mA

TPS2057

250 mA

TPS2087

500 mA

IN1

500 mA

TPS2048

250 mA

TPS2095

250 mA

TPS2055

250 mA

IN2

100 mA

TPS2092

250 mA

TPS2058

250 mA

TPS2061

1 A

TPS2096

250 mA

TPS2065

1 A

TPS2097

250 mA

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.	Copyright © 2004–2006, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.

TPS2041B, TPS2042B

TPS2043B, TPS2044B, TPS2051B

TPS2052B, TPS2053B, TPS2054B

www.ti.com

SLVS514E – APRIL 2004 – REVISED JANUARY 2006

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

AVAILABLE OPTION AND ORDERING INFORMATION

			RECOMMENDED	TYPICAL		PACKAGED DEVICES(1)
	TA	ENABLE	MAXIMUM	SHORT-CIRCUIT	NUMBER OF
			CONTINUOUS	CURRENT LIMIT	SWITCHES	MSOP (DGN)	SOIC (D)
			LOAD CURRENT	AT 25°c
		Active low			Single	TPS2041BDGN	TPS2041BD
		Active high			Single	TPS2051BDGN	TPS2051BD
		Active low			Dual	TPS2042BDGN	TPS2042BD
	-40°C to 85°C	Active high	0.5 A	1 A	Dual	TPS2052BDGN	TPS2052BD
		Active low			Triple	--	TPS2043BD
		Active high			Triple	--	TPS2053BD
		Active low			Quad	--	TPS2044BD
		Active high			Quad	--	TPS2054BD

(1)The package is available taped and reeled. Add an R suffix to device types (e.g., TPS2042BDR)

ABSOLUTE MAXIMUM RATINGS

over operating free-air temperature range unless otherwise noted(1)

	UNIT
Input voltage range, VI(IN), VI(INx) (2)	-0.3 V to 6 V
Output voltage range, VO(OUT), VO(OUTx) (2)	-0.3 V to 6 V
Input voltage range, VI(EN), VI(ENx), VI(EN), VI(ENx)	-0.3 V to 6 V
Voltage range, VI(/OC), VI(OCx)	-0.3 V to 6 V
Continuous output current, IO(OUT), IO(OUTx)	Internally limited
Continuous total power dissipation	See Dissipation Rating Table
Operating virtual junction temperature range, TJ	-40°C to 125°C
Storage temperature range, Tstg	-65°C to 150°C
Lead temperature soldering 1,6 mm (1/16 inch) from case for 10 seconds	260°C
Human body model MIL-STD-883C	2 kV
Electrostatic discharge (ESD) protection	500 V
Charge device model (CDM)

(1)Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2)All voltages are with respect to GND.

DISSIPATING RATING TABLE

PACKAGE	TA ≤ 25°C	DERATING FACTOR	TA = 70°C	TA = 85°C
	POWER RATING	ABOVE TA = 25°C	POWER RATING	POWER RATING
DGN-8	1712.3 mW	17.123 mW/°C	941.78 mW	684.93 mW
D-8	585.82 mW	5.8582 mW/°C	322.20 mW	234.32 mW
D-16	898.47 mW	8.9847 mW	494.15 mW	359.38 mW

2

TPS2041B, TPS2042B TPS2043B, TPS2044B, TPS2051B

TPS2052B, TPS2053B, TPS2054B

www.ti.com

SLVS514E – APRIL 2004 – REVISED JANUARY 2006

RECOMMENDED OPERATING CONDITIONS

	MIN	MAX	UNIT
Input voltage, VI(IN), VI(INx)	2.7	5.5	V
Input voltage, VI(EN), VI(ENx), VI(EN), VI(ENx)	0	5.5	V
Continuous output current, IO(OUT), IO(OUTx)	0	500	mA
Operating virtual junction temperature, TJ	-40	125	°C

ELECTRICAL CHARACTERISTICS

over recommended operating junction temperature range, VI(IN) = 5.5 V, IO = 0.5 A, VI(/ENx) = 0 V (unless otherwise noted)

PARAMETER	TEST CONDITIONS(1)	MIN TYP MAX UNIT
POWER SWITCH

rDS(on)

tr (2)

tf (2)

Static drain-source on-state					-40°C ≤ TJ ≤ 125°C			mΩ
resistance, 5-V operation	VI(IN) = 5 V or 3.3 V,			IO = 0.5 A		70	135
and 3.3-V operation
Static drain-source on-state					-40°C ≤ TJ ≤ 125°C			mΩ
resistance, 2.7-V	VI(IN) = 2.7		V,	IO = 0.5 A		75	150
operation(2)
Rise time, output	VI(IN) = 5.5		V			0.6	1.5
	VI(IN)	= 2.7	V	C = 1 µF,		0.4	1
				L	TJ = 25°C			ms
	V	= 5.5	V	RL = 10 Ω		0.05	0.5
Fall time, output	I(IN)
	VI(IN) = 2.7		V			0.05	0.5

ENABLE INPUT EN AND ENx
VIH		High-level input voltage	2.7 V ≤ VI(IN) ≤ 5.5 V						2		V
VIL			2.7 V ≤ VI(IN) ≤ 5.5 V
		Low-level input voltage									0.8
II		Input current	VI(ENx) = 0 V or 5.5 V						-0.5		0.5 µA
t	(2)	Turnon time	C	L	= 100 µF, R	L	= 10 Ω				3
on											ms
t	(2)	Turnoff time	C		= 100 µF, R		= 10 Ω
				L		L					10
off
CURRENT LIMIT
			V = 5 V, OUT connected to GND,					TJ = 25°C	0.75	1	1.25
IOS		Short-circuit output current	I(IN)								A
			device enabled into short-circuit					-40°C ≤ TJ ≤ 125°C
									0.7	1	1.3

SUPPLY CURRENT (TPS2041B, TPS2051B)

Supply current, low-level output

Supply current, high-level output

Leakage current

Reverse leakage current

No load on OUT, VI(ENx) = 5.5 V, or VI(ENx) = 0 V

No load on OUT, VI(ENx) = 0 V, or VI(ENx) = 5.5 V

OUT connected to ground, VI(ENx) = 5.5 V, or VI(ENx) = 0 V

VI(OUTx) = 5.5 V, IN = ground(2)

SUPPLY CURRENT (TPS2042B, TPS2052B)

TJ = 25°C	0.5	1
-40°C ≤ TJ ≤ 125°C		µA
	0.5	5
TJ = 25°C	43	60
-40°C ≤ TJ ≤ 125°C		µA
	43	70
-40°C ≤ TJ ≤ 125°C	1	µA
TJ = 25°C	0	µA

	No load on OUT, VI(ENx) = 5.5 V			TJ = 25°C	0.5	1
Supply current, low-level output				-40°C ≤ TJ ≤ 125°C	0.5	µA
						5
	No load on OUT, VI(ENx) = 0 V			TJ = 25°C	50	70
Supply current, high-level output				-40°C ≤ TJ ≤ 125°C	50	µA
						90
Leakage current	OUT connected to ground, VI(ENx) = 5.5 V			-40°C ≤ TJ ≤ 125°C	1	µA
Reverse leakage current	V	I(OUTx)	= 5.5 V, IN = ground(2)	T = 25°C	0.2	µA
				J

(1)Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account separately.

(2)Not tested in production, specified by design.

3

TPS2041B, TPS2042B

TPS2043B, TPS2044B, TPS2051B

TPS2052B, TPS2053B, TPS2054B

www.ti.com

SLVS514E – APRIL 2004 – REVISED JANUARY 2006

ELECTRICAL CHARACTERISTICS (continued)

over recommended operating junction temperature range, VI(IN) = 5.5 V, IO = 0.5 A, VI(/ENx) = 0 V (unless otherwise noted)

PARAMETER		TEST CONDITIONS(1)		MIN TYP	MAX UNIT
SUPPLY CURRENT (TPS2043B, TPS2053B)
	No load on OUT, VI(ENx) = 0 V		TJ = 25°C	0.5	2
Supply current, low-level output			-40°C ≤ TJ ≤ 125°C	0.5	µA
					10
	No load on OUT, VI(ENx) = 5.5 V		TJ = 25°C	65	90
Supply current, high-level output			-40°C ≤ TJ ≤ 125°C	65	µA
					110
Leakage current	OUT connected to ground, VI(ENx) = 0 V		-40°C≤ TJ ≤ 125°C	1	µA
Reverse leakage current	V	= 5.5 V, INx = ground(3)	T = 25°C	0.2	µA
	I(OUTx)		J

SUPPLY CURRENT (TPS2044B, TPS2054B)

Supply current, low-level output

Supply current, high-level output

Leakage current

Reverse leakage current

UNDERVOLTAGE LOCKOUT

Low-level input voltage, IN, INx

Hysteresis, IN, INx

OVERCURRENT OC and OCx

Output low voltage, VOL(/OCx)

Off-state current(3)

OC deglitch(3)

THERMAL SHUTDOWN(4)

Thermal shutdown threshold(3)

Recovery from thermal shutdown(3)

Hysteresis(3)

No load on OUT, VI(ENx) = 5.5 V, or VI(ENx) = 0 V

No load on OUT, VI(ENx) = 0 V, or VI(ENx) = 5.5 V

OUT connected to ground, VI(ENx) = 5.5 V, or VI(ENx) = 0 V

VI(OUTx) = 5.5 V, INx = ground(3)

TJ = 25°C

IO(OCx) = 5 mA

VO(OCx) = 5 V or 3.3 V

OCx assertion or deassertion

(3)Not tested in production, specified by design.

(4)The thermal shutdown only reacts under overcurrent conditions.

	TJ = 25°C	0.5	2	µA
	-40°C ≤ TJ ≤ 125°C	0.5	10
	TJ = 25°C	75	110	µA
	-40°C ≤ TJ ≤ 125°C	75	140
	-40°C≤ TJ ≤ 125°C	1		µA
	TJ = 25°C	0.2		µA
	2		2.5	V
		75		mV
			0.4	V
			1	µA
	4	8	15	ms
	135			°C
	125			°C
		10		°C

4

TPS2041B, TPS2042B TPS2043B, TPS2044B, TPS2051B

TPS2052B, TPS2053B, TPS2054B

www.ti.com

SLVS514E – APRIL 2004 – REVISED JANUARY 2006

DEVICE INFORMATION

Terminal Functions (TPS2041B and TPS2051B)

TERMINAL

I/O

DESCRIPTION

NAME

TPS2041B

TPS2051B

EN

4

-

I

Enable input, logic low turns on power switch

EN

-

4

I

Enable input, logic high turns on power switch

GND

1

1

Ground

IN

2, 3

2, 3

I

Input voltage

OC

5

5

O

Overcurrent open-drain output, active-low

OUT

6, 7, 8

6, 7, 8

O

Power-switch output

Functional Block Diagram (TPS2041B and TPS2051B)

CS

(See Note A)

IN

OUT

Charge

Pump

Current

EN

Driver

Limit

(See Note B)

UVLO

OC

GND

Thermal

Deglitch

Sense

Note A: Current sense

Note B: Active low (EN) for TPS2041B; Active high (EN) for TPS2051B

5

TPS2041B, TPS2042B

TPS2043B, TPS2044B, TPS2051B

TPS2052B, TPS2053B, TPS2054B

www.ti.com

SLVS514E – APRIL 2004 – REVISED JANUARY 2006

Terminal Functions (TPS2042B and TPS2052B)

		TERMINAL		I/O	DESCRIPTION
	NAME	TPS2042B	TPS2052B
	EN1	3	-	I	Enable input, logic low turns on power switch IN-OUT1
	EN2	4	-	I	Enable input, logic low turns on power switch IN-OUT2
	EN1	-	3	I	Enable input, logic high turns on power switch IN-OUT1
	EN2	-	4	I	Enable input, logic high turns on power switch IN-OUT2
	GND	1	1		Ground
	IN	2	2	I	Input voltage
	OC1	8	8	O	Overcurrent, open-drain output, active low, IN-OUT1
	OC2	5	5	O	Overcurrent, open-drain output, active low, IN-OUT2
	OUT1	7	7	O	Power-switch output, IN-OUT1
	OUT2	6	6	O	Power-switch output, IN-OUT2

Functional Block Diagram (TPS2042B and TPS2052B)

			OC1
GND	Thermal		Deglitch
	Sense
EN1
(See Note B)		Current
	Driver
		Limit
Charge
Pump
		(See Note A)
		CS	OUT1
UVLO
		(See Note A)
IN		CS	OUT2
Charge
Pump
	Driver	Current
		Limit
EN2			OC2
(See Note B)
	Thermal		Deglitch
	Sense
Note A: Current sense
Note B: Active low (ENx) for TPS2042B; Active high (ENx) for TPS2052B

6

TPS2041B, TPS2042B TPS2043B, TPS2044B, TPS2051B

TPS2052B, TPS2053B, TPS2054B

www.ti.com

SLVS514E – APRIL 2004 – REVISED JANUARY 2006

Terminal Functions (TPS2043B and TPS2053B)

		TERMINAL		I/O	DESCRIPTION
	NAME	TPS2043B	TPS2053B
	EN1	3	--	I	Enable input, logic low turns on power switch IN1-OUT1
	EN2	4	--	I	Enable input, logic low turns on power switch IN1-OUT2
	EN3	7	--	I	Enable input, logic low turns on power switch IN2-OUT3
	EN1	--	3	I	Enable input, logic high turns on power switch IN1-OUT1
	EN2	--	4	I	Enable input, logic high turns on power switch IN1-OUT2
	EN3	--	7	I	Enable input, logic high turns on power switch IN2-OUT3
	GND	1, 5	1, 5		Ground
	IN1	2	2	I	Input voltage for OUT1 and OUT2
	IN2	6	6	I	Input voltage for OUT3
	NC	8, 9, 10	8, 9, 10		No connection
	OC1	16	16	O	Overcurrent, open-drain output, active low, IN1-OUT1
	OC2	13	13	O	Overcurrent, open-drain output, active low, IN1-OUT2
	OC3	12	12	O	Overcurrent, open-drain output, active low, IN2-OUT3
	OUT1	15	15	O	Power-switch output, IN1-OUT1
	OUT2	14	14	O	Power-switch output, IN1-OUT2
	OUT3	11	11	O	Power-switch output, IN2-OUT3

7

TPS2041B, TPS2042B
TPS2043B, TPS2044B, TPS2051B
TPS2052B, TPS2053B, TPS2054B				www.ti.com
SLVS514E – APRIL 2004 – REVISED JANUARY 2006
Functional Block Diagram (TPS2043B and TPS2053B)
				OC1
GND		Thermal
		Sense		Deglitch
EN1
(See Note B)			Current
		Driver
			Limit
				(See Note A)
			CS	OUT1
	UVLO
				(See Note A)
IN1			CS	OUT2
		Driver	Current
			Limit
EN2				OC2
(See Note B)		Thermal		Deglitch
		Sense
VCC	Charge
	Pump
Selector
				(See Note A)
IN2			CS	OUT3
EN3		Driver	Current
			Limit
(See Note B)
	UVLO			OC3
GND		Thermal		Deglitch
		Sense

Note A: Current sense

Note B: Active low (ENx) for TPS2043B; Active high (ENx) for TPS2053B

8

TPS2041B, TPS2042B TPS2043B, TPS2044B, TPS2051B

TPS2052B, TPS2053B, TPS2054B

www.ti.com

SLVS514E – APRIL 2004 – REVISED JANUARY 2006

Terminal Functions (TPS2044B and TPS2054B)

		TERMINAL		I/O	DESCRIPTION
	NAME	TPS2044B	TPS2054B
	EN1	3	-	I	Enable input, logic low turns on power switch IN1-OUT1
	EN2	4	-	I	Enable input, logic low turns on power switch IN1-OUT2
	EN3	7	-	I	Enable input, logic low turns on power switch IN2-OUT3
	EN4	8	-	I	Enable input, logic low turns on power switch IN2-OUT4
	EN1	-	3	I	Enable input, logic high turns on power switch IN1-OUT1
	EN2	-	4	I	Enable input, logic high turns on power switch IN1-OUT2
	EN3	-	7	I	Enable input, logic high turns on power switch IN2-OUT3
	EN4	-	8	I	Enable input, logic high turns on power switch IN2-OUT4
	GND	1, 5	1, 5		Ground
	IN1	2	2	I	Input voltage for OUT1 and OUT2
	IN2	6	6	I	Input voltage for OUT3 and OUT4
	OC1	16	16	O	Overcurrent, open-drain output, active low, IN1-OUT1
	OC2	13	13	O	Overcurrent, open-drain output, active low, IN1-OUT2
	OC3	12	12	O	Overcurrent, open-drain output, active low, IN2-OUT3
	OC4	9	9	O	Overcurrent, open-drain output, active low, IN2-OUT4
	OUT1	15	15	O	Power-switch output, IN1-OUT1
	OUT2	14	14	O	Power-switch output, IN1-OUT2
	OUT3	11	11	O	Power-switch output, IN2-OUT3
	OUT4	10	10	O	Power-switch output, IN2-OUT4

9

TPS2041B, TPS2042B

TPS2043B, TPS2044B, TPS2051B

TPS2052B, TPS2053B, TPS2054B

www.ti.com

SLVS514E – APRIL 2004 – REVISED JANUARY 2006

Functional Block Diagram (TPS2044B and TPS2054B)
				OC1
GND	Thermal		Deglitch
	Sense
EN1
(See Note B)	Driver	Current
		Limit
			(See Note A)
		CS		OUT1
	UVLO
	Power Switch
			(See Note A)
IN1		CS		OUT2
	Driver	Current
		Limit
EN2				OC2
(See Note B)	Thermal		Deglitch
	Sense
VCC	Charge
Selector	Pump
				OC3
	Thermal		Deglitch
	Sense
EN3
(See Note B)	Driver	Current
		Limit
			(See Note A)
		CS		OUT3
	UVLO
	Power Switch
			(See Note A)
IN2		CS		OUT4
	Driver	Current
		Limit
EN4				OC4

(See Note B)

Thermal

Deglitch

GND

Sense

Note A: Current sense

Note B: Active low (ENx) for TPS2044B; Active high (ENx) for TPS2054B

10

TPS2041B, TPS2042B TPS2043B, TPS2044B, TPS2051B

TPS2052B, TPS2053B, TPS2054B

www.ti.com

SLVS514E – APRIL 2004 – REVISED JANUARY 2006

PARAMETER MEASUREMENT INFORMATION

OUT

tr

tf

RL

CL

VO(OUT)

90%

90%

10%

10%

TEST CIRCUIT

V

50%

50%

VI(EN)

50%

50%

I(EN)

ton

toff

ton

toff

VO(OUT)

90%

10%

VO(OUT)

90%

10%

VOLTAGE WAVEFORMS

Figure 1. Test Circuit and Voltage Waveforms

RL = 10 ,

VI(EN)

V

VI(EN)

CL = 1 F

I(EN)

V

5 V/div

TA = 25 C

I(EN)

5 V/div

			VO(OUT)	RL = 10 ,
			2 V/div	CL = 1 F
V				TA = 25 C
O(OUT)
2 V/div
				t − Time − 500 s/div
	t − Time − 500 s/div
Figure 2. Turnon Delay and Rise Time With 1-µF Load			Figure 3. Turnoff Delay and Fall Time With 1-µF Load

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TPS2041B, TPS2042B

TPS2043B, TPS2044B, TPS2051B

TPS2052B, TPS2053B, TPS2054B

www.ti.com

SLVS514E – APRIL 2004 – REVISED JANUARY 2006

PARAMETER MEASUREMENT INFORMATION (continued)

			RL = 10 ,
					VI(EN)
VI(EN)
			C	= 100 F
VI(EN)			L		VI(EN)
			T	= 25 C
5 V/div			A		5 V/div

			VO(OUT)	RL = 10 ,
				CL = 100 F
VO(OUT)			2 V/div	TA = 25 C
2 V/div
	t − Time − 500 s/div			t − Time − 500 s/div
Figure 4. Turnon Delay and Rise Time With 100-µF Load			Figure 5. Turnoff Delay and Fall Time With 100-µF Load

V			VI(EN)
I(EN)			VI(EN)
V
I(EN)			5 V/div
5 V/div

IO(OUT)	IO(OUT)
	500 mA/div
500 mA/div

t − Time − 500 s/div

VI = 5 V,

RL = 10 ,

TA = 25 C

220 F

470 F

100 F

t − Time − 500 s/div

Figure 6. Short-Circuit Current,	Figure 7. Inrush Current With Different
Device Enabled Into Short	Load Capacitance

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