Texas Instruments TPS2060DGN, TPS2060DRBR, TPS2064DGN, TPS2064DRBR, TPS2068D Schematic [ru]

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D−8 DRB−8DGN−8

TPS2060/TPS2064

DGNPACKAGE

(TOP VIEW)

GND

EN1

EN2

OC1

OUT1

OUT2

OC2

TPS2068

DGNPACKAGE

(TOP VIEW)

GND

OUT

TPS2069

DGNPACKAGE

(TOP VIEW)

GND

OUT

TPS2068

DPACKAGE

(TOP VIEW)

GND

OUT

GND

EN1

†

EN2

OC1

OUT1

OUT2

OC2

TPS2060/TPS2064

DRBPACKAGES

(TOP VIEW)

† Allenableinputsareactivehighforthe TPS2064devices.

†

TPS2060, TPS2064

TPS2068, TPS2069

www.ti.com

SLVS553K –MARCH 2005– REVISED MAY 2011

CURRENT-LIMITED, POWER-DISTRIBUTION SWITCHES

Check for Samples: TPS2060, TPS2064, TPS2068, TPS2069

FEATURES

APPLICATIONS

• 70-mΩ High-Side MOSFET

• Heavy Capacitive Loads

• 1.5-A Continuous Current • Short-Circuit Protections

• Thermal and Short-Circuit Protection

• Accurate Current Limit (1.6 A min, 2.6 A max)

• Operating Range: 2.7 V to 5.5 V

• 0.6-ms Typical Rise Time

• Undervoltage Lockout

• Deglitched Fault Report (OC)

• No OC Glitch During Power Up

• 1-μA Maximum Standby Supply Current

• Reverse Current Blocking

• TPS2060/64 Temperature Range: 0°C to 70°C

• TPS2068/69 DGN Package Temperature

Range: –40°C to 85°C

• TPS2068 D Package Temperature Range:

0°C to 70°C

• UL Listed – File No. E169910

• TPS2068/69: CB Certified

DESCRIPTION

The TPS206x power-distribution switches are intended for applications where heavy capacitive loads and

short-circuits are likely to be encountered. This device incorporates 70-mΩ N-channel MOSFET power switches

for power-distribution systems that require single or dual power switches in a single package. Each switch is

controlled by a logic enable input. Gate drive is provided by an internal charge pump designed to control the

power-switch rise times and fall times to minimize current surges during switching. The charge pump requires no

external components and allows operation from supplies as low as 2.7 V.

When the output load exceeds the current-limit threshold or a short is present, the device limits the output current

to a safe level by switching into a constant-current mode, pulling the overcurrent (OCx) logic output low. When

continuous heavy overloads and short-circuits increase the power dissipation in the switch, causing the junction

temperature to rise, a thermal protection circuit shuts off the switch to prevent damage. Recovery from a thermal

shutdown is automatic once the device has cooled sufficiently. Internal circuitry ensures that the switch remains

off until valid input voltage is present. Current limit is typically 2.1 A.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2PowerPad is a trademark of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

TPS2060, TPS2064

TPS2068, TPS2069

SLVS553K –MARCH 2005– REVISED MAY 2011

www.ti.com

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with

appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more

susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

AVAILABLE OPTION AND ORDERING INFORMATION

RECOMMENDED TYPICAL PACKAGED

MAXIMUM SHORT-CIRCUIT NUMBER OF DEVICES

(1) (2)

ENABLE

CONTINUOUS CURRENT LIMIT SWITCHES

MSOP (DGN) SON (DRB)

LOAD CURRENT AT 25°C

Active low TPS2060DGN TPS2060DRB

0°C to 70°C Dual

Active high TPS2064DGN TPS2064DRB

Active low 1.5 A 2.1 A TPS2068DGN

–40°C to 85°C Single

Active high TPS2069DGN

0°C to 70°C Active low Single TPS2068D

(1) The package is available taped and reeled. Add an R suffix to device types (e.g., TPS2060DGN).

(2) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI

website at www.ti.com.

ABSOLUTE MAXIMUM RATINGS

over operating free-air temperature range unless otherwise noted

(1)

UNIT

Input voltage range, V

I(IN)

–0.3 V to 6 V

Input voltage range, V

I(/ENx)

, V

I(ENx)

–0.3 V to 6 V

Voltage range, V

I(/OC)

, V

I(/OCx)

–0.3 V to 6 V

Output voltage range, V

O(OUT)

, V

O(OUTx)

–0.3 V to 6 V

Continuous output current, I

O(OUT)

, I

O(OUTx)

Internally limited

Continuous total power dissipation See Dissipation Rating Table

TPS2060/64 0°C to 105°C

Operating virtual junction temperature

TPS2068/69 (DGN Package) –40°C to 105°C

range

TPS2068 (D Package) 0°C to 105°C

stg

Storage temperature range –65°C to 150°C

Human body model MIL-STD-883C 2 kV

ESD Electrostatic discharge protection

Charge device model (CDM) 500 V

(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating

conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

DISSIPATING RATING TABLE

(1)

THERMAL T

< 25°C DERATING T

= 70°C T

= 85°C

PACKAGE RESISTANCE POWER RATING FACTOR POWER RATING POWER RATING

ABOVE T

= 25°C

DGN-8

(2)

1370 mW 17 mW/°C 600 mW 342 mW

D-8 585.82 mW 5.8582 mW/°C 322.20 mW 234.32 mW

DRB-8 (Low-K)

(3)

270 °CW 370 mW 3.71 mW/°C 203 mW 148 mW

DRB-8 (High-K)

(4)

60 °CW 1600 mW 16.67 mW/°C 916 mW 866 mW

(1) Heatsink the PowerPad™per the recommendations of SLMA002. PCB used for recommendations per appendix A4.

(2) See Recommended Operating Conditions Table for PowerPad connection guidelines to meet qualifying conditions for CB Certificate.

(3) Soldered PowerPAD on a standard 2-layer PCB without vias for thermal pad. See TI application note SLMA002 for further details.

(4) Soldered PowerPAD on a standard 4-layer PCB with vias for thermal pad. See TI application note SLMA002 for further details.

TPS2060, TPS2064

TPS2068, TPS2069

www.ti.com

SLVS553K –MARCH 2005– REVISED MAY 2011

RECOMMENDED OPERATING CONDITIONS

(1)

MIN MAX UNIT

Input voltage, V

I(IN)

2.7 5.5 V

Input voltage, V

I(ENx)

, V

I(/ENx)

0 5.5 V

Continuous output current, I

O(OUTx)

0 1.5 A

TPS2060/64 0 105

Operating virtual junction temperature TPS2068/69 (DGN Package) –40 105 °C

TPS2068 (D Package) 0 105

(1) The PowerPad must be connected externally to GND pin to meet qualifying conditions for CB Certificate (DGN package only).

ELECTRICAL CHARACTERISTICS

0°C ≤ T

≤ 105°C for the TPS2060/64 and TPS2068 (D package), plus –40°C ≤ T

≤ 105° for the

TPS2068/69 (DGN package), V

I(IN)

= 5.5 V, I

= 1 A, V

I(/ENx)

= 0 V, or V

I(ENx)

= 5.5 V (unless otherwise noted).

PARAMETER TEST CONDITIONS

(1)

MIN TYP MAX UNIT

POWER SWITCH

Static drain-source on-state resistance,

5-V operation and V

I(IN)

= 5 V or 3.3 V, I

= 1.5 A 70 115 mΩ

3.3-V operation

DS(on)

Static drain-source on-state resistance,

I(IN)

= 2.7 V, I

= 1.5 A 75 125 mΩ

2.7-V operation

I(IN)

= 5.5 V 0.6 1.5

Rise time, output

I(IN)

= 2.7 V 0.4 1

= 1 μF,

= 25°C ms

= 5 Ω

I(IN)

= 5.5 V 0.05 0.5

Fall time, output

I(IN)

= 2.7 V 0.05 0.5

ENABLE INPUT EN OR EN

High-level input voltage 2.7 V < V

I(IN)

< 5.5 V 2

Low-level input voltage 2.7 V < V

I(IN)

< 5.5 V 0.8

Input current V

I(/ENx)

= 0 V or 5.5 V, V

I(ENx)

= 0 V or 5.5 V -0.5 0.5 μA

Turnon time C

= 100 μF, R

= 5 Ω 3

off

Turnoff time C

= 100 μF, R

= 5 Ω 10

CURRENT LIMIT

I(IN)

= 5 V, OUT connected to GND, device enabled into

Short-circuit output current 1.6 2.1 2.6 A

short-circuit

TPS2060/64 3.2 3.9

I(IN)

= 5 V, Current ramp

OC_TRIP

Overcurrent trip threshold A

(≤ 100 A/s) on OUT

TPS2068/69 2.3 2.85 3.4

I(IN)

= 5 V, OUT1 and OUT2 connected to GND, Device enabled

(2)

Short-circuit output current 3.2 4.2 5.2 A

into short-circuit, current measured at V

I(IN)

Overcurrent trip threshold V

I(IN)

= 5 V, Current ramp (≤ 100 A/s) on OUT1 and OUT2 tied

6.4 7.8 A

OC_TRIP

(2)

TPS2060/64 together, current measured at V

I(IN)

= 25°C 0.5 1

No load on OUT, V

I(/ENx)

= 5.5 V,

Supply current, low-level output μA

or V

I(ENx)

= 0 V

Over T

range 0.5 5

= 25°C 50 70

Supply current, high-level output No load on OUT, V

I(/ENx)

= 0 V,

μA

TPS2060/64 or V

I(ENx)

= 5.5 V

Over T

range 50 90

= 25°C 43 60

Supply current, high-level output No load on OUT, V

I(/ENx)

= 0 V,

μA

TPS2068/69 or V

I(ENx)

= 5.5 V

Over T

range 43 70

OUT connected to ground, V

I(/ENx)

= 5.5 V,

lkg

Leakage current 1 μA

or V

I(ENx)

= 0 V

Reverse leakage current V

I(OUTx)

= 5.5 V, IN = ground T

= 25°C 0.2 μA

UNDERVOLTAGE LOCKOUT

Low-level input voltage, IN 2 2.5 V

Hysteresis, IN T

= 25°C 75 mV

(1) Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account

separately.

(2) This configuration has not been tested for UL certification.

TPS2060, TPS2064

TPS2068, TPS2069

SLVS553K –MARCH 2005– REVISED MAY 2011

www.ti.com

ELECTRICAL CHARACTERISTICS (continued)

0°C ≤ T

≤ 105°C for the TPS2060/64 and TPS2068 (D package), plus –40°C ≤ T

≤ 105° for the

TPS2068/69 (DGN package), V

I(IN)

= 5.5 V, I

= 1 A, V

I(/ENx)

= 0 V, or V

I(ENx)

= 5.5 V (unless otherwise noted).

PARAMETER TEST CONDITIONS

(1)

MIN TYP MAX UNIT

OVERCURRENT OCx

OL(/OCx)

Output low voltage I

O(/OCx)

= 5 mA 0.4 V

Off-state current V

O(/OCx)

= 5 V or 3.3 V 1 μA

OC deglitch OCx assertion or deassertion 4 8 15 ms

THERMAL SHUTDOWN

(3)

Thermal shutdown threshold 135 °C

Recovery from thermal shutdown 125 °C

Hysteresis 10 °C

(3) The thermal shutdown only reacts under overcurrent conditions.

DEVICE INFORMATION

Pin Functions

PINS

I/O DESCRIPTION

DGN and DRB PACKAGES

NAME TPS2060 TPS2064

EN1 3 — I Enable input, logic low turns on power switch IN-OUT1

EN2 4 — I Enable input, logic low turns on power switch IN-OUT2

EN1 — 3 I Enable input, logic high turns on power switch IN-OUT1

EN2 — 4 I Enable input, logic high turns on power switch IN-OUT2

GND 1 1 Ground

IN 2 2 I Input voltage

OC1 8 8 O Overcurrent, open-drain output, active low, IN-OUT1

OC2 5 5 O Overcurrent, open-drain output, active low, IN-OUT2

OUT1 7 7 O Power-switch output, IN-OUT1

OUT2 6 6 O Power-switch output, IN-OUT2

PowerPad PowerPad Connect to GND

Thermal

Sense

Driver

Current

Limit

Charge

Pump

UVLO

Driver

Current

Limit

Thermal

Sense

Charge

Pump

GND

EN1

EN2

OC1

OUT1

OUT2

OC2

Deglitch

(SeeNote A)

(SeeNoteB)

TPS2060, TPS2064

TPS2068, TPS2069

www.ti.com

SLVS553K –MARCH 2005– REVISED MAY 2011

Functional Block Diagram (TPS2060 and TPS2064)

A. Current sense.

B. Active low (ENx) for TPS2060. Active high (ENx) for TPS2064.

OUT

GND

Current

Limit

Driver

UVLO

Charge

Pump

Thermal

Sense

Deglitch

(SeeNote A)

(SeeNoteB)

TPS2060, TPS2064

TPS2068, TPS2069

SLVS553K –MARCH 2005– REVISED MAY 2011

www.ti.com

DEVICE INFORMATION

Pin Functions (TPS2068 and TPS2069)

PINS

I/O DESCRIPTION

NAME TPS2068 TPS2069

EN 4 — I Enable input, logic low turns on power switch

EN — 4 I Enable input, logic high turns on power switch

GND 1 1 Ground

IN 2, 3 2, 3 I Input voltage

OC 5 5 O Overcurrent, open-drain output, active-low

OUT 6, 7, 8 6, 7, 8 O Power-switch output

PowerPad PowerPad Connect to GND (DGN Package Only)

(1)

(1) See the Recommended Operating Conditions Table for PowerPad connection guidelines to meet qualifying conditions for CB Certificate

(DGN package only).

Functional Block Diagram (TPS2068 and TPS2069)

A. Current sense.

B. Active low (EN) for TPS2068. Active high (EN) for TPS2069.

OUT

90%

10%

50%

90%

10%

O(OUT)

I(EN)

O(OUT)

VOLTAGE WAVEFORMS

TEST CIRCUIT

off

50%

90%

10%

I(EN)

O(OUT)

off

I(EN)

5V/div

O(OUT)

2V/div

t-Time-400 sm

R =5

C =1 F,

=25 CT

I(EN)

5V/div

O(OUT)

2V/div

t-Time-400 sm

R =5

C =1 F,

=25 CT

TPS2060, TPS2064

TPS2068, TPS2069

www.ti.com

SLVS553K –MARCH 2005– REVISED MAY 2011

PARAMETER MEASUREMENT INFORMATION

Figure 1. Test Circuit and Voltage Waveforms

Figure 2. Turnon Delay and Rise Time With 1-μF Figure 3. Turnoff Delay and Fall Time With 1-μF

Load Load

I(EN)

5V/div

O(OUT)

2V/div

t-Time-400 sm

R =5

C =100 F,

=25 CT

I(EN)

5V/div

O(OUT)

2V/div

t-Time-400 sm

R =5

C =100 F,

=25 CT

I(EN)

5 V/div

O(OUT)

1 A/div

t − Time − 500 ms/div

220 mF

470 mF

100 mF

I(EN)

5 V/div

O(OUT)

500 mA/div

t − Time − 500 ms/div

= 5 V ,

= 3 W,

= 255C

TPS2060, TPS2064

TPS2068, TPS2069

SLVS553K –MARCH 2005– REVISED MAY 2011

www.ti.com

PARAMETER MEASUREMENT INFORMATION (continued)

Figure 4. Turnon Delay and Rise Time With 100-μF Figure 5. Turnoff Delay and Fall Time With 100-μF

Load Load

Figure 6. Short-Circuit Current, Figure 7. Inrush Current With Different

Device Enabled Into Short Load Capacitance

O( )OCx

2V/div

O(OUT)

1 A/div

t-Time-2ms/div

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1.0

2 3 4 5 6

Turnon Time − ms

− Input Voltage − V

= 100 mF,

= 5 W,

= 255C

1.5

1.6

1.7

1.8

1.9

2 3 4 5 6

= 100 mF,

= 5 W,

= 255C

Turnoff Time − mS

− Input Voltage − V

TPS2060, TPS2064

TPS2068, TPS2069

www.ti.com

SLVS553K –MARCH 2005– REVISED MAY 2011

PARAMETER MEASUREMENT INFORMATION (continued)

Figure 8. 0.6-Ω Load Connected to Enabled Device

TYPICAL CHARACTERISTICS

TURNON TIME TURNOFF TIME

vs vs

INPUT VOLTAGE INPUT VOLTAGE

Figure 9. Figure 10.

0.1

0.2

0.3

0.4

0.5

0.6

2 3 4 5 6

Rise Time − ms

− Input Voltage − V

= 1 mF,

= 5 W,

= 255C

0.05

0.1

0.15

0.2

0.25

2 3 4 5 6

= 1 mF,

= 5 W,

= 255C

Fall Time − ms

− Input Voltage − V

−50 0 50 100 150

= 5.5 V

= 5 V

= 3.3 V

= 2.7 V

− Junction Temperature − 5C

− Supply Current, Output Enabled −

I (IN)

Aµ

-50

0 50 100 150

T -JunctionTemperature- C

I -SupplyCurrent,OutputEnabled- A

I(IN)

V =5.5V

V =3.3V

V =2.7V

V =5V

TPS2060, TPS2064

TPS2068, TPS2069

SLVS553K –MARCH 2005– REVISED MAY 2011

www.ti.com

TYPICAL CHARACTERISTICS (continued)

RISE TIME FALL TIME

vs vs

INPUT VOLTAGE INPUT VOLTAGE

Figure 11. Figure 12.

TPS2060, TPS2064 TPS2068, TPS2069

SUPPLY CURRENT, OUTPUT ENABLED SUPPLY CURRENT, OUTPUT ENABLED

vs vs

JUNCTION TEMPERATURE JUNCTION TEMPERATURE

Figure 13. Figure 14.

0.05

0.1

0.15

0.2

0.25

0.3

0.35

0.4

0.45

0.5

−50 0 50 100 150

= 5.5 V

= 5 V

= 3.3 V

= 2.7 V

− Junction Temperature − 5C

− Supply Current, Output Disabled −

I (IN)

Aµ

100

120

−50 0 50 100 150

Out1 = 5 V

Out1 = 3.3 V

Out1 = 2.7 V

= 0.5 A

− Junction Temperature − 5C

DS(on) − Static Drain-Source

On-State Resistance − mΩ

2.1

2.14

2.18

2.22

2.26

2.3

−50 0 50 100 150

UVLO Rising

UVLO Falling

UVOL − Undervoltage Lockout − V

− Junction Temperature − 5C

1.6

1.7

1.8

1.9

2.2

2.3

2.4

2.5

2.6

-50

0 50 100 150

2.1

T -JunctionTemperature- C

I -Short-CircuitCurrentLimit- A

V =2.7V

V =3.3V

V =5V

V =5.5V

TPS2060, TPS2064

TPS2068, TPS2069

www.ti.com

SLVS553K –MARCH 2005– REVISED MAY 2011

TYPICAL CHARACTERISTICS (continued)

SUPPLY CURRENT, OUTPUT DISABLED STATIC DRAIN-SOURCE ON-STATE RESISTANCE

vs vs

JUNCTION TEMPERATURE JUNCTION TEMPERATURE

Figure 15. Figure 16.

SHORT-CIRCUIT OUTPUT CURRENT UNDERVOLTAGE LOCKOUT

vs vs

JUNCTION TEMPERATURE JUNCTION TEMPERATURE

Figure 17. Figure 18.

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