TPS3123J12, TPS3123G15, TPS3123J18, TPS3124J12, TPS3124G15
TPS3124J18, TPS3125J12, TPS3125G15, TPS3125J18, TPS3125L30
ULTRA-LOW VOLTAGE PROCESSOR SUPERVISORY CIRCUITS
SLVS227 ± AUGUST 1999
features |
typical applications |
DMinimum Supply Voltage of 0.75 V
DSupply Voltage Supervision Range:
±1.2 V, 1.5 V, 1.8 V (TPS3123, TPS3124, TPS3125)
±3 V (TPS3125 Devices only)
DPower-On Reset Generator With Fixed Delay Time of 180 ms
DManual Reset Input (TPS3123 and TPS3125)
DWatchdog Timer Retriggers the RESET Output at VDD ≥ VIT
DApplications Using Low Voltage DSPs, Microcontrollers or Microprocessors
DWireless Communication Systems
DPortable/Battery-Powered Equipment
DProgrammable Controls
DIntelligent Instruments
DIndustrial Equipment
DNotebook/Desktop Computers
DAutomotive Systems
D Supply Current of 14 A (Typ) |
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SOT23±5 Package |
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D Temperature Range . . . ±40°C to 85°C |
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2.5 V |
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VDD |
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MR |
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TPS3125J12 |
CVDD |
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GND |
RESET |
TMS320UVC5402 |
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WDI |
XF |
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RESET |
RESET |
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TPS3823-25 |
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GND |
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DBV PACKAGE (TOP VIEW)
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TPS3123 |
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GND |
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TPS3124 |
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Figure 1. Typical Dual-Voltage DSP Application
description
The TPS3123, TPS3124, TPS3125 family of ultra-low voltage processor supervisory circuits provides circuit initialization and timing supervision, primarily for DSP and processor-based systems.
During power-on, RESET is asserted when the supply voltage (VDD) becomes higher than 0.75 V. Thereafter,
the supply voltage supervisor monitors VDD and keeps RESET output active as long as VDD remains below the threshold voltage VIT. An internal timer delays the return of the output to the inactive state (high) to ensure proper system reset. The delay time, tdtyp = 180 ms starts after VDD has risen above the threshold voltage VIT.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright 1999, Texas Instruments Incorporated
POST OFFICE BOX 655303 •DALLAS, TEXAS 75265 |
1 |
TPS3123J12, TPS3123G15, TPS3123J18, TPS3124J12, TPS3124G15
TPS3124J18, TPS3125J12, TPS3125G15, TPS3125J18, TPS3125L30
ULTRA-LOW VOLTAGE PROCESSOR SUPERVISORY CIRCUITS
SLVS227 ± AUGUST 1999
description (continued)
When the supply voltage drops below the threshold voltage VIT, the output becomes active (low) again. No external components are required. All the devices of this family have a fixed-sense threshold voltage VIT set by an internal voltage divider.
The TPS3123-xx and TPS3125-xx devices incorporate a manual reset input, MR. A low level at MR causes RESET to become active. The TPS3124-xx devices do not have the input MR, but include a high-level output RESET same as the TPS3125-xx devices. In addition the TPS3123-xx and TPS3124-xx have a watchdog timer that need to be triggered periodically by a positive or negative transition at WDI. When the supervising system fails to retrigger the watchdog circuit within the time-out interval ttout = 0.8 s, RESET output becomes active for the time period td. This event also reinitializes the watchdog timer.
The circuits are available in a 5-pin SOT23-5 package. The TPS3123, TPS3124, TPS3125 devices are characterized for operation over a temperature range of ±40°C to 85°C.
PACKAGE INFORMATION STANDARD VERSIONS
TA |
DEVICE NAME |
THRESHOLD VOLTAGE |
MARKING |
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TPS3123J12DBVR² |
TPS3123J12DBVT³ |
1.08 V |
PBNI |
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TPS3123G15DBVR² |
TPS3123G15DBVT³ |
1.40 V |
PBOI |
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TPS3123J18DBVR² |
TPS3123J18DBVT³ |
1.62 V |
PBPI |
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TPS3124J12DBVR² |
TPS3124J12DBVT³ |
1.08 V |
PBQI |
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±40°C to 85_C |
TPS3124G15DBVR² |
TPS3124G15DBVT³ |
1.40 V |
PBRI |
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TPS3124J18DBVR² |
TPS3124J18DBVT³ |
1.62 V |
PBSI |
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TPS3125J12DBVR² |
TPS3125J12DBVT³ |
1.08 V |
PBTI |
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TPS3125G15DBVR² |
TPS3125G15DBVT³ |
1.40 V |
PBUI |
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TPS3125J18DBVR² |
TPS3125J18DBVT³ |
1.62 V |
PBVI |
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TPS3125L30DBVR² |
TPS3125L30DBVT³ |
2.64 V |
PBXI |
² The DBVR passive indicates tape and reel of 3000 parts. ³ The DBVT passive indicates tape and reel of 250 parts.
2 |
POST OFFICE BOX 655303 •DALLAS, TEXAS 75265 |
TPS3123J12, TPS3123G15, TPS3123J18, TPS3124J12, TPS3124G15
TPS3124J18, TPS3125J12, TPS3125G15, TPS3125J18, TPS3125L30
ULTRA-LOW VOLTAGE PROCESSOR SUPERVISORY CIRCUITS
SLVS227 ± AUGUST 1999
ordering information application specific versions
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TPS312 3 J |
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12 DBV |
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Nominal Supply Voltage |
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Typical Reset Threshold Voltage |
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Functionality |
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NOMINAL SUPPLY |
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TYPICAL RESET |
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DEVICE NAME |
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THRESHOLD |
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VOLTAGE, VNOM |
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VOLTAGE±VIT± |
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TPS312xx12DBV |
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1.2 V |
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TPS312xAxxDBV |
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VNOM±1% |
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TPS312xx15DBV |
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1.5 V |
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TPS312xBxxDBV |
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VNOM±2% |
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TPS312xx18DBV |
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1.8 V |
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TPS312xCxxDBV |
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TPS312xx30DBV |
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3.0 V |
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TPS312xDxxDBV |
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VNOM±4% |
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TPS312xExxDBV |
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TPS312xFxxDBV |
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TPS312xGxxDBV |
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TPS312xHxxDBV |
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TPS312xIxxDBV |
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TPS312xJxxDBV |
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TPS312xKxxDBV |
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TPS312xLxxDBV |
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TPS312xMxxDBV |
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TPS312xNxxDBV |
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TPS312xOxxDBV |
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NOTE: Ten standard versions will be available at product introduction. |
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For the application specific versions contact the local TI sales office for availability and lead time. |
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Function Tables |
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TPS3123 |
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TPS3124 |
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TPS3125 |
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MR |
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VDD > VIT |
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RESET |
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VDD > VIT |
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RESET |
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VDD > VIT |
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POST OFFICE BOX 655303 •DALLAS, TEXAS 75265 |
3 |
TPS3123J12, TPS3123G15, TPS3123J18, TPS3124J12, TPS3124G15 TPS3124J18, TPS3125J12, TPS3125G15, TPS3125J18, TPS3125L30 ULTRA-LOW VOLTAGE PROCESSOR SUPERVISORY CIRCUITS
SLVS227 ± AUGUST 1999
functional block diagram
VDD |
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Device Power Supply |
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R1 |
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MR² |
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R2 |
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RESET |
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Reset Logic |
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+ Timer |
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R3 |
RESET§ |
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GND |
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Reference |
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Voltage |
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WDI³ |
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Watch Dog |
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Logic + |
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Detector |
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Timer |
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² TPS3123 and TPS3125 Only
³ TPS3123 and TPS3124 Only
§ TPS3124 and TPS3125 Only
timing diagram TPS3123 and TPS3125
A B C D E F G
VDD
VIT
<0,85 V |
t
MR
t
RESET
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td |
td |
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td |
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t
Output Undefined |
Output Undefined |
4 |
POST OFFICE BOX 655303 •DALLAS, TEXAS 75265 |