Texas Instruments TPS2046P, TPS2046DR, TPS2046D, TPS2056D, TPS2056P Datasheet
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TPS2046, TPS2056 DUAL CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS183 ± APRIL 1999
features
D135-mΩ -Maximum (5-V Input) High-Side
MOSFET Switch
D250 mA Continuous Current per Channel
DIndependent Short-Circuit and Thermal Protection With Overcurrent Logic Output
DOperating Range . . . 2.7-V to 5.5-V
DLogic-Level Enable Input
D2.5-ms Typical Rise Time
DUndervoltage Lockout
D10 µA Maximum Standby Supply Current
DBidirectional Switch
DAvailable in 8-pin SOIC and PDIP Packages
DAmbient Temperature Range, ±40°C to 85°C
D2-kV Human-Body-Model, 200-V Machine-Model ESD Protection
typical applications
DNotebook, Desktop and Palmtop PCs
DMonitors, Keyboards, Scanners, and Printers
DDigital Cameras, Phones, and PBXs
DHot-Insertion Applications
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TPS2046 |
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TPS2056 |
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D OR P PACKAGE |
D OR P PACKAGE |
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(TOP VIEW) |
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(TOP VIEW) |
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GND |
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GND |
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1 |
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OC1 |
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OC1 |
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IN |
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7 |
OUT1 |
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OUT1 |
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OUT2 |
EN1 |
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OUT2 |
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EN1 |
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3 |
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EN2 |
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EN2 |
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5 |
OC2 |
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OC2 |
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description
The TPS2046 and TPS2056 dual power-distribution switches are intended for applications where heavy capacitive loads and short circuits are likely. These devices incorporate in single packages two 135-mΩ N-channel MOSFET high-side power switches for power-distribution systems that require multiple power switches. Each switch is controlled by a logic enable compatible with 5-V and 3-V logic. Gate drive is provided by an internal charge pump that controls the power-switch rise times and fall times to minimize current surges during switching. The charge pump requires no external components and allows operation from supplies as low as 2.7 V.
When the output load exceeds the current-limit threshold or a short is present, the TPS2046 and TPS2056 limit the output current to a safe level by switching into a constant-current mode, pulling the overcurrent (OCx) logic output low. When continuous heavy overloads and short circuits increase the power dissipation in the switch causing the junction temperature to rise, a thermal protection circuit shuts off the switch in overcurrent to prevent damage. Recovery from a thermal shutdown is automatic once the device has cooled sufficiently. Internal circuitry ensures the switch remains off until valid input voltage is present.
The TPS2046 and TPS2056 are designed to limit at 0.44-A load. These power distribution switches, available in 8-pin small-outline integrated circuit (SOIC) and 8-pin plastic dual-in-line packages (PDIP), operate over an ambient temperature range of ±40°C to 85°C.
AVAILABLE OPTIONS
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RECOMMENDED |
TYPICAL |
PACKAGED DEVICES |
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ENABLE |
MAXIMUM CONTINUOUS |
SHORT-CIRCUIT CURRENT |
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SOIC |
PDIP |
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LOAD CURRENT |
° |
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LIMIT AT 25 C |
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(A) |
(A) |
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±40°C to 85°C |
Active low |
0.25 |
0.44 |
TPS2046D |
TPS2046P |
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±40°C to 85°C |
Active high |
0.25 |
0.44 |
TPS2056D |
TPS2056P |
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² The D package is available taped and reeled. Add an R suffix to device type (e.g., TPS2046DR)
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright 1999, Texas Instruments Incorporated
POST OFFICE BOX 655303 •DALLAS, TEXAS 75265 |
1 |
TPS2046, TPS2056
DUAL CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS183 ± APRIL 1999
TPS2046 functional block diagram
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OC1 |
GND |
Thermal |
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Sense |
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EN1 |
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Driver |
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Limit |
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Charge |
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Pump |
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CS |
OUT1 |
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UVLO |
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Power Switch |
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IN |
CS |
OUT2 |
Charge |
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Pump |
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Driver |
Current |
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Limit |
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² Current sense |
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OC2 |
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EN2 |
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Thermal |
Sense |
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Terminal Functions |
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TERMINAL |
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NO. |
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I/O |
DESCRIPTION |
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NAME |
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D OR P |
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TPS2046 |
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TPS2056 |
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3 |
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± |
I |
Enable input. Logic low turns on power switch, IN-OUT1. |
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EN1 |
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4 |
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Enable input. Logic low turns on power switch, IN-OUT2. |
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EN2 |
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EN1 |
± |
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I |
Enable input. Logic high turns on power switch, IN-OUT1. |
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EN2 |
± |
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4 |
I |
Enable input. Logic high turns on power switch, IN-OUT2. |
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GND |
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I |
Ground |
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IN |
2 |
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Input voltage |
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8 |
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O |
Overcurrent. Logic output active low, for power switch, IN-OUT1 |
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OC1 |
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5 |
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5 |
O |
Overcurrent. Logic output active low, for power switch, IN-OUT2 |
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OC2 |
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OUT1 |
7 |
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7 |
O |
Power-switch output |
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OUT2 |
6 |
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O |
Power-switch output |
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2 |
POST OFFICE BOX 655303 •DALLAS, TEXAS 75265 |
TPS2046, TPS2056
DUAL CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS183 ± APRIL 1999
detailed description
power switch
The power switch is an N-channel MOSFET with a maximum on-state resistance of 135 mΩ (VI(IN) = 5 V). Configured as a high-side switch, the power switch prevents current flow from OUTx to IN and IN to OUTx when
disabled. The power switch can supply a minimum of 250 mA per switch.
charge pump
An internal charge pump supplies power to the driver circuit and provides the necessary voltage to pull the gate of the MOSFET above the source. The charge pump operates from input voltages as low as 2.7 V and requires very little supply current.
driver
The driver controls the gate voltage of the power switch. To limit large current surges and reduce the associated electromagnetic interference (EMI) produced, the driver incorporates circuitry that controls the rise times and fall times of the output voltage. The rise and fall times are typically in the 2-ms to 4-ms range.
enable (ENx or ENx)
The logic enable disables the power switch and the bias for the charge pump, driver, and other circuitry to reduce the supply current to less than 10 µA when a logic high is present on ENx (TPS2046) or a logic low is present on ENx (TPS2056). A logic zero input on ENx or logic high on ENx restores bias to the drive and control circuits and turns the power on. The enable input is compatible with both TTL and CMOS logic levels.
overcurrent (OCx)
The OCx open-drain output is asserted (active low) when an overcurrent or overtemperature condition is encountered. The output will remain asserted until the overcurrent or overtemperature condition is removed.
current sense
A sense FET monitors the current supplied to the load. The sense FET measures current more efficiently than conventional resistance methods. When an overload or short circuit is encountered, the current-sense circuitry sends a control signal to the driver. The driver in turn reduces the gate voltage and drives the power FET into its saturation region, which switches the output into a constant current mode and holds the current constant while varying the voltage on the load.
thermal sense
The TPS2046 and TPS2056 implement a dual-threshold thermal trip to allow fully independent operation of the power distribution switches. In an overcurrent or short-circuit condition the junction temperature rises. When the die temperature rises to approximately 140°C, the internal thermal sense circuitry checks to determine which power switch is in an overcurrent condition and turns off that switch, thus isolating the fault without interrupting operation of the adjacent power switches. Hysteresis is built into the thermal sense, and after the device has cooled approximately 20 degrees, the switch turns back on. The switch continues to cycle off and on until the fault is removed. The (OCx) open-drain output is asserted (active low) when overtemperature or overcurrent occurs.
undervoltage lockout
A voltage sense circuit monitors the input voltage. When the input voltage is below approximately 2 V, a control signal turns off the power switch.
POST OFFICE BOX 655303 •DALLAS, TEXAS 75265 |
3 |
TPS2046, TPS2056
DUAL CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS183 ± APRIL 1999
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)²
Input voltage range, VI(IN) (see Note1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±0.3 V to 6 V Output voltage range, VO(OUTx) (see Note1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±0.3 V to VI(IN) + 0.3 V Input voltage range, VI(ENx) or VI(ENx) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±0.3 V to 6 V Continuous output current, IO(OUTx) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . internally limited Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Operating virtual junction temperature range, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±40°C to 125°C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±65°C to 150°C Lead temperature soldering 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . 260°C
Electrostatic discharge (ESD) protection: Human body model MIL-STD-883C . . . . . . . . . . . . . . . . . . . . . 2 kV Machine model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.2 kV
²Stresses beyond those listed under ªabsolute maximum ratingsº may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under ªrecommended operating conditionsº is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: All voltages are with respect to GND.
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DISSIPATION RATING TABLE |
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PACKAGE |
TA ≤ 25°C |
DERATING FACTOR |
TA = 70°C |
TA = 85°C |
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POWER RATING |
ABOVE TA = 25°C |
POWER RATING POWER RATING |
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D |
725 mW |
5.8 mW/°C |
464 mW |
377 mW |
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P |
1175 mW |
9.4 mW/°C |
752 mW |
611 mW |
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recommended operating conditions |
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TPS2046 |
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TPS2056 |
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MIN |
MAX |
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MAX |
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Input voltage, VI(IN) |
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2.7 |
5.5 |
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5.5 |
V |
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Input voltage, V |
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or VI(ENx) |
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0 |
5.5 |
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5.5 |
V |
I(ENx) |
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Continuous output current, IO(OUTx) |
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0 |
250 |
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250 |
mA |
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Operating virtual junction temperature, TJ |
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±40 |
125 |
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125 |
°C |
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4 |
POST OFFICE BOX 655303 •DALLAS, TEXAS 75265 |
TPS2046, TPS2056
DUAL CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS183 ± APRIL 1999
electrical characteristics over recommended operating junction temperature range, VI(IN)= 5.5 V, IO = rated current, VI(ENx) = 0 V, VI(ENx) = Hi (unless otherwise noted)
power switch
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PARAMETER |
TEST CONDITIONS² |
TPS2046 |
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TPS2056 |
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UNIT |
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MIN TYP |
MAX |
MIN TYP |
MAX |
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VI(IN) = 5 V, |
TJ = 25°C, |
80 |
95 |
80 |
95 |
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IO = 0.1 A |
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Static drain-source on-state |
VI(IN) = 5 V, |
TJ = 85°C, |
90 |
120 |
90 |
120 |
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resistance, 5-V operation |
IO = 0.1 A |
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VI(IN) = 5 V, |
TJ = 125°C, |
100 |
135 |
100 |
135 |
mΩ |
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IO = 0.1 A |
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rDS(on) |
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VI(IN) = 3.3 V, |
TJ = 25°C, |
85 |
105 |
85 |
105 |
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IO = 0.1 A |
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Static drain-source on-state |
VI(IN) = 3.3 V, |
TJ = 85°C, |
100 |
135 |
100 |
135 |
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resistance, 3.3-V operation |
IO = 0.1 A |
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VI(IN) = 3.3 V, |
TJ = 125°C, |
115 |
150 |
115 |
150 |
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IO = 0.1 A |
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VI(IN) = 5.5 V, |
TJ = 25°C, |
2.5 |
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2.5 |
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CL = 1 µF, |
RL = 20 Ω |
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tr |
Rise time, output |
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VI(IN) = 2.7 V, |
TJ = 25°C, |
3 |
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CL = 1 µF, |
RL = 20 Ω |
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VI(IN) = 5.5 V, |
TJ = 25°C, |
4.4 |
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CL = 1 µF, |
RL = 20 Ω |
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tf |
Fall time, output |
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VI(IN) = 2.7 V, |
TJ = 25°C, |
2.5 |
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2.5 |
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CL = 1 µF, |
RL = 20 Ω |
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² Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account separately.
enable input ENx or ENx
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PARAMETER |
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TEST CONDITIONS |
TPS2046 |
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TPS2056 |
UNIT |
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MIN TYP |
MAX |
MIN |
TYP MAX |
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VIH |
High-level input voltage |
2.7 |
V ≤ VI(IN) ≤ 5.5 V |
2 |
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V |
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VIL |
Low-level input voltage |
4.5 |
V ≤ VI(IN) ≤ 5.5 V |
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0.8 |
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V |
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2.7 |
V≤ VI(IN) ≤ 4.5 V |
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0.4 |
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II |
Input current |
TPS2046 |
V |
I(ENx) |
= 0 V or V |
I(ENx) |
= VI(IN) |
±0.5 |
0.5 |
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µA |
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TPS2056 |
VI(ENx) = VI(IN) or VI(ENx) = 0 V |
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0.5 |
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ton |
Turn-on time |
CL = 100 µF, |
RL = 20 Ω |
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20 |
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20 |
ms |
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toff |
Turn-off time |
CL = 100 µF, |
RL = 20 Ω |
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40 |
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40 |
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current limit
PARAMETER |
TEST CONDITIONS² |
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TPS2046 |
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TPS2056 |
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UNIT |
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TYP |
MAX |
MIN |
TYP |
MAX |
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IOS Short-circuit output current |
VI(IN) = 5 V, OUT connected to GND, |
0.345 |
0.44 |
0.525 |
0.345 |
0.44 |
0.525 |
A |
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Device enable into short circuit. |
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² Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account separately.
POST OFFICE BOX 655303 •DALLAS, TEXAS 75265 |
5 |
TPS2046, TPS2056
DUAL CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS183 ± APRIL 1999
electrical characteristics over recommended operating junction temperature range, VI(IN)= 5.5 V, IO = rated current, VI(ENx) = 0 V, VI(ENx) = Hi (unless otherwise noted) (continued)
supply current
PARAMETE |
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TEST CONDITIONS |
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TPS2046 |
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TPS2056 |
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UNIT |
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R |
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MIN |
TYP |
MAX |
MIN TYP |
MAX |
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Supply |
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TJ = 25°C |
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TPS2046 |
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0.015 |
1 |
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VI(ENx) = VI(IN) |
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No Load |
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≤ |
TJ |
≤ |
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10 |
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current, |
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±40 C |
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125 C |
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A |
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low-level |
on OUTx |
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° |
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0.015 |
1 |
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output |
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VI(ENx) = 0 V |
TJ = 25 C |
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TPS2056 |
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±40°C |
≤ TJ |
≤ |
125°C |
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10 |
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Supply |
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V |
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= 0 V |
TJ = 25°C |
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TPS2046 |
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80 |
100 |
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I(ENx) |
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No Load |
±40°C |
≤ TJ |
≤ |
125°C |
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100 |
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current, |
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A |
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high-level |
on OUTx |
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° |
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80 |
100 |
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output |
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VI(ENx) = VI(IN) |
TJ = 25 C |
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TPS2056 |
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±40°C |
≤ TJ |
≤ |
125°C |
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100 |
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OUTx |
V |
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= VI(IN) |
±40°C ≤ TJ |
≤ 125°C |
TPS2046 |
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100 |
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Leakage |
I(ENx) |
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A |
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current |
connected |
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VI(ENx) = 0 V |
±40°C ≤ TJ |
≤ 125°C |
TPS2056 |
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100 |
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to ground |
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Reverse |
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V |
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= 0 V |
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TPS2046 |
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0.3 |
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IN = high |
I(ENx) |
TJ = 25°C |
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A |
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leakage |
impedance |
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VI(ENx) = Hi |
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TPS2056 |
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0.3 |
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current |
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undervoltage lockout
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PARAMETER |
TEST CONDITIONS |
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TPS2046 |
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TPS2056 |
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UNIT |
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MIN |
TYP |
MAX |
MIN |
TYP |
MAX |
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Low-level input voltage |
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2 |
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2.5 |
2 |
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2.5 |
V |
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Hysteresis |
TJ = 25°C |
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100 |
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100 |
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mV |
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overcurrent |
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OCx |
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PARAMETER |
TEST CONDITIONS |
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TPS2046 |
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TPS2056 |
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UNIT |
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MIN |
TYP |
MAX |
MIN |
TYP |
MAX |
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Sink current² |
VO = 5 V |
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10 |
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10 |
mA |
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Output low voltage |
IO = 5 mA, |
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VOL(OCx) |
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0.5 |
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0.5 |
V |
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Off-state current² |
VO = 5 V, |
VO = 3.3 V |
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1 |
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1 |
A |
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² Specified by design, not production tested. |
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6 |
POST OFFICE BOX 655303 •DALLAS, TEXAS 75265 |
TPS2046, TPS2056
DUAL CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS183 ± APRIL 1999
PARAMETER MEASUREMENT INFORMATION
|
OUTx |
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RL |
CL |
tr |
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tf |
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VO(OUTx) |
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90% |
90% |
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10% |
10% |
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TEST CIRCUIT |
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VI(ENx) |
50% |
50% |
|
VI(ENx) |
50% |
50% |
|
|
ton |
|
toff |
ton |
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|
toff |
VO(OUTx) |
|
90% |
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VO(OUTx) |
|
90% |
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10% |
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10% |
VOLTAGE WAVEFORMS
Figure 1. Test Circuit and Voltage Waveforms
VI(ENx)
(5 V/div)
VO(OUTx)
(2 V/div)
VI(ENx)
(5 V/div)
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VI(IN) = 5 V |
|
|
V |
||
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° |
|
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TA = 25 C |
|
|
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O(OUTx) |
|
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CL = 0.1 F |
|
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(2 V/div) |
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0 |
0 |
1 |
2 |
3 |
4 |
5 |
6 |
7 |
8 |
9 |
10 |
|||
|
|
|
|
|
t ± Time ± ms |
|
|
|
|
|
|
||
VI(IN) = 5 |
V |
|
|
|
|
TA = 25°C |
|
|
|
|
|
CL = 0.1 F |
|
|
|
|
|
|
|
|
|
|
|
1000 |
2000 |
3000 |
4000 |
5000 |
|
|
t ± Time ± ms |
|
|
|
|
Figure 2. Turnon Delay and Rise Time
with 0.1- F Load
Figure 3. Turnoff Delay and Fall Time
with 0.1- F Load
POST OFFICE BOX 655303 •DALLAS, TEXAS 75265 |
7 |
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