Texas Instruments TPS1101PWR, TPS1101PWLE, TPS1101DR, TPS1101D Datasheet

TPS1101, TPS1101Y

SINGLE P-CHANNEL ENHANCEMENT-MODE MOSFETS

SLVS079C ± DECEMBER 1993 ± REVISED AUGUST 1995

D Low rDS(on) . . . 0.09 Ω Typ at VGS = ±10 V		D PACKAGE
D 3 V Compatible			(TOP VIEW)
D Requires No External VCC	SOURCE		1	8		DRAIN
D TTL and CMOS Compatible Inputs	SOURCE		2	7		DRAIN
D VGS(th) = ±1.5 V Max	SOURCE		3	6		DRAIN
	GATE		4	5		DRAIN
D Available in Ultrathin TSSOP Package (PW)
D ESD Protection Up to 2 kV per	D PACKAGE
MIL-STD-883C, Method 3015

description

The TPS1101 is a single, low-rDS(on), P-channel,

enhancement-mode MOSFET. The device has

PW PACKAGE

been optimized for 3-V or 5-V power distribution

in battery-powered systems by means of the

Texas Instruments LinBiCMOS process. With a

maximum VGS(th) of ±1.5 V and an IDSS of only

0.5 μA, the TPS1101 is the ideal high-side switch

for low-voltage, portable battery-management

systems where maximizing battery life is a primary

concern.

The

low

rDS(on)

and

excellent

ac

PW PACKAGE

characteristics

(rise

time

5.5 ns typical)

of

the

(TOP VIEW)

TPS1101

make

it

the

logical

choice

for

low-voltage switching applications such as power

NC

1

16

NC

switches for pulse-width-modulated (PWM)

SOURCE

2

15

DRAIN

controllers or motor/bridge drivers.

SOURCE

3

14

DRAIN

The ultrathin thin shrink small-outline package or

SOURCE

4

13

DRAIN

SOURCE

5

12

DRAIN

TSSOP (PW)

version fits

in height-restricted

SOURCE

6

11

DRAIN

places where other P-channel MOSFETs cannot.

GATE

7

10

DRAIN

The size advantage is especially important where

NC

8

9

NC

board height restrictions do not allow for an

small-outline integrated circuit (SOIC) package.

NC ± No internal connection

Such applications include notebook computers,

personal

digital

assistants

(PDAs),

cellular

telephones, and PCMCIA cards. For existing designs, the D-packaged version has a pinout common with other P-channel MOSFETs in SOIC packages.

AVAILABLE OPTIONS

		PACKAGED DEVICES²		CHIP FORM
	TJ	SMALL OUTLINE	TSSOP
				(Y)
		(D)	(PW)
	± 40°C to 150°C	TPS1101D	TPS1101PWLE	TPS1101Y

²The D package is available taped and reeled. Add an R suffix to device type (e.g.,

TPS1101DR). The PW package is only available left-end taped and reeled (indicated by the LE suffix on the device type; e.g., TPS1101PWLE). The chip form is tested at 25°C.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

LinBiCMOS is a trademark of Texas Instruments Incorporated.

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

Copyright 1995, Texas Instruments Incorporated

POST OFFICE BOX 655303 •DALLAS, TEXAS 75265

1

TPS1101, TPS1101Y

SINGLE P-CHANNEL ENHANCEMENT-MODE MOSFETS

SLVS079C ± DECEMBER 1993 ± REVISED AUGUST 1995

schematic

SOURCE

ESD-

Protection

Circuitry

GATE

DRAIN

NOTE A: For all applications, all source terminals should be connected and all drain terminals should be connected.

TPS1101Y chip information

This chip, when properly assembled, displays characteristics similar to the TPS1101. Thermal compression or ultrasonic bonding may be used on the doped aluminum bonding pads. The chips may be mounted with conductive epoxy or a gold-silicon preform.

BONDING PAD ASSIGNMENTS

(8)

(7)

(6)

(5)

	SOURCE	(1)		(8)			DRAIN
		(2)		(7)
	SOURCE						DRAIN
			TPS1100Y
		(3)		(6)
	SOURCE						DRAIN
		(4)		(5)
	GATE						DRAIN

80

CHIP THICKNESS: 15 MILS TYPICAL

BONDING PADS: 4 × 4 MILS MINIMUM

TJmax = 150°C

TOLERANCES ARE ± 10%

ALL DIMENSIONS ARE IN MILS

(1)

(2)

(3)

(4)

92

2	POST OFFICE BOX 655303 •DALLAS, TEXAS 75265

TPS1101, TPS1101Y

SINGLE P-CHANNEL ENHANCEMENT-MODE MOSFETS

SLVS079C ± DECEMBER 1993 ± REVISED AUGUST 1995

absolute maximum ratings over operating free-air temperature (unless otherwise noted)²

							UNIT
Drain-to-source voltage, VDS						± 15	V
Gate-to-source voltage, VGS						2 or ± 15	V
				D package	TA = 25°C	± 0.62
			VGS = ±2.7 V		TA = 125°C	± 0.39
				PW package	TA = 25°C	± 0.61
					TA = 125°C	± 0.38
				D package	TA = 25°C	± 0.88
			VGS = ±3 V		TA = 125°C	± 0.47
				PW package	TA = 25°C	± 0.86
Continuous drain current (TJ = 150°C), ID³					TA = 125°C	± 0.45	A
				D package	TA = 25°C	± 1.52
			VGS = ±4.5 V		TA = 125°C	± 0.71
				PW package	TA = 25°C	± 1.44
					TA = 125°C	± 0.67
				D package	TA = 25°C	± 2.30
			VGS = ±10 V		TA = 125°C	± 1.04
				PW package	TA = 25°C	± 2.18
					TA = 125°C	± 0.98
Pulsed drain current, I	D	³			T = 25°C	± 10	A
					A
Continuous source current (diode conduction), IS					TA = 25°C	± 1.1	A
Storage temperature range, Tstg						± 55 to 150	°C
Operating junction temperature range, TJ						± 40 to 150	°C
Operating free-air temperature range, TA						± 40 to 125	°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds						260	°C

²Stresses beyond those listed under ªabsolute maximum ratingsº may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under ªrecommended operating conditionsº is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

³Maximum values are calculated using a derating factor based on RθJA = 158°C/ W for the D package and RθJA = 176°C/ W for the PW package. These devices are mounted on an FR4 board with no special thermal considerations.

DISSIPATION RATING TABLE

		T ≤ 25°C	DERATING FACTOR³	T = 70°C	T = 85°C	T = 125°C
	PACKAGE	A	ABOVE TA = 25°C	A	A	A
		POWER RATING		POWER RATING	POWER RATING	POWER RATING
	D	791 mW	6.33 mW/°C	506 mW	411 mW	158 mW
	PW	710 mW	5.68 mW/°C	454 mW	369 mW	142 mW

³Maximum values are calculated using a derating factor based on RθJA = 158°C/ W for the D package and RθJA = 176°C/ W for the PW package. These devices are mounted on an FR4 board with no special thermal considerations.

POST OFFICE BOX 655303 •DALLAS, TEXAS 75265

3