Texas Instruments CD74ACT238E, CD74ACT138M96, CD74ACT138M, CD74ACT138E, CD74AC138M96 Datasheet

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Texas Instruments CD74ACT238E, CD74ACT138M96, CD74ACT138M, CD74ACT138E, CD74AC138M96 Datasheet

CD74AC138, CD74ACT138, CD74AC238, CD74ACT238

Data sheet acquired from Harris Semiconductor SCHS234

September 1998

3-to-8-Line Decoders/Demultiplexers

Features

•CD74AC138, CD74ACT138 . . . . . . . . . . . . . . . Inverting

•CD74AC238, CD74ACT238 . . . . . . . . . . . Non-Inverting

•Buffered Inputs

•Typical Propagation Delay

-5ns at VCC = 5V, TA = 25oC, CL = 50pF

•Exceeds 2kV ESD Protection MIL-STD-883, Method

[ /Title		3015
(CD74	•	SCR-Latchup-Resistant CMOS Process and Circuit
AC138	•	SCR-Latchup-Resistant CMOS Process and Circuit
AC138		Design

,• Speed of Bipolar FAST™/AS/S with Signiﬁcantly

CD74		Reduced Power Consumption
ACT13	•	Balanced Propagation Delays
8,	•	Balanced Propagation Delays
8,	•	AC Types Feature 1.5V to 5.5V Operation and
CD74	•	AC Types Feature 1.5V to 5.5V Operation and
CD74		Balanced Noise Immunity at 30% of the Supply
AC238		Balanced Noise Immunity at 30% of the Supply
AC238	•	±24mA Output Drive Current
,	•	±24mA Output Drive Current
,		-	Fanout to 15 FAST™ ICs
CD74		-	Fanout to 15 FAST™ ICs
CD74		-	Drives 50Ω Transmission Lines
ACT23		-	Drives 50Ω Transmission Lines
ACT23
8)	Pinout
/Sub-	Pinout
ject (3-			CD74AC138, CD74ACT138, CD74AC238, CD74ACT238
to-8-			CD74AC138, CD74ACT138, CD74AC238, CD74ACT238
to-8-					(PDIP, SOIC)
Line					TOP VIEW
Line
Decod-
ers/De			A0	1	16 VCC
multi-			A0	1	16 VCC
multi-			A1	2	15	Y0 AC/ACT138
plex-						Y0 AC/ACT138
						Y0 AC/ACT238
			A2	3	14	Y1 AC/ACT138
ers)			A2	3	14	Y1 AC/ACT138
ers)			E1	4		Y1 AC/ACT238
/Autho			E1	4	13 Y2 AC/ACT138
/Autho						Y2 AC/ACT238
r ()			E2	5	12 Y3 AC/ACT138
r ()						Y3 AC/ACT238
/Key-			E3	6	11 Y4 AC/ACT138
/Key-			AC/ACT138 Y7			Y4 AC/ACT238
words			AC/ACT138 Y7	7	10 Y5 AC/ACT138
			AC/ACT238 Y7	7	10 Y5 AC/ACT138
			AC/ACT238 Y7	8	9	Y5 AC/ACT238
(Har-			GND	8	9	Y6 AC/ACT138
(Har-						Y6 AC/ACT238
ris
Semi-
con-
ductor,
Advan
ced

Description

The CD74AC138, CD74ACT138, CD74AC238, and CD74ACT238 are 3-to-8-line decoders/demultiplexers that utilize the Harris Advanced CMOS Logic technology. Both circuits have three binary select inputs (A0, A1, and A2). If the device is enabled, these inputs determine which one of the eight normally HIGH outputs of the AC/ACT138 will go LOW or which on of the normally LOW outputs of the AC/ACT238 will go HIGH. Two active LOW and one active HIGH enables (E1, E2 and E3) are provided to simplify the cascading of these devices.

Ordering Information

PART	TEMP.			PKG.
NUMBER	RANGE (oC)	PACKAGE		NO.
CD74AC138E	0 to 70oC, -40 to 85,	16	Ld PDIP	E16.3
	-55 to 125

CD74ACT138E	0 to 70oC, -40 to 85,	16	Ld PDIP	E16.3
	-55 to 125

CD74AC238E	0 to 70oC, -40 to 85,	16	Ld PDIP	E16.3
	-55 to 125

CD74ACT238E	0 to 70oC, -40 to 85,	16	Ld PDIP	E16.3
	-55 to 125

CD74AC138M	0 to 70oC, -40 to 85,	16	Ld SOIC	M16.15
	-55 to 125

CD74ACT138M	0 to 70oC, -40 to 85,	16	Ld SOIC	M16.15
	-55 to 125

CD74AC238M	0 to 70oC, -40 to 85,	16	Ld SOIC	M16.15
	-55 to 125

CD74ACT238M	0 to 70oC, -40 to 85,	16	Ld SOIC	M16.15
	-55 to 125

NOTES:

17.When ordering, use the entire part number. Add the suffix 96 to obtain the variant in the tape and reel.

18.Wafer and die for this part number is available which meets all electrical specifications. Please contact your local sales office or Harris customer service for ordering information.

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.		File Number 1909.1

FAST™ is a Trademark of Fairchild Semiconductor.	1
Copyright © Harris Corporation 1998

CD74AC138, CD74ACT138, CD74AC238, CD74ACT238

Functional Diagram

		AC/ACT AC/ACT
	238			138
1		15

A0			Y0		Y0

2		14	Y1
A1					Y1

3		13	Y2
A2					Y2
		12
			Y3
4					Y3
		11
			Y4
E1					Y4

5		10	Y5
E2					Y5

6		9
E3			Y6		Y6
		7
			Y7
					Y7

CD74AC/ACT138 TRUTH TABLE

INPUTS

ENABLE

ADDRESS

OUTPUTS

(NOTE 4)

CD74AC/ACT238 TRUTH TABLE

INPUTS

ENABLE

ADDRESS

OUTPUTS

(NOTE 4)

NOTES:

19.H = High Level, L = Low Level, X = Don’t Care

20.E0 = E1 + E2

CD74AC138, CD74ACT138, CD74AC238, CD74ACT238

Absolute Maximum Ratings

DC Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . .	-0.5V to 6V
DC Input Diode Current, IIK	±20mA
For VI < -0.5V or VI > VCC + 0.5V . . . . . . . . . . . . . . . . . .	±20mA
DC Output Diode Current, IOK	±50mA
For VO < -0.5V or VO > VCC + 0.5V . . . . . . . . . . . . . . . .	±50mA
DC Output Source or Sink Current per Output Pin, IO	±50mA
For VO > -0.5V or VO < VCC + 0.5V . . . . . . . . . . . . . . . .	±50mA
DC VCC or Ground Current, ICC or IGND (Note 5) . . . . . .	. . .±100mA

Thermal Information
Thermal Resistance (Typical, Note 7)	θJA (oC/W)
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. 90
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. 160
Maximum Junction Temperature (Plastic Package) . . .	. . . . . . . 150oC
Maximum Storage Temperature Range . . . . . . . . . .	-65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . .	. . . . . . . 300oC

Operating Conditions

Temperature Range, TA . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC

Supply Voltage Range, VCC (Note 6)

AC Types. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.5V to 5.5V

ACT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V

DC Input or Output Voltage, VI, VO . . . . . . . . . . . . . . . . . 0V to VCC

Input Rise and Fall Slew Rate, dt/dv

AC Types, 1.5V to 3V . . . . . . . . . . . . . . . . . . . . . . . . . 50ns (Max)

AC Types, 3.6V to 5.5V . . . . . . . . . . . . . . . . . . . . . . . . 20ns (Max)

ACT Types, 4.5V to 5.5V. . . . . . . . . . . . . . . . . . . . . . . 10ns (Max)

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this speciﬁcation is not implied.

NOTES:

21.For up to 4 outputs per device, add ±25mA for each additional output.

22.Unless otherwise specified, all voltages are referenced to ground.

23.θJA is measured with the component mounted on an evaluation PC board in free air.

DC Electrical Speciﬁcations

		TEST					-40oC TO		-55oC TO
		CONDITIONS		VCC	25oC		85oC		125oC
PARAMETER	SYMBOL	VI (V)	IO (mA)	(V)	MIN	MAX	MIN	MAX	MIN	MAX	UNITS
AC TYPES

High Level Input Voltage	VIH	-	-	1.5	1.2	-	1.2	-	1.2	-	V
				3	2.1	-	2.1	-	2.1	-	V

				5.5	3.85	-	3.85	-	3.85	-	V

Low Level Input Voltage	VIL	-	-	1.5	-	0.3	-	0.3	-	0.3	V
				3	-	0.9	-	0.9	-	0.9	V

				5.5	-	1.65	-	1.65	-	1.65	V

High Level Output Voltage	VOH	VIH or VIL	-0.05	1.5	1.4	-	1.4	-	1.4	-	V
			-0.05	3	2.9	-	2.9	-	2.9	-	V

			-0.05	4.5	4.4	-	4.4	-	4.4	-	V

			-4	3	2.58	-	2.48	-	2.4	-	V

			-24	4.5	3.94	-	3.8	-	3.7	-	V

			-75	5.5	-	-	3.85	-	-	-	V
			(Note 8, 9)

			-50	5.5	-	-	-	-	3.85	-	V
			(Note 8, 9)

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