TLC7524C, TLC7524E, TLC7524I 8-BIT MULTIPLYING DIGITAL-TO-ANALOG CONVERTERS
SLAS061C ± SEPTEMBER 1986 ± REVISED NOVEMBER 1998
D Easily Interfaced to Microprocessors |
D, N, OR PW PACKAGE |
D On-Chip Data Latches |
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(TOP VIEW) |
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D Monotonic Over the Entire A/D Conversion |
OUT1 |
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RFB |
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Range |
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OUT2 |
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REF |
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D Segmented High-Order Bits Ensure |
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GND |
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VDD |
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Low-Glitch Output |
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DB7 |
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13 |
WR |
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D Interchangeable With Analog Devices |
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DB6 |
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12 |
CS |
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AD7524, PMI PM-7524, and Micro Power |
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DB5 |
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11 |
DB0 |
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Systems MP7524 |
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DB4 |
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10 |
DB1 |
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D Fast Control Signaling for Digital |
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DB3 |
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DB2 |
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Signal-Processor Applications Including |
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Interface With TMS320 |
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FN PACKAGE |
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D |
CMOS Technology |
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(TOP VIEW) |
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OUT2 |
OUT1 |
NC |
R |
REF |
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KEY PERFORMANCE SPECIFICATIONS |
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FB |
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Resolution |
8 Bits |
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Linearity error |
1/2 LSB Max |
GND |
3 |
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1 |
20 19 |
VDD |
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Power dissipation at VDD = 5 V |
5 mW Max |
4 |
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Setting time |
100 ns Max |
DB7 |
5 |
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WR |
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Propagation delay time |
80 ns Max |
NC |
6 |
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16 |
NC |
description |
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DB6 |
7 |
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15 |
CS |
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DB5 |
8 |
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14 |
DB0 |
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The TLC7524C, TLC7524E, and TLC7524I are |
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10 11 12 13 |
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DB4 |
DB3 |
NC |
DB2 |
DB1 |
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CMOS, 8-bit, digital-to-analog converters (DACs) |
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designed for easy interface to most popular |
NC±No internal connection |
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microprocessors. |
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The devices are 8-bit, multiplying DACs with input latches and load cycles similar to the write cycles of a random access memory. Segmenting the high-order bits minimizes glitches during changes in the most significant bits, which produce the highest glitch impulse. The devices provide accuracy to 1/2 LSB without the need for thin-film resistors or laser trimming, while dissipating less than 5 mW typically.
Featuring operation from a 5-V to 15-V single supply, these devices interface easily to most microprocessor buses or output ports. The 2- or 4-quadrant multiplying makes these devices an ideal choice for many microprocessor-controlled gain-setting and signal-control applications.
The TLC7524C is characterized for operation from 0°C to 70°C. The TLC7524I is characterized for operation from ±25°C to 85°C. The TLC7524E is characterized for operation from ± 40°C to 85°C.
AVAILABLE OPTIONS
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PACKAGE |
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TA |
SMALL OUTLINE |
PLASTIC CHIP CARRIER |
PLASTIC DIP |
SMALL OUTLINE |
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PLASTIC DIP |
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(FN) |
(N) |
(PW) |
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(D) |
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0°C to 70°C |
TLC7524CD |
TLC7524CFN |
TLC7524CN |
TLC7524CPW |
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± 25°C to 85°C |
TLC7524ID |
TLC7524IFN |
TLC7524IN |
TLC7524IPW |
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± 40°C to 85°C |
TLC7524ED |
TLC7524EFN |
TLC7524EN |
± |
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Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright 1998, Texas Instruments Incorporated
POST OFFICE BOX 655303 •DALLAS, TEXAS 75265 |
1 |
TLC7524C, TLC7524E, TLC7524I
8-BIT MULTIPLYING DIGITAL-TO-ANALOG CONVERTERS
SLAS061C ± SEPTEMBER 1986 ± REVISED NOVEMBER 1998
functional block diagram
15 |
R |
R |
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R |
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REF |
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2R |
2R |
2R |
2R |
2R |
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16 RFB |
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S-1 |
S-2 |
S-3 |
S-8 |
R |
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1 OUT1 |
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2 OUT2 |
12 |
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3 GND |
CS 13 |
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Data Latches |
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WR |
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4 |
5 |
6 |
11 |
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DB7 |
DB6 |
DB5 |
DB0 |
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(MSB) |
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(LSB) |
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Data Inputs |
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Terminal numbers shown are for the D or N package. |
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absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . ±0.3 V to 16.5 |
V |
Digital input voltage range, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
±0.3 V to VDD + 0.3 |
V |
Reference voltage, Vref . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . . . . . . . . . . ± 25 |
V |
Peak digital input current, II . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . . . . . . . . . . 10 μA |
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Operating free-air temperature range, TA: TLC7524C . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . . . . . 0°C to 70°C |
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TLC7524I . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . . ±25°C to 85°C |
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TLC7524E . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . . ±40°C to 85°C |
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Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . ±65°C to 150°C |
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Case temperature for 10 seconds, TC: FN package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . . . . . . . . . . 260°C |
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Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D, N, or PW package |
. . . . . . . . . . . 260°C |
2 |
POST OFFICE BOX 655303 •DALLAS, TEXAS 75265 |
TLC7524C, TLC7524E, TLC7524I 8-BIT MULTIPLYING DIGITAL-TO-ANALOG CONVERTERS
SLAS061C ± SEPTEMBER 1986 ± REVISED NOVEMBER 1998
recommended operating conditions
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VDD = 5 V |
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VDD = 15 V |
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UNIT |
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MIN |
NOM |
MAX |
MIN |
NOM |
MAX |
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Supply voltage, VDD |
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4.75 |
5 |
5.25 |
14.5 |
15 |
15.5 |
V |
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Reference voltage, Vref |
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± 10 |
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± 10 |
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V |
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High-level input voltage, VIH |
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2.4 |
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13.5 |
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V |
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Low-level input voltage, VIL |
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0.8 |
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1.5 |
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CS setup time, tsu(CS) |
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40 |
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40 |
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CS hold time, th(CS) |
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0 |
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Data bus input setup time, tsu(D) |
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25 |
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25 |
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Data bus input hold time, th(D) |
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10 |
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10 |
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Pulse duration, |
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low, tw(WR) |
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40 |
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40 |
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WR |
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TLC7524C |
0 |
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70 |
0 |
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70 |
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Operating free-air temperature, TA |
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°C |
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TLC7524I |
± 25 |
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85 |
± 25 |
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85 |
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TLC7524E |
± 40 |
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85 |
± 40 |
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85 |
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electrical characteristics over recommended operating free-air temperature range, Vref = ±10 V,
OUT1 and OUT2 at GND (unless otherwise noted)
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PARAMETER |
TEST CONDITIONS |
VDD = 5 V |
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VDD = 15 V |
UNIT |
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MIN TYP |
MAX |
MIN TYP |
MAX |
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IIH |
High-level input current |
VI = VDD |
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10 |
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10 |
μA |
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IIL |
Low-level input current |
VI = 0 |
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± 10 |
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± 10 |
μA |
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OUT1 |
DB0±DB7 at 0 V, |
WR, |
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at 0 V, |
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± 400 |
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± 200 |
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Output leakage |
Vref = ± 10 V |
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IIkg |
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nA |
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current |
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DB0±DB7 at VDD, |
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OUT2 |
WR, CS at 0 V, |
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± 200 |
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Vref = ± 10 V |
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IDD |
Supply current |
Quiescent |
DB0±DB7 at VIHmin or VILmax |
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mA |
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Standby |
DB0±DB7 at 0 V or VDD |
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500 |
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500 |
μA |
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kSVS |
Supply voltage sensitivity, |
VDD = ± 10% |
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0.01 |
0.16 |
0.005 |
0.04 |
%FSR/% |
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gain/ VDD |
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Ci |
Input capacitance, |
VI = 0 |
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5 |
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pF |
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DB0±DB7, WR, CS |
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OUT1 |
DB0±DB7 at 0 V, |
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at 0 V |
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30 |
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30 |
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WR |
CS |
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Co |
Output capacitance |
OUT2 |
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120 |
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pF |
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OUT1 |
DB0±DB7 at VDD, |
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at 0 V |
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120 |
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120 |
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WR |
CS |
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OUT2 |
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30 |
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Reference input impedance |
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5 |
20 |
5 |
20 |
kΩ |
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(REF to GND) |
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POST OFFICE BOX 655303 •DALLAS, TEXAS 75265 |
3 |