Texas Instruments TLC545IFNR, TLC545IN, TLC545IFN, TLC545CN, TLC545CFN Datasheet

TLC545C, TLC545I, TLC546C, TLC546I

8-BIT ANALOG-TO-DIGITAL CONVERTERS

WITH SERIAL CONTROL AND 19 INPUTS

SLAS066B ± DECEMBER 1985 ± REVISED OCTOBER 1996

D 8-Bit Resolution A/D Converter

N PACKAGE

D Microprocessor Peripheral or Stand-Alone

(TOP VIEW)

Operation

INPUT A0

VCC

1

28

D On-Chip 20-Channel Analog Multiplexer

INPUT A1

D Built-in Self-Test Mode

2

27

SYSTEM CLOCK

INPUT A2

3

26

I/O CLOCK

D Software-Controllable Sample and Hold

INPUT A3

4

25

ADDRESS INPUT

D Total Unadjusted Error . . . ± 0.5 LSB Max

INPUT A4

5

24

DATA OUT

D Timing and Control Signals Compatible

INPUT A5

6

23

CS

INPUT A6

7

22

REF+

With 8-Bit TLC540 and 10-Bit TLC1540 A/D

INPUT A7

REF±

Converter Families

8

21

D CMOS Technology

INPUT A8

9

20

INPUT A18

INPUT A9

10

19

INPUT A17

PARAMETER

TL545

TL546

INPUT A10

11

18

INPUT A16

Channel Acquisition Time

μ

μ

INPUT A11

12

17

INPUT A15

1.5 s

2.7 s

Conversion Time (Max)

9 μs

17 μs

INPUT A12

13

16

INPUT A14

Sampling Rate (Max)

76 x 103

40 x 103

GND

14

15

INPUT A13

Power Dissipation (Max)

15 mW

15 mW

FN PACKAGE

description

(TOP VIEW)

The TLC545 and TLC546 are CMOS analog-to-digital converters built around an 8-bit switched capacitor successive-approximation analog-to-digital converter. They are designed for serial interface to a microprocessor or peripheral via a 3-state output with up to four control inputs including independent SYSTEM CLOCK, I/O CLOCK, chip select (CS), and ADDRESS INPUT. A 4-MHz system clock for the TLC545 and a 2.1-MHz system clock for the TLC546 with a design that includes simultaneous read/write operation allowing high-speed data transfers and sample rates of up to 76,923 samples per second for the TLC545, and 40,000 samples per second for the TLC546.

In addition to the high-speed converter and versatile control logic, there is an on-chip 20-channel analog multiplexer that can be used to sample any one of 19 inputs or an internal self-test voltage, and a sample-and-hold that can operate automatically or under microprocessor control.

INPUT A4 INPUT A5 INPUT A6 INPUT A7 INPUT A8 INPUT A9

INPUT A10

INPUTA3 INPUTA2 INPUTA1 INPUTA0 V SYSTEMCLOCK	I/OCLOCK
CC

4	3	2	1	28	27 26
5					25
6					24
7					23
8					22
9					21
10					20
11					19
12 13 14 15 16 17 18

INPUT A11

INPUT A12 GND INPUT A13 INPUT A14 INPUT A15 INPUT A16

ADDRESS INPUT DATA OUT

CS

REF+

REF±

INPUT A18

INPUT A17

The converters incorporated in the TLC545 and TLC546 feature differential high-impedance reference inputs that facilitate ratiometric conversion, scaling, and analog circuitry isolation from logic and supply noises. A totally switched capacitor design allows low-error (± 0.5 LSB) conversion in 9 μs for the TLC545, and 17 μs for the TLC546, over the full operating temperature range.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

Copyright 1996, Texas Instruments Incorporated

POST OFFICE BOX 655303 •DALLAS, TEXAS 75265

1

TLC545C, TLC545I, TLC546C, TLC546I 8-BIT ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL CONTROL AND 19 INPUTS

SLAS066B ± DECEMBER 1985 ± REVISED OCTOBER 1996

AVAILABLE OPTIONS

		PACKAGE
	TA
		CHIP CARRIER	PLASTIC DIP
		(FN)	(N)
	0°C to 70°C	TLC545CFN	TLC545CN
		Ð	Ð
	± 40°C to 85°C	TLC545IFN	TLC545IN
		TLC546IFN	TLC546IN

description (continued)

The TLC545C and the TLC546C are characterized for operation from 0°C to 70°C. The TLC545I and the TLC546I are characterized for operation from ±40°C to 85°C.

functional block diagram
	A0	1
		2
	A1	3				REF +	REF ±
	A2	4				22	21
	A3	5
	A4	6
	A5	7				8-Bit
	A6	8		Sample		Analog-to-Digital
	A7	9	20-Channel			Converter
	A8			and
INPUTS	A9	10	Analog	Hold		(Switched-capacitors)
	A10	11	Multiplexer
	A11	12				8
		13
	A12	15
	A13	16				Output	8	8-to-1 Data	24 DATA
	A14	17				Data
	A15			Input				Selector and	OUT
		18	5			Register		Driver
	A16	19		Address
	A17	20		Register
	A18
								4
			Self-Test	5
						Control Logic
			Reference
						and I/O
ADDRESS		25		Input	2	Counters
				Multiplexer
INPUT

I/O 26 CLOCK

23

CS

SYSTEM 27

CLOCK

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TLC545C, TLC545I, TLC546C, TLC546I 8-BIT ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL CONTROL AND 19 INPUTS

SLAS066B ± DECEMBER 1985 ± REVISED OCTOBER 1996

typical equivalent inputs

INPUT CIRCUIT IMPEDANCE DURING SAMPLING MODE

INPUT CIRCUIT IMPEDANCE DURING HOLD MODE

1 kW TYP

INPUT A0 ± A18

INPUT

Ci = 60 pF TYP

A0 ± A18

(equivalent input 5 MW TYP capacitance)

operating sequence

I / O

1

2

3

4

5

6

7

8

1

2

3

4

5

6

7

8

Don't

Care

CLOCK

Sample

tconv

Access

Cycle C

Access

Sample Cycle B

Cycle C

Cycle B

(see Note C)

See Note A

CS

twH(CS)

ADDRESS

MSB

LSB

Don't Care

MSB

LSB

Don't Care

B4

B3

B2

B1

B0

C4

C3

C2

C1

C0

INPUT

Hi-Z State

Hi-Z

DATA

State

A7

A6

A5

A4

A3

A2

A1

A0

B7

B6

B5

B4

B3

B2

B1

B0

OUT

A7

B7

MSB

LSB

LSB

Previous Conversion Data A

Conversion Data B

(see Note B)

MSB

MSB

MSB

NOTES: A. The conversion cycle, which requires 36 system clock periods, is initiated with the eighth I/O CLOCK↓ after CS↓ for the channel whose address exists in memory at that time.

B.The most significant bit (MSB) will automatically be placed on the DATA OUT bus after CS is brought low. The remaining seven bits (A6±A0) will be clocked out on the first seven I/O CLOCK falling edges.

C.To minimize errors caused by noise at the CS input, the internal circuitry waits for three system clock cycles (or less) after a chip select transition before responding to control input signals. Therefore, no attempt should be made to clock-in address data until the minimum chip-select setup time has elapsed.

POST OFFICE BOX 655303 •DALLAS, TEXAS 75265

3

TLC545C, TLC545I, TLC546C, TLC546I 8-BIT ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL CONTROL AND 19 INPUTS

SLAS066B ± DECEMBER 1985 ± REVISED OCTOBER 1996

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)²

Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . . . . . . . . . . . 6.5	V
Input voltage range, VI (any input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	±0.3 V to VCC +0.3	V
Output voltage range, VO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	±0.3 V to VCC +0.3	V
Peak input current range (any input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . . . . . . . . ± 10 mA
Peak total input current (all inputs) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . . . . . . . . ± 30 mA
Operating free-air temperature range, TA: TLC545C, TLC546C . . . . . . . . . . . . . . . . . . .	. . . . . . . 0°C to 70°C
TLC545I, TLC546I . . . . . . . . . . . . . . . . . . . . .	. . . . . ±40°C to 85°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . ±65°C to 150°C
Case temperature for 10 seconds, TC: FN package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . . . . . . . . . 260°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: N package . . . . . . . . .	. . . . . . . . . . . . 260°C

²Stresses beyond those listed under ªabsolute maximum ratingsº may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under ªrecommended operating conditionsº is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTE 1: All voltage values are with respect to network ground terminal.

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