Texas Instruments TLE2061AMJG, TLE2061AMFKB, TLE2061AIP, TLE2061AID, TLE2061ACP Datasheet

	TLE206x, TLE206xA, TLE206xB, TLE206xY
	EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE
	μPOWER OPERATIONAL AMPLIFIERS
	SLOS193A ± FEBRUARY 1997 ± REVISED MARCH 1998
D 2× Bandwidth (2 MHz) of the TL06x and	D High Output Drive, Specified into 100-W
TL03x Operational Amplifiers	Loads
D Low Supply Current . . . 290 mA/Ch Typ	D Lower Noise Floor Than Earlier
D On-chip Offset Voltage Trimming for	Generations of Low-Power BiFETs
Improved DC Performance

description

The TLE206x series of low-power JFET-input operational amplifiers doubles the bandwidth of the earlier generation TL06x and TL03x BiFET families without significantly increasing power consumption. Texas Instruments Excalibur process also delivers a lower noise floor than the TL06x and TL03x. On-chip zener trimming of offset voltage yields precision grades for dc-coupled applications. The TL206x devices are pin-compatible with other TI BiFETs; they can be used to double the bandwidth of TL06x and TL03x circuits, or to reduce power consumption of TL05x, TL07x, and TL08x circuits by nearly 90%.

BiFET operational amplifiers offer the inherently-higher input impedance of the JFET-input transistors, without sacrificing the output drive associated with bipolar amplifiers. This makes them better suited for interfacing with high-impedance sensors or very low-level ac signals. They also feature inherently better ac response than bipolar or CMOS devices having comparable power consumption. The TLE206x family features a high-output-drive circuit capable of driving 100-W loads at supplies as low as ±5 V. This makes them uniquely suited for driving transformer loads in modems and other applications requiring good ac characteristics, low power, and high output drive.

Because BiFET operational amplifiers are designed for use with dual power supplies, care must be taken to observe common-mode input voltage limits and output swing when operating from a single supply. DC biasing of the input signal is required and loads should be terminated to a virtual ground node at mid-supply. Texas Instruments TLE2426 integrated virtual ground generator is useful when operating BiFET amplifiers from single supplies.

The TLE206x are fully specified at ±15 V and ±5 V. For operation in low-voltage and/or single-supply systems, Texas Instruments LinCMOS families of operational amplifiers (TLCand TLV-prefixes) are recommended. When moving from BiFET to CMOS amplifiers, particular attention should be paid to slew rate and bandwidth requirements, and output loading. The Texas Instrument TLV2432 and TLV2442 CMOS operational amplifiers are excellent choices to consider.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

Copyright 1998, Texas Instruments Incorporated

POST OFFICE BOX 655303 •DALLAS, TEXAS 75265

1

TLE206x, TLE206xA, TLE206xB, TLE206xY EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE μPOWER OPERATIONAL AMPLIFIERS

SLOS193A ± FEBRUARY 1997 ± REVISED MARCH 1998

TLE2061 AVAILABLE OPTIONS

PACKAGED DEVICES

CHIP

SMALL

CHIP

CERAMIC

PLASTIC

T

V

max

TSSOP³

FORM§

IO

°

OUTLINE²

CARRIER

DIP

DIP

(Y)

A

(PW)

AT 25 C

(D)

(FK)

(JG)

(P)

500 μV

Ð

Ð

Ð

Ð

Ð

Ð

0°C to 70°C

1.5 mV

TLE2061ACD

Ð

Ð

TLE2061ACP

Ð

Ð

3 mV

TLE2061CD

Ð

Ð

TLE2061CP

TLE2061CPWLE

TLE2061Y

500 μV

Ð

Ð

Ð

Ð

Ð

Ð

± 40°C to 85°C

1.5 mV

TLE2061AID

Ð

Ð

TLE2061AIP

Ð

Ð

3 mV

TLE2061ID

Ð

Ð

TLE2061IP

Ð

Ð

500 μV

Ð

Ð

TLE2061BMJG

Ð

Ð

Ð

± 55°C to 125°C

1.5 mV

TLE2061AMD

TLE2061AMFK

TLE2061AMJG

TLE2061AMP

Ð

Ð

3 mV

TLE2061MD

TLE2061MFK

TLE2061MJG

TLE2061MP

Ð

Ð

² The D packages are available taped and reeled. Add R suffix to device type (e.g., TLE2061ACDR).Chips are tested at 25°C.

³ The PW package is available left-end taped and reeled (indicated by the LE suffix on the device type (e.g., TLE2061CPWLE).

§ Chip forms are tested at 25°C only.

TLE2062 AVAILABLE OPTIONS

PACKAGED DEVICES

CHIP FORM³

V

max

SMALL OUTLINE²

CHIP CARRIER

CERAMIC DIP

PLASTIC DIP

TA

IO

(FK)

(JG)

(P)

(Y)

°

(D)

AT 25 C

0°C

1 mV

TLE2062BCD

Ð

Ð

TLE2062BCP

Ð

to

2 mV

TLE2062ACD

Ð

Ð

TLE2062ACP

Ð

70°C

4 mV

TLE2062CD

Ð

Ð

TLE2062CP

TLE2062Y

± 40°C

1 mV

TLE2062BID

Ð

Ð

TLE2062BIP

Ð

to

2 mV

TLE2062AID

Ð

Ð

TLE2062AIP

Ð

85°C

4 mV

TLE2062ID

Ð

Ð

TLE2062IP

Ð

± 55°C

1 mV

TLE2062BMD

TLE2062BMFK

TLE2062BMJG

TLE2062BMP

Ð

to

2 mV

TLE2062AMD

TLE2062AMFK

TLE2062AMJG

TLE2062AMP

Ð

125°C

4 mV

TLE2062MD

TLE2062MFK

TLE2062MJG

TLE2062MP

Ð

² The D packages are available taped and reeled. Add R suffix to device type (e.g., TLE2062ACDR).

³ Chip forms are tested at 25°C only.

TLE2064 AVAILABLE OPTIONS

PACKAGED DEVICES

CHIP FORM³

VIOmax

SMALL OUTLINE²

CHIP CARRIER

CERAMIC DIP

PLASTIC DIP

TA

(Y)

AT 25°C

(D)

(FK)

(J)

(N)

0°C

2 mV

Ð

TLE2064BCN

Ð

to

4 mV

TLE2064ACD

Ð

Ð

TLE2064ACN

Ð

70°C

6 mV

TLE2064CD

TLE2064CN

TLE2064Y

± 40°C

2 mV

Ð

TLE2064BIN

Ð

to

4 mV

TLE2064AID

Ð

Ð

TLE2064AIN

Ð

85°C

6 mV

TLE2064ID

TLE2064IN

Ð

± 55°C

2 mV

Ð

Ð

TLE2064BMJ

TLE2064BMN

Ð

to

4 mV

TLE2064AMD

TLE2064AMFK

TLE2064AMJ

TLE2064AMN

Ð

125°C

6 mV

TLE2064MD

TLE2064MFK

TLE2064MJ

TLE2064MN

Ð

² The D packages are available taped and reeled. Add R suffix to device type, (e.g., TLE2064ACDR).

³ Chip forms are tested at 25°C only.

2	POST OFFICE BOX 655303 •DALLAS, TEXAS 75265

TLE206x, TLE206xA, TLE206xB, TLE206xY EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE μPOWER OPERATIONAL AMPLIFIERS

SLOS193A ± FEBRUARY 1997 ± REVISED MARCH 1998

TLE2061, TLE2061A, AND TLE2061B						TLE2062, TLE2062A, TLE2062B						TLE2064, TLE2064A, TLE2064B
D, DB, JG, P, OR PW PACKAGE						D, JG, OR P PACKAGE						D, J, OR N PACKAGE
	(TOP VIEW)							(TOP VIEW)						(TOP VIEW)
OFFSET N1					NC
		1	8			1OUT		1	8		VCC +	1OUT		1	14		4OUT
IN±		2	7		VCC +	1IN±		2	7		2OUT	1IN±		2	13		4IN±
IN+		3	6		OUT	1IN+		3	6		2IN±	1IN+		3	12		4IN+
VCC ±		4	5		OFFSET N2	VCC ±		4	5		2IN+	VCC +		4	11		VCC ±
												2IN+		5	10		3IN+
												2IN±		6	9		3IN±
												2OUT		7	8		3OUT

TLE2061M, TLE2061AM, TLE2061BM	TLE2062M, TLE2062AM, TLE2062BM
FK PACKAGE	FK PACKAGE
(TOP VIEW)	(TOP VIEW)

		N1						NC	1OUT	NC	+	19NC
	NC	OFFSET	NC	NC	NC		NC	3	2	1	20VCC		NC
								4				18
NC	3	2	1	20 19		NC	1IN±	5				17	2OUT
	4				18		NC	6				16	NC
IN ±	5				17	VCC +
							1IN+	7				15	2IN±
NC
	6				16	NC	NC	8				14	NC
IN +						OUT
	7				15			9	10 11 12 13
NC	8				14	NC		NC	VCC ±	NC	2IN+	NC
	9	10 11 12 13
	NC	CC±	NC	N2	NC
		V		OFFSET

NC ± No internal connection

TLE2064M, TLE2064AM, TLE2064BM

FK PACKAGE

(TOP VIEW)

	1IN ±	1OUT	NC	4OUT	4IN ±
1IN+	3	2	1	20 19		4IN+
	4				18
NC	5				17	NC
VCC +	6				16	VCC ±
NC	7				15	NC
2IN+	8				14	3IN+
	9	10 11 12 13
	2IN ±	2OUT	NC	3OUT	3IN ±

POST OFFICE BOX 655303 •DALLAS, TEXAS 75265

3

TLE206x, TLE206xA, TLE206xB, TLE206xY EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE μPOWER OPERATIONAL AMPLIFIERS

SLOS193A ± FEBRUARY 1997 ± REVISED MARCH 1998

TLE2061Y chip information

This chip, when properly assembled, displays characteristics similar to the TLE2061. Thermal compression or ultrasonic bonding may be used on the doped-aluminum bonding pads. Chips may be mounted with conductive epoxy or a gold-silicon preform.

																BONDING PAD ASSIGNMENTS
																																																									VCC +
									(7)																																	(6)												(1)				(7)
																																																						OFFSET N1
																																																						(3)
																																																						IN +				(6)
																																																						(2)						OUT
																																																						IN ±
																																																						(5)
																																																						OFFSET N2				(4)
																																																									VCC ±
				65																																						(5)												CHIP THICKNESS: 15 MILS TYPICAL
																																																						BONDING PADS: 4 X 4 MILS MINIMUM
																																																						TJmax = 150°C
									(1)																																													TOLERANCES ARE ± 10%.
																																										(4)												ALL DIMENSIONS ARE IN MILS.
																																																						PIN (4) IS INTERNALLY CONNECTED
									(2)																																	(3)												TO BACKSIDE OF CHIP.
																													45

4	POST OFFICE BOX 655303 •DALLAS, TEXAS 75265

TLE206x, TLE206xA, TLE206xB, TLE206xY EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE μPOWER OPERATIONAL AMPLIFIERS

SLOS193A ± FEBRUARY 1997 ± REVISED MARCH 1998

TLE2062Y chip information

This chip, when properly assembled, displays characteristics similar to the TLE2062. Thermal compression or ultrasonic bonding may be used on the doped-aluminum bonding pads. Chips may be mounted with conductive epoxy or a gold-silicon preform.

		BONDING PAD ASSIGNMENTS
	(1)	(8)	(7)
75	(2)		(6)
	(3)	(4)	(5)
		73

			VCC+
	(3)				(8)
1IN +		+
						(1)
1IN ±	(2)	±					1OUT
						(5)
2OUT	(7)	+					2IN +
						(6)
					±		2IN ±
					(4)
			VCC ±

CHIP THICKNESS: 15 MILS TYPICAL BONDING PADS: 4 × 4 MILS MINIMUM TJmax = 150°C

TOLERANCES ARE ± 10%.

ALL DIMENSIONS ARE IN MILS.

PIN (4) IS INTERNALLY CONNECTED TO BACKSIDE OF THE CHIP.

POST OFFICE BOX 655303 •DALLAS, TEXAS 75265

5

TLE206x, TLE206xA, TLE206xB, TLE206xY EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE μPOWER OPERATIONAL AMPLIFIERS

SLOS193A ± FEBRUARY 1997 ± REVISED MARCH 1998

TLE2064Y chip information

This chip, when properly assembled, displays characteristics similar to the TLE2064. Thermal compression or ultrasonic bonding may be used on the doped-aluminum bonding pads. Chips may be mounted with conductive epoxy or a gold-silicon preform.

BONDING PAD ASSIGNMENTS

(13)	(12) (11)(10)	(9)
(14)		(8)

73
		(1)					(7)
		(2)		(3)	(4)	(5)	(6)

139

				VCC+
(3)					(4)
		+
1 IN +						(1)
(2)		±						1 OUT
1 IN ±						(5)
		+
(7)								2 IN +
2 OUT						(6)
		±
(10)								2 IN ±
		+
3 IN +						(8)
(9)		±						3 OUT
3 IN ±						(12)
		+						4 IN +
(14)
4 OUT				±		(13)		4 IN ±
				(11)
			VCC ±

CHIP THICKNESS: 15 MILS TYPICAL BONDING PADS: 4 × 4 MILS MINIMUM TJmax = 150°C

TOLERANCES ARE ± 10%.

ALL DIMENSIONS ARE IN MILS.

PIN (11) IS INTERNALLY CONNECTED TO BACKSIDE OF CHIP.

6	POST OFFICE BOX 655303 •DALLAS, TEXAS 75265

75265 TEXAS DALLAS, •655303 BOX OFFICE POST

6±7

equivalent schematic (each channel)
						VCC +
				Q9	Q13
								Q32
				Q14	Q18			Q29	Q35
		Q4			Q16			Q33
IN +					Q19	Q25
								Q34
									Q36	Q39	Q42
								Q27
IN ±						Q23		D2			R8
Q1	Q3	Q5	Q7		Q17
				Q11		R6				20 Ω
						2.7 kΩ	Q28	D1			R9
				Q10				Q30	Q37		100 Ω
					Q20
				C3
		Q6	R3			Q24
				5.3 pF						Q41	OUT
	C1		2.4 kΩ							Q40
									Q38

		15 pF				Q31
	Q2		Q8	C2	Q15
					Q21
				15 pF
					Q12	Q26
	R1	R4	R2		Q22	R7
					R5	600 Ω
	1.1 kΩ	55 kΩ	1.1 kΩ		60 kΩ
	OFFSET N2	See Note A				VCC ±
	OFFSET N1

NOTES: A. OFFSET N1 AND OFFSET N2 are only availiable on the TLE2061x devices.

B. Component values are nominal.

ACTUAL DEVICE COMPONENT COUNT

COMPONENT	TLE2061	TLE2062	TLE2064
Transistors	43	42	42
Resistors	9	9	9
Diodes	1	2	2
Capacitors	3	3	3

1998 MARCH REVISED ± 1997 FEBRUARY ± SLOS193A

TLE206xY TLE206xB, TLE206xA, TLE206x, DRIVE-OUTPUT-HIGH INPUT-JFET EXCALIBUR AMPLIFIERS OPERATIONAL POWER μ

TLE206x, TLE206xA, TLE206xB, TLE206xY EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE μPOWER OPERATIONAL AMPLIFIERS

SLOS193A ± FEBRUARY 1997 ± REVISED MARCH 1998

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)²

Supply voltage, VCC+ (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . . . . . . . .	. . . . . . . . . . 19 V
Supply voltage, VCC ± . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . . . . . . . .	. . . . . . . . . ±19 V
Differential input voltage, VID (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . . . . . . . . .	. . . . . . . . ± 38 V
Input voltage range, VI (any input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . . . . . . . . .	. . . . . . . . ±VCC
Input current, II (each input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . . . . . . . . .	. . . . . . . ± 1 mA
Output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . . . . . . . . .	. . . . . . ± 80 mA
Total current into VCC+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . . . . . . . . .	. . . . . . . 80 mA
Total current out of VCC ± . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . . . . . . . . .	. . . . . . ±80 mA
Duration of short-circuit current at (or below) 25°C (see Note 3) . . . . . . . . . . . . .	. . . . . . . . . . . .	. . . . unlimited
Continuous total dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	See Dissipation Rating Table
Operating free-air temperature range, TA: C suffix . . . . . . . . . . . . . . . . . . . . . . . .	. . . . . . . . . . . .	. . 0°C to 70°C
I suffix . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . . . . . . . . .	±40°C to 85°C
M suffix . . . . . . . . . . . . . . . . . . . . . . .	. . . . . . . . . . .	±55°C to 125°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . . . . . . . .	±65°C to 150°C
Case temperature for 60 seconds: FK package . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . . . . . . . . .	. . . . . . . 260°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D, P, or PW package . . . . .		. . . . . . . 260°C
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: JG package .	. . . . . . . . . . . .	. . . . . . . 300°C

²Stresses beyond those listed under ªabsolute maximum ratingsº may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under ªrecommended operating conditionsº is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. All voltage values, except differential voltages, are with respect to the midpoint between VCC+ and VCC ±.

2.Differential voltages are at IN+ with respect to IN ±.

3.The output may be shorted to either supply. Temperature and /or supply voltages must be limited to ensure that the maximum dissipation rating is not exceeded.

DISSIPATION RATING TABLE

	PACKAGE	TA ≤ 25°C	DERATING FACTOR	TA = 70°C	TA = 85°C	TA = 125°C
		POWER RATING	ABOVE TA = 25°C	POWER RATING	POWER RATING	POWER RATING
	D±8	725 mW	5.8 mW/°C	464 mW	377 mW	145 mW
	D±14	950 mW	7.6 mW/°C	608 mW	494 mW	190 mW
	FK	1375 mW	11.0 mW/°C	880 mW	715 mW	275 mW
	J	1375 mW	11.0 mW/°C	880 mW	715 mW	275 mW
	JG	1050 mW	8.4 mW/°C	672 mW	546 mW	210 mW
	N	1150 mW	9.2 mW/°C	736 mW	598 mW	230 mW
	P	1000 mW	8.0 mW/°C	640 mW	520 mW	200 mW
	PW	525 mW	4.2 mW/°C	336 mW	Ð	Ð

recommended operating conditions

			C SUFFIX		I SUFFIX		M SUFFIX		UNIT
			MIN	MAX	MIN	MAX	MIN	MAX
	Supply voltage, VCC±		± 3.5	± 18	± 3.5	± 18	± 3.5	± 18	V
	Common-mode input voltage, VIC	VCC± = ± 5 V	± 1.6	4	± 1.6	4	± 1.6	4	V
		VCC± = ± 15 V	± 11	13	± 11	13	± 11	13
	Operating free-air temperature, TA		0	70	± 40	85	± 55	125	°C

8	POST OFFICE BOX 655303 •DALLAS, TEXAS 75265

TLE206x, TLE206xA, TLE206xB, TLE206xY EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE μPOWER OPERATIONAL AMPLIFIERS

SLOS193A ± FEBRUARY 1997 ± REVISED MARCH 1998

TLE2061C electrical characteristics at specified free-air temperature, VCC ± = ±5 V (unless otherwise noted)

								TLE2061C
	PARAMETER			TEST CONDITIONS			T ²	TLE2061AC			UNIT
								TLE2061BC
							A
								MIN	TYP	MAX
			TLE2061C				25°C		0.8	3.1
							Full range			4
VIO	Input offset voltage		TLE2061AC				25°C		0.6	2.6	mV
							Full range			3.5
			TLE2061BC				25°C		0.5	1.9
				VIC = 0,	RS	= 50 Ω	Full range			2.4
αVIO	Temperature coefficient of input offset voltage						Full range		6		μV/°C
	Input offset voltage long-term drift (see Note 4)						25°C		0.04		μV/mo
IIO	Input offset current						25°C		1		pA
							Full range			0.8	nA
IIB	Input bias current						25°C		3		pA
							Full range			2	nA
								± 1.6	± 2
							25°C	to	to		V
VICR	Common-mode input voltage range							4	6
								± 1.6
							Full range	to			V
								4
				RL = 10 kΩ			25°C	3.5	3.7
VOM +	Maximum positive peak output voltage swing						Full range	3.3			V
				RL = 100 Ω			25°C	2.5	3.1
							Full range	2
				RL = 10 kΩ			25°C	± 3.7	± 3.9
VOM ±	Maximum negative peak output voltage swing						Full range	± 3.3			V
				RL = 100 Ω			25°C	± 2.5	± 2.7
							Full range	± 2
				VO = ± 2.8 V,	RL = 10 kΩ		25°C	15	80
							Full range	2
AVD	Large-signal differential voltage amplification			VO = 0 to 2 V,	RL	= 100 Ω	25°C	0.75	45		V/mV
							Full range	0.5
				VO = 0 to ±2 V,	RL	= 100 Ω	25°C	0.5	3
							Full range	0.25
ri	Input resistance						25°C		1012		Ω
ci	Input capacitance						25°C		4		pF
zo	Open-loop output impedance			IO = 0			25°C		280		Ω
CMRR	Common-mode rejection ratio			VIC = VICRmin, RS = 50 Ω			25°C	65	82		dB
							Full range	65
kSVR	Supply-voltage rejection ratio (	VCC± / VIO)		VCC± = ± 5 V to ± 15 V,			25°C	75	93		dB
				RS = 50 Ω			Full range	75

² Full range is 0°C to 70°C.

NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.

POST OFFICE BOX 655303 •DALLAS, TEXAS 75265

9

TLE206x, TLE206xA, TLE206xB, TLE206xY EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE μPOWER OPERATIONAL AMPLIFIERS

SLOS193A ± FEBRUARY 1997 ± REVISED MARCH 1998

TLE2061C electrical characteristics at specified free-air temperature, VCC ± = ± 5 V (unless otherwise noted) (continued)

					TLE2061C
	PARAMETER	TEST CONDITIONS		T ²	TLE2061AC		UNIT
					TLE2061BC
				A
					MIN TYP	MAX
ICC	Supply current			25°C	280	325	μA
		VO = 0,	No load	Full range		350
ICC	Supply-current change over operating temperature range			Full range	29		μA

² Full range is 0°C to 70°C.

TLE2061C operating characteristics at specified free-air temperature, VCC ± = ± 5 V

TLE2061C

PARAMETER

TEST CONDITIONS

TA²

TLE2061AC

UNIT

TLE2061BC

MIN

TYP

MAX

SR

Slew rate at unity gain (see Figure 1)

RL = 10 kΩ,

CL = 100 pF

25°C

2.2

3.4

V/μs

Full range

2.1

Vn

Equivalent input noise voltage (see Figure 2)

f = 10 Hz,

RS = 20 Ω

25°C

59

100

nV/√

Hz

f = 1 kHz ,

RS = 20 Ω

43

60

VN(PP)

Peak-to-peak equivalent input noise voltage

f = 0.1 Hz to 10 Hz

25°C

1.1

μV

In

Equivalent input noise current

f = 1 kHz

25°C

1

fA/√

Hz

THD

Total harmonic distortion

AVD = 2,

f = 10 kHz,

25°C

0.025%

VO(PP) = 2 V,

RL = 10 kΩ

B1

Unity-gain bandwidth (see Figure 3)

RL = 10 kΩ,

CL = 100 pF

25°C

1.8

MHz

RL = 100 Ω,

CL = 100 pF

1.3

ts

Settling time

0.1%

25°C

5

μs

0.01%

10

BOM

Maximum output-swing bandwidth

AVD = 1,

RL = 10 kΩ

25°C

140

kHz

m

Phase margin at unity gain (see Figure 3)

RL = 10 kΩ,

CL = 100 pF

25°C

58°

RL = 100 Ω,

CL = 100 pF

75°

² Full range is 0°C to 70°C.

10	POST OFFICE BOX 655303 •DALLAS, TEXAS 75265

TLE206x, TLE206xA, TLE206xB, TLE206xY EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE μPOWER OPERATIONAL AMPLIFIERS

SLOS193A ± FEBRUARY 1997 ± REVISED MARCH 1998

TLE2061C electrical characteristics at specified free-air temperature, VCC ± = ±15 V (unless otherwise noted)

									TLE2061C
	PARAMETER			TEST CONDITIONS			T ²	TLE2061AC			UNIT
								TLE2061BC
							A
								MIN	TYP	MAX
			TLE2061C				25°C		0.6	3
							Full range			3.9
VIO	Input offset voltage		TLE2061AC				25°C		0.5	1.5	mV
							Full range			2.5
			TLE2061BC				25°C		0.3	0.5
				VIC = 0,	RS = 50 kΩ		Full range			1
αVIO	Temperature coefficient of input offset voltage						Full range		6		μV/°C
	Input offset voltage long-term drift (see Note 4)						25°C		0.04		μV/mo
IIO	Input offset current						25°C		2		pA
							Full range			1	nA
IIB	Input bias current						25°C		4		pA
							Full range			3	nA
								± 11	± 12
							25°C	to	to		V
VICR	Common-mode input voltage range							13	16
								± 11
							Full range	to			V
								13
				RL = 10 kΩ			25°C	13.2	13.7
VOM +	Maximum positive peak output voltage swing						Full range	13			V
				RL = 600 Ω			25°C	12.5	13.2
							Full range	12
				RL = 10 kΩ			25°C	±13.2	± 13.7
VOM ±	Maximum negative peak output voltage swing						Full range	± 13			V
				RL = 600 Ω			25°C	± 12.5	± 13
							Full range	± 12
				VO = ± 10 V,	RL	= 10 kΩ	25°C	30	230
							Full range	20
AVD	Large-signal differential voltage amplification			VO = 0 to 8 V,	RL	= 600 Ω	25°C	25	100		V/mV
							Full range	10
				VO = 0 to ±8 V,	RL	= 600 Ω	25°C	3	25
							Full range	1
ri	Input resistance						25°C		1012		Ω
ci	Input capacitance						25°C		4		pF
zo	Open-loop output impedance			IO = 0			25°C		280		Ω
CMRR	Common-mode rejection ratio			VIC = VICRmin,	RS = 50 Ω		25°C	72	90		dB
							Full range	70
kSVR	Supply-voltage rejection ratio (	VCC± / VIO)		VCC± = ± 5 V to ± 15 V,			25°C	75	93		dB
				RS = 50 Ω			Full range	75

² Full range is 0°C to 70°C.

NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.

POST OFFICE BOX 655303 •DALLAS, TEXAS 75265

11

TLE206x, TLE206xA, TLE206xB, TLE206xY EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE μPOWER OPERATIONAL AMPLIFIERS

SLOS193A ± FEBRUARY 1997 ± REVISED MARCH 1998

TLE2061C electrical characteristics at specified free-air temperature, VCC ± = ± 15 V (unless otherwise noted) (continued)

				TLE2061C
	PARAMETER	TEST CONDITIONS	T ²	TLE2061AC		UNIT
				TLE2061BC
			A
				MIN TYP	MAX
ICC	Supply current		25°C	290	350	μA
		VO = 0, No load	Full range		375
ICC	Supply-current change over operating temperature range		Full range	34		μA

² Full range is 0°C to 70°C.

TLE2061C operating characteristics at specified free-air temperature, VCC ± = ±15 V

TLE2061C

PARAMETER

TEST CONDITIONS

T ²

TLE2061AC

UNIT

TLE2061BC

A

MIN

TYP

MAX

SR

Slew rate at unity gain (see Figure 1)

RL = 10 kΩ,

CL = 100 pF

25°C

2.6

3.4

V/μs

Full range

2.5

Vn

Equivalent input noise voltage (see Figure 2)

f = 10 Hz,

RS = 20 Ω

25°C

70

100

nV/√

Hz

f = 1 kHz ,

RS = 20 Ω

40

60

VN(PP)

Peak-to-peak equivalent input noise voltage

f = 0.1 Hz to 10 Hz

25°C

1.1

μV

In

Equivalent input noise current

f = 1 kHz

25°C

1.1

fA/√

Hz

THD

Total harmonic distortion

AVD = 2,

f = 10 kHz,

25°C

0.025%

VO(PP) = 2 V,

RL = 10 kΩ

B1

Unity-gain bandwidth (see Figure 3)

RL = 10 kΩ,

CL = 100 pF

25°C

2

MHz

RL = 600 Ω,

CL = 100 pF

1.5

ts

Settling time

0.1%

25°C

5

μs

0.01%

10

BOM

Maximum output-swing bandwidth

AVD = 1,

RL = 10 kΩ

25°C

40

kHz

m

Phase margin at unity gain (see Figure 3)

RL = 10 kΩ,

CL = 100 pF

25°C

60°

RL = 600 Ω,

CL = 100 pF

70°

² Full range is 0°C to 70°C.

12	POST OFFICE BOX 655303 •DALLAS, TEXAS 75265

TLE206x, TLE206xA, TLE206xB, TLE206xY EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE μPOWER OPERATIONAL AMPLIFIERS

SLOS193A ± FEBRUARY 1997 ± REVISED MARCH 1998

TLE2061I electrical characteristics at specified free-air temperature, VCC ± = ±5 V (unless otherwise noted)

						TLE2061I , TLE2061AI
	PARAMETER			TEST CONDITIONS	T ²	TLE2061BI			UNIT
					A
						MIN	TYP	MAX
			TLE2061I		25°C		0.8	3.1
					Full range			4.4
VIO	Input offset voltage		TLE2061AI		25°C		0.6	2.6	mV
					Full range			3.9
			TLE2061BI		25°C		0.5	1.9
				VIC = 0,	Full range			2.7
αVIO	Temperature coefficient of input offset voltage			RS = 50 Ω	Full range		6		μV/°C
	Input offset voltage long-term drift (see Note 4)				25°C		0.04		μV/mo
IIO	Input offset current				25°C		1		pA
					Full range			2	nA
IIB	Input bias current				25°C		3		pA
					Full range			4	nA
VICR	Common-mode input voltage range				25°C	± 1.6 to 4	± 2 to 6		V
					Full range	± 1.6 to 4			V
				RL = 10 kΩ	25°C	3.5	3.7
VOM +	Maximum positive peak output voltage swing				Full range	3.1			V
				RL = 100 Ω	25°C	2.5	3.1
					Full range	2
				RL = 10 kΩ	25°C	±3.7	± 3.9
VOM ±	Maximum negative peak output voltage swing				Full range	± 3.1			V
				RL = 100 Ω	25°C	± 2.5	± 2.7
					Full range	± 2
				VO = ± 2.8 V,	25°C	15	80
				RL = 10 kΩ	Full range	2
AVD	Large-signal differential voltage amplification			VO = 0 to 2 V,	25°C	0.75	45		V/mV
					Full range	0.5
				RL = 100 Ω
				VO = 0 to ± 2 V,	25°C	0.5	3
				RL = 100 Ω	Full range	0.25
ri	Input resistance				25°C		1012		Ω
ci	Input capacitance				25°C		4		pF
zo	Open-loop output impedance			IO = 0	25°C		280		Ω
CMRR	Common-mode rejection ratio			VIC = VICRmin,	25°C	65	82		dB
				RS = 50 Ω	Full range	65
kSVR	Supply-voltage rejection ratio (	VCC± / VIO)		VCC± = ± 5 V to ± 15 V,	25°C	75	93		dB
				RS = 50 Ω	Full range	65
ICC	Supply current				25°C		280	325	μA
				VO = 0,
					Full range			350
				No load
ICC	Supply-current change over operating				Full range		29		μA
	temperature range

² Full range is ± 40°C to 85°C.

NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.

POST OFFICE BOX 655303 •DALLAS, TEXAS 75265

13

TLE206x, TLE206xA, TLE206xB, TLE206xY EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE μPOWER OPERATIONAL AMPLIFIERS

SLOS193A ± FEBRUARY 1997 ± REVISED MARCH 1998

TLE2061I operating characteristics at specified free-air temperature, VCC ± = ± 5 V

TLE2061I

PARAMETER

TEST CONDITIONS

T ²

TLE2061AI

UNIT

TLE2061BI

A

MIN

TYP

MAX

SR

Slew rate at unity gain (see Figure 1)

RL = 10 kΩ,

CL = 100 pF

25°C

2.2

3.4

V/μs

Full range

1.7

Vn

Equivalent input noise voltage (see Figure 2)

f = 10 Hz,

RS = 20 Ω

25°C

59

100

nV/√

Hz

f = 1 kHz ,

RS = 20 Ω

43

60

VN(PP)

Peak-to-peak equivalent input noise voltage

f = 0.1 Hz to 10 Hz

25°C

1.1

μV

In

Equivalent input noise current

f = 1 kHz

25°C

1

fA/√

Hz

THD

Total harmonic distortion

AVD = 2,

f = 10 kHz,

25°C

0.025%

VO(PP) = 2 V,

RL = 10 kΩ

B1

Unity-gain bandwidth (see Figure 3)

RL = 10 kΩ,

CL = 100 pF

25°C

1.8

MHz

RL = 100 Ω,

CL = 100 pF

1.3

ts

Settling time

0.1%

25°C

5

μs

0.01%

10

BOM

Maximum output-swing bandwidth

AVD = 1,

RL = 10 kΩ

25°C

140

kHz

m

Phase margin at unity gain (see Figure 3)

RL = 10 kΩ,

CL = 100 pF

25°C

58°

RL = 100 Ω,

CL = 100 pF

75°

² Full range is ± 40°C to 85°C.

14	POST OFFICE BOX 655303 •DALLAS, TEXAS 75265

TLE206x, TLE206xA, TLE206xB, TLE206xY EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE μPOWER OPERATIONAL AMPLIFIERS

SLOS193A ± FEBRUARY 1997 ± REVISED MARCH 1998

TLE2061I electrical characteristics at specified free-air temperature, VCC ± = ±15 V (unless otherwise noted)

					TLE2061I, TLE2061AI
	PARAMETER		TEST CONDITIONS	T ²		TLE2061BI		UNIT
				A
					MIN	TYP	MAX
		TLE2061I		25°C		0.6	3
				Full range			4.3
VIO	Input offset voltage	TLE2061AI		25°C		0.5	1.5	mV
				Full range			2.9
		TLE2061BI		25°C		0.3	0.5
				Full range			1.3
			VIC = 0,
αVIO	Temperature coefficient of input offset			Full range		6		μV/°C
	voltage		RS = 50 Ω
	Input offset voltage long-term drift			25°C		0.04		μV/mo
	(see Note 4)
IIO	Input offset current			25°C		2		pA
				Full range			3	nA
IIB	Input bias current			25°C		4		pA
				Full range			5	nA
VICR	Common-mode input voltage range			25°C	± 11 to 13	± 12 to 16		V
				Full range	± 11 to 13			V
			RL = 10 kΩ	25°C	13.2	13.7
VOM +	Maximum positive peak output voltage swing			Full range	13			V
			RL = 600 Ω	25°C	12.5	13.2
				Full range	12
			RL = 10 kΩ	25°C	±13.2	± 13.7
VOM ±	Maximum negative peak output voltage			Full range	± 13			V
	swing		RL = 600 Ω	25°C	± 12.5	± 13
				Full range	± 12
			VO = ± 10 V,	25°C	30	230
			RL = 10 kΩ	Full range	20
AVD	Large-signal differential voltage amplification		VO = 0 to 8 V,	25°C	25	100		V/mV
				Full range	10
			RL = 600 Ω
			VO = 0 to ± 8 V,	25°C	3	25
			RL = 600 Ω	Full range	01
ri	Input resistance			25°C		1012		Ω
ci	Input capacitance			25°C		4		pF
zo	Open-loop output impedance		IO = 0	25°C		280		Ω
CMRR	Common-mode rejection ratio		VIC = VICRmin,	25°C	72	90		dB
				Full range	65
			RS = 50 Ω
kSVR	Supply-voltage rejection ratio (	VCC± / VIO)	VCC± = ± 5 V to ± 15 V,	25°C	75	93		dB
			RS = 50 Ω	Full range	65
ICC	Supply current			25°C		290	350	μA
			VO = 0,	Full range			375
ICC	Supply-current change over operating		No load	Full range		34		μA
	temperature range

² Full range is ± 40°C to 85°C.

NOTE 4: Typical values are based on the input offset to TA = 25°C using the Arrhenius equation

voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated and assuming an activation energy of 0.96 eV.

POST OFFICE BOX 655303 •DALLAS, TEXAS 75265

15

TLE206x, TLE206xA, TLE206xB, TLE206xY EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE μPOWER OPERATIONAL AMPLIFIERS

SLOS193A ± FEBRUARY 1997 ± REVISED MARCH 1998

TLE2061I operating characteristics at specified free-air temperature, VCC ± = ± 15 V

TLE2061I

PARAMETER

TEST CONDITIONS

T ²

TLE2061AI

UNIT

TLE2061BI

A

MIN

TYP

MAX

SR

Slew rate at unity gain (see Figure 1)

RL = 10 kΩ,

CL = 100 pF

25°C

2.6

3.4

V/μs

Full range

2.1

Vn

Equivalent input noise voltage (see Figure 2)

f = 10 Hz,

RS = 20 Ω

25°C

70

100

nV/√

Hz

f = 1 kHz ,

RS = 20 Ω

40

60

VN(PP)

Peak-to-peak equivalent input noise voltage

f = 0.1 Hz to 10 Hz

25°C

1.1

μV

In

Equivalent input noise current

f = 1 kHz

25°C

1.1

fA/√

Hz

THD

Total harmonic distortion

AVD = 2,

f = 10 kHz,

25°C

0.025%

VO(PP) = 2 V,

RL = 10 kΩ

B1

Unity-gain bandwidth (see Figure 3)

RL = 10 kΩ,

CL = 100 pF

25°C

2

MHz

RL = 600 Ω,

CL = 100 pF

1.5

ts

Settling time

0.1%

25°C

5

μs

0.01%

10

BOM

Maximum output-swing bandwidth

AVD = 1,

RL = 10 kΩ

25°C

40

kHz

m

Phase margin at unity gain (see Figure 3)

RL = 10 kΩ,

CL = 100 pF

25°C

60°

RL = 600 Ω,

CL = 100 pF

70°

² Full range is ± 40°C to 85°C.

16	POST OFFICE BOX 655303 •DALLAS, TEXAS 75265

TLE206x, TLE206xA, TLE206xB, TLE206xY EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE μPOWER OPERATIONAL AMPLIFIERS

SLOS193A ± FEBRUARY 1997 ± REVISED MARCH 1998

TLE2061M electrical characteristics at specified free-air temperature, VCC ± = ±5 V (unless otherwise noted)

						TLE2061M
	PARAMETER		TEST CONDITIONS		T ²	TLE2061AM			UNIT
						TLE2061BM
					A
						MIN	TYP	MAX
		TLE2061M			25°C		0.8	3.1
					Full range			6
VIO	Input offset voltage	TLE2061AM			25°C		0.6	2.6	mV
					Full range			4.6
		TLE2061BM			25°C		0.5	1.9
			VIC = 0,	RS = 50 Ω	Full range			3.1
αVIO	Temperature coefficient of input offset voltage				Full range		6		μV/°C
	Input offset voltage long-term drift (see Note 4)				25°C		0.04		μV/mo
IIO	Input offset current				25°C		1		pA
					Full range			15	nA
IIB	Input bias current				25°C		3		pA
					Full range			30	nA
						± 1.6	± 2
					25°C	to	to		V
VICR	Common-mode input voltage range					4	6
						± 1.6
					Full range	to			V
						4
			RL = 10 kΩ		25°C	3.5	3.7
					Full range	3
VOM +	Maximum positive peak output voltage swing		RL = 600 Ω		25°C	2.5	3.6		V
					Full range	2
			RL = 100 Ω		25°C	2.5	3.1
					Full range	2
			RL = 10 kΩ		25°C	± 3.5	± 3.9
					Full range	± 3
VOM ±	Maximum negative peak	FK and JG	RL = 600 Ω		25°C	± 2.5	± 3.5		V
	output voltage swing	packages			Full range	± 2
		D and P	RL = 100 Ω		25°C	± 2.5	± 2.7
		packages			Full range	± 2
			VO = ± 2.8 V,	RL = 10 kΩ	25°C	15	80
					Full range	2
			VO = 0 to 2.5 V, RL = 600 Ω		25°C	1	65
		FK and JG			Full range	0.5
	Large-signal differential	packages			°	1	16
AVD			VO = 0 to ±2.5 V,RL = 600 Ω		25 C				V/mV
	voltage amplification				Full range	0.5
			VO = 0 to 2 V,	RL = 100 Ω	25°C	0.75	45
		D and P			Full range	0.5
		packages	VO = 0 to ±2 V,	RL = 100 Ω	25°C	0.5	3
					Full range	0.25

² Full range is ± 55°C to 125°C.

NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.

POST OFFICE BOX 655303 •DALLAS, TEXAS 75265

17

TLE206x, TLE206xA, TLE206xB, TLE206xY EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE μPOWER OPERATIONAL AMPLIFIERS

SLOS193A ± FEBRUARY 1997 ± REVISED MARCH 1998

TLE2061M electrical characteristics at specified free-air temperature, VCC ± = ± 5 V (unless otherwise noted) (continued)

						TLE2061M
	PARAMETER		TEST CONDITIONS		T ²	TLE2061AM			UNIT
						TLE2061BM
					A
						MIN	TYP	MAX
ri	Input resistance				25°C		1012		Ω
ci	Input capacitance				25°C		4		pF
zo	Open-loop output impedance		IO = 0		25°C		280		Ω
CMRR	Common-mode rejection ratio		VIC = VICRmin,		25°C	65	82		dB
			RS = 50 Ω		Full range	60
kSVR	Supply-voltage rejection ratio ( VCC ± /	VIO)	VCC ± = ± 5 V to ± 15 V,		25°C	75	93		dB
			RS = 50	Ω
					Full range	65
ICC	Supply current				25°C		280	325	μA
			VO = 0,	No load	Full range			350
ICC	Supply-current change over operating				Full range		39		μA
	temperature range

² Full range is ± 55°C to 125°C.

TLE2061M operating characteristics at specified free-air temperature, VCC ± = ± 5 V, TA = 25°C

				TLE2061M
	PARAMETER	TEST CONDITIONS		TLE2061AM		UNIT
				TLE2061BM
				MIN TYP	MAX
SR	Slew rate at unity gain (see Figure 1)	RL = 10 kΩ,	CL = 100 pF	3.4		V/μs
Vn	Equivalent input noise voltage (see Figure 2)	f = 10 Hz,	RS = 20 Ω	59
						nV/√ Hz
		f = 1 kHz ,	RS = 20 Ω	43
VN(PP)	Peak-to-peak equivalent input noise voltage	f = 0.1 Hz to 10 Hz		1.1		μV
In	Equivalent input noise current	f = 1 kHz		1		fA /√
							Hz
THD	Total harmonic distortion	AVD = 2,	f = 10 kHz,	0.025%
		VO(PP) = 2 V,	RL = 10 kΩ
B1	Unity-gain bandwidth (see Figure 3)	RL = 10 kΩ,	CL = 100 pF	1.8		MHz
		RL = 600 Ω,	CL = 100 pF	1.3
ts	Settling time	0.1%		5		μs
		0.01%		10
BOM	Maximum output-swing bandwidth	AVD = 1,	RL = 10 kΩ	140		kHz
φm	Phase margin at unity gain (see Figure 3)	RL = 10 kΩ,	CL = 100 pF	58°
		RL = 600 Ω,	CL = 100 pF	75°

18	POST OFFICE BOX 655303 •DALLAS, TEXAS 75265

TLE206x, TLE206xA, TLE206xB, TLE206xY EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE μPOWER OPERATIONAL AMPLIFIERS

SLOS193A ± FEBRUARY 1997 ± REVISED MARCH 1998

TLE2061M electrical characteristics at specified free-air temperature, VCC ± = ±15 V (unless otherwise noted)

						TLE2061M ,TLE2061AM
	PARAMETER			TEST CONDITIONS	T ²	TLE2061BM			UNIT
					A
						MIN	TYP	MAX
			TLE2061M		25°C		0.6	3
					Full range			6
VIO	Input offset voltage		TLE2061AM		25°C		0.5	1.5	mV
					Full range			3.6
			TLE2061BM		25°C		0.3	0.5
					Full range			1.7
				VIC = 0,
αVIO	Temperature coefficient of input offset				Full range		6		μV/°C
	voltage			RS = 50 Ω
	Input offset voltage long-term drift				25°C		0.04		μV/mo
	(see Note 4)
IIO	Input offset current				25°C		2		pA
					Full range			20	nA
IIB	Input bias current				25°C		4		pA
					Full range			40	nA
VICR	Common-mode input voltage range				25°C	± 11 to 13	± 12 to 16		V
					Full range	± 11 to 13			V
				RL = 10 kΩ	25°C	13	13.7
VOM +	Maximum positive peak output voltage				Full range	12.5			V
	swing			RL = 600 Ω	25°C	12.5	13.2
					Full range	12
				RL = 10 kΩ	25°C	± 13	± 13.7
VOM ±	Maximum negative peak output voltage				Full range	± 12.5			V
	swing			RL = 600 Ω	25°C	± 12.5	± 13
					Full range	± 12
				VO = ± 10 V,	25°C	30	230
				RL = 10 kΩ	Full range	20
AVD	Large-signal differential voltage			VO = 0 to 8 V,	25°C	25	100		V/mV
	amplification			RL = 600 Ω	Full range	7
				VO = 0 to ± 8 V,	25°C	3	25
				RL = 600 Ω	Full range	1
ri	Input resistance				25°C		1012		Ω
ci	Input capacitance				25°C		4		pF
zo	Open-loop output impedance			IO = 0	25°C		280		Ω
CMRR	Common-mode rejection ratio			VIC = VICRmin,	25°C	72	90		dB
					Full range	65
				RS = 50 Ω
kSVR	Supply-voltage rejection ratio			VCC ± = ± 5 V to ± 15 V,	25°C	75	93		dB
	( VCC ± / VIO)			RS = 50 Ω	Full range	65

² Full range is ± 55°C to 125°C.

NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.

POST OFFICE BOX 655303 •DALLAS, TEXAS 75265

19

TLE206x, TLE206xA, TLE206xB, TLE206xY EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE μPOWER OPERATIONAL AMPLIFIERS

SLOS193A ± FEBRUARY 1997 ± REVISED MARCH 1998

TLE2061M electrical characteristics at specified free-air temperature, VCC ± = ± 15 V (unless otherwise noted) (continue)

				TLE2061M ,TLE2061AM
	PARAMETER	TEST CONDITIONS	T ²		TLE2061BM		UNIT
			A
				MIN	TYP	MAX
ICC	Supply current		25°C		290	350	μA
		VO = 0, No load	Full range			375
ICC	Supply-current change over operating		Full range		46		μA
	temperature range

² Full range is ± 55°C to 125°C.

TLE2061M operating characteristics at specified free-air temperature, VCC ± = ± 15 V

						TLE2061M
	PARAMETER	TEST CONDITIONS		T ²	TLE2061AM			UNIT
					TLE2061BM
				A
					MIN	TYP	MAX
SR	Slew rate at unity gain (see Figure 1)	RL = 10 kΩ,	CL = 100 pF	25°C	2	3.4		V/μs
				Full range	1.8
Vn	Equivalent input noise voltage (see Figure 2)	f = 10 Hz,	RS = 20 Ω	25°C		70
								nV/√ Hz
		f = 1 kHz,	RS = 20 Ω	25°C		40
VN(PP)	Peak-to-peak equivalent input noise voltage	f = 0.1 Hz to 10 Hz		25°C		1.1		μV
In	Equivalent input noise current	f = 1 kHz		25°C		1.1		fA /√
										Hz
THD	Total harmonic distortion	AVD = 2,	f = 10 kHz,	25°C		0.025%
		VO(PP) = 2 V,	RL = 10 kΩ
B1	Unity-gain bandwidth (see Figure 3)	RL = 10 kΩ,	CL = 100 pF	25°C		2		MHz
		RL = 600 Ω,	CL = 100 pF	25°C		1.5
ts	Settling time	0.1%		25°C		5		μs
		0.01%		25°C		10
BOM	Maximum output-swing bandwidth	AVD = 1,	RL = 10 kΩ	25°C		40		kHz
φm	Phase margin at unity gain (see Figure 3)	RL = 10 kΩ,	CL = 100 pF	25°C		60°
		RL = 600 Ω,	CL = 100 pF	25°C		70°

² Full range is ± 55°C to 125°C.

20	POST OFFICE BOX 655303 •DALLAS, TEXAS 75265

TLE206x, TLE206xA, TLE206xB, TLE206xY EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE μPOWER OPERATIONAL AMPLIFIERS

SLOS193A ± FEBRUARY 1997 ± REVISED MARCH 1998

TLE2061Y electrical characteristics at VCC ± = ± 15 V, TA = 25°C (unless otherwise noted)

	PARAMETER	TEST CONDITIONS		TLE2061Y			UNIT
				MIN	TYP	MAX
VIO	Input offset voltage				0.6	3	mV
αVIO	Input offset voltage long-term drift (see Note 4)	VIC = 0,	RS = 50 Ω		0.04		μV/mo
IIO	Input offset current				2		pA
IIB	Input bias current				4		pA
				± 11	± 12
VICR	Common-mode input voltage range			to	to		V
				13	16
VOM +	Maximum positive peak output voltage swing	RL = 10 kΩ		13.2	13.7		V
		RL = 600 Ω		12.5	13.2
VOM ±	Maximum negative peak output voltage swing	RL = 10 kΩ		± 13.2	± 13.7		V
		RL = 600 Ω		± 12.5	± 13
		VO = ± 10 V,	RL = 10 kΩ	30	230
AVD	Large-signal differential voltage amplification	VO = 0 to 8 V,	RL = 600 Ω	25	100		V/mV
		VO = 0 to ± 8 V, RL = 600 Ω		3	25
ri	Input resistance				1012		Ω
ci	Input capacitance				4		pF
zo	Open-loop output impedance	IO = 0			280		Ω
CMRR	Common-mode rejection ratio	RS = 50 Ω,	VIC = VICRmin	72	90		dB
		VCC ± = ± 5 V to ± 15 V,
kSVR	Supply-voltage rejection ratio ( VCC / VIO)	RS = 50 Ω		75	93		dB
ICC	Supply current	VO = 0,	No load		290	350	μA

NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.

TLE2061Y operating characteristics at VCC ± = ± 15 V, TA = 25°C

	PARAMETER	TEST CONDITIONS			TLE2061Y		UNIT
				MIN	TYP	MAX
SR	Slew rate at unity gain (see Figure 1)	RL = 10 kΩ,	CL = 100 pF	2.6	3.4		V/μs
Vn	Equivalent input noise voltage (see Figure 2)	f = 10 Hz,	RS = 20 Ω		70
							nV/√ Hz
		f = 1 kHz ,	RS = 20 Ω		40
VN(PP)	Peak-to-peak equivalent input noise voltage	f = 0.1 Hz to 10 Hz			1.1		μV
In	Equivalent input noise current	f = 1 Hz			1.1		fA /√
									Hz
THD	Total harmonic distortion	AVD = 2,	f = 10 kHz,		0.025%
		VO(PP) = 2 V,	RL = 10 kΩ
B1	Unity-gain bandwidth (see Figure 3)	RL = 10 kΩ,	CL = 100 pF		2		MHz
		RL = 600 Ω,	CL = 100 pF		1.5
ts	Settling time	0.1%			5		μs
		0.01%			10
BOM	Maximum output-swing bandwidth	AVD = 1,	RL = 10 kΩ		40		kHz
φm	Phase margin at unity gain (see Figure 3)	RL = 10 kΩ,	CL = 100 pF		60°
		RL = 600 Ω,	CL = 100 pF		70°

POST OFFICE BOX 655303 •DALLAS, TEXAS 75265

21