Texas Instruments TLC542IFN, TLC542IDW, TLC542CN, TLC542IN, TLC542CDW Datasheet

TLC542C, TLC542I

8-BIT ANALOG-TO-DIGITAL CONVERTERS

WITH SERIAL CONTROL AND 11 INPUTS

SLAS075B ± FEBRUARY 1989 ± REVISED JULY 2000

D 8-Bit Resolution A/D Converter

DW OR N PACKAGE

D Microprocessor Peripheral or Stand-Alone

(TOP VIEW)

Operation

INPUT A0

1

20

VCC

D On-Chip 12-Channel Analog Multiplexer

INPUT A1

2

19

EOC

Built-In Self-Test Mode

D

INPUT A2

3

18

I/O CLOCK

D Software-Controllable Sample and Hold

INPUT A3

4

17

ADDRESS INPUT

INPUT A4

DATA OUT

D

Total Unadjusted Error . . . ± 0.5 LSB Max

5

16

D

Direct Replacement for Motorola

INPUT A5

6

15

CS

INPUT A6

7

14

REF+

MC145041

INPUT A7

8

13

REF±

On-Board System Clock

D

INPUT A8

9

12

INPUT A10

D

End-of-Conversion (EOC) Output

GND

10

11

INPUT A9

D Pinout and Control Signals Compatible

With the TLC1542/3 10-Bit A/D Converters

FN PACKAGE

CMOS Technology

D

(TOP VIEW)

A2

A1

A0

PARAMETER

VALUE

INPUT

INPUT

INPUT

Channel Acquisition/Sample Time

16 µs

CC

EOC

Conversion Time (Max)

20 µs

V

Samples per Second (Max)

25 × 103

INPUT A3

3

2

1

20 19

I/O CLOCK

Power Dissipation (Max)

10 mW

4

18

INPUT A4

5

17

ADDRESS INPU

description

INPUT A5

16

DATA OUT

6

The TLC542 is a CMOS converter built around an

INPUT A6

7

15

CS

INPUT A7

8

14

REF+

8-bit switched-capacitor successive-approximation

9

10 11 12 13

analog-to-digital converter. The device is designed

INPUT A8

GND

INPUT A9

INPUT A10

REF±

for serial interface to a microprocessor or peripheral

via a 3-state output with three inputs [including I/O

CLOCK,

CS

(chip select), and ADDRESS INPUT].

The TLC542 allows high-speed data transfers and

sample rates of up to 40,000 samples per second. In addition to the high-speed converter and versatile control

logic, an on-chip 12-channel analog multiplexer can sample any one of 11 inputs or an internal self-test voltage,

and the sample and hold is

started under microprocessor control. At

the

end

of

conversion, the

end-of-conversion (EOC) output pin goes high to indicate that conversion is complete. Detailed information on interfacing to most popular microprocessors is readily available from the factory.

The converter incorporated in the TLC542 features differential high-impedance reference inputs that facilitate ratiometric conversion, scaling, and isolation of analog circuitry from logic and supply noises. A switchedcapacitor design allows low-error (± 0.5 LSB) conversion in 20 s over the full operating temperature range.

AVAILABLE OPTIONS

		PACKAGE
TA
	CHIP CARRIER	PLASTIC DIP	SMALL OUTLINE
	(FN)	(N)	(DW)
0°C to 70°C	Ð	TLC542CN	TLC542CDW
± 40°C to 85°C	TLC542IFN	TLC542IN	TLC542IDW

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

Copyright 2000, Texas Instruments Incorporated

POST OFFICE BOX 655303 •DALLAS, TEXAS 75265

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TLC542C, TLC542I

8-BIT ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL CONTROL AND 11 INPUTS

SLAS075B ± FEBRUARY 1989 ± REVISED JULY 2000

description (continued)

The TLC542C is characterized for operation from 0°C to 70°C and the TLC542I is characterized for operation from ±40°C to 85°C.

functional block diagram
			REF+	REF±
		Sample and	8-Bit
		Hold	Analog-to-Digital
			Converter
			(Switched-Capacitors)
Analog	12-Channel		8
	Analog
Inputs
	Multiplexer
			Output	8	8-to-1 Data	DATA
			Data		Selector and
						OUT
	4	Input Address	Register		Driver
		Register
					4
	Self-Test	4	Control Logic
	Reference
			and I/O
			Counters
ADDRESS		Input	2
		Multiplexer
INPUT
I/O CLOCK
CS
EOC

typical equivalent inputs

INPUT CIRCUIT IMPEDANCE DURING SAMPLING MODE

INPUT CIRCUIT IMPEDANCE DURING HOLD MODE

1 kΩ TYP

INPUT A0 ± A10

		INPUT
	Ci = 60 pF TYP	A0 ± A10
		5 MΩ TYP
	(equivalent input
	capacitance)

2	POST OFFICE BOX 655303 •DALLAS, TEXAS 75265

TLC542C, TLC542I 8-BIT ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL CONTROL AND 11 INPUTS

SLAS075B ± FEBRUARY 1989 ± REVISED JULY 2000

operating sequence

1	2	3	4	5	6	7	8	1	2	3	4	5	6	7	8

	I/O	Don't Care
	CLOCK

t

Access

tacq

t

c(1)

Access

t

Cycle B

Cycle C

su(A)

(acq)

tsu(CS)

(see Note A)

12 Internal System Clocks ≤ 12 µs

CS

MSB

LSB

Don't Care

MSB

LSB

Don't Care

ADDRESS

B3

B2

B1

B0

C3

C2

C1

C0

INPUT

Hi-Z

Hi-Z State

DATA

State

A7

A6

A5

A4

A3

A2

A1

A0

B7

B6

B5

B4

B3

B2

B1

B0

OUT

See Note B

Previous Conversion Data A

Conversion Data B

MSB

LSB

MSB

LSB

(see Note B)

td(I/O±EOC)

td(EOC±DATA)

EOC

tc(2)

NOTES: A. To minimize errors caused by noise at the chip select input, the internal circuitry waits for two rising edges and one falling edge

of the internal system clock after CS↓ before responding to control input signals. The CS setup time is given by the tsu(CS) specifications. Therefore, no attempt should be made to clock-in an address until the minimum chip select setup time has elapsed.

B. The output becomes 3-state on CS going high or on the negative edge of the eighth I/O clock.

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)²

Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . . . . . . . . . . . 6.5	V
Input voltage range (any input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	±0.3 V to VCC + 0.3	V
Output voltage range, VO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	±0.3 V to VCC + 0.3	V
Peak input current range (any input), Ip-p) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . . . . . . . . . ±20 mA
Peak total input current (all inputs), IP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . . . . . . . . . ±30 mA
Operating free-air temperature range: TLC542C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . . . . . 0°C to 70°C
TLC542l . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . . . ±40°C to 85°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . . ±65°C to 150°C
Case temperature for 10 seconds, TC: FN package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . . . . . . . . . . 260°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: DW or N package .	. . . . . . . . . . . . . 260°C

²Stresses beyond those listed under ªabsolute maximum ratingsº may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under ªrecommended operating conditionsº is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTE 1: All voltage values are with respect to digital ground with REF± and GND wired together (unless otherwise noted).

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