Texas Instruments SN74ABT863DBLE, SN74ABT863DBR, SN74ABT863DW, SN74ABT863DWR, SN74ABT863NT Datasheet
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SN54ABT863, SN74ABT863 |
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9-BIT BUS TRANSCEIVERS |
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WITH 3-STATE OUTPUTS |
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SCBS201E ± FEBRUARY 1991 ± REVISED JULY 1998 |
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D |
State-of-the-Art EPIC- |
ΙΙ |
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BiCMOS Design |
SN54ABT863 . . . JT PACKAGE |
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B |
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SN74ABT863 . . . DB, DW, NT, OR PW PACKAGE |
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Significantly Reduces Power Dissipation |
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D Typical VOLP (Output Ground Bounce) < 1 V |
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(TOP VIEW) |
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at VCC = 5 V, TA = 25°C |
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OEBA1 |
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1 |
24 |
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VCC |
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D High-Impedance State During Power Up |
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A1 |
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2 |
23 |
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B1 |
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and Power Down |
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A2 |
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3 |
22 |
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B2 |
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D High-Drive Outputs (±32-mA IOH, 64-mA IOL) |
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A3 |
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4 |
21 |
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B3 |
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A4 |
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5 |
20 |
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B4 |
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D Latch-Up Performance Exceeds 500 mA Per |
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A5 |
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6 |
19 |
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B5 |
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JESD 17 |
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A6 |
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7 |
18 |
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B6 |
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D ESD Protection Exceeds 2000 V Per |
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A7 |
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8 |
17 |
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B7 |
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MIL-STD-883, Method 3015; Exceeds 200 V |
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A8 |
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9 |
16 |
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B8 |
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Using Machine Model (C = 200 pF, R = 0) |
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A9 |
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10 |
15 |
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B9 |
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D Package Options Include Plastic |
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OEBA2 |
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11 |
14 |
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OEAB2 |
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Small-Outline (DW), Shrink Small-Outline |
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GND |
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12 |
13 |
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OEAB1 |
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(DB) Packages, and Thin Shrink |
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Small-Outline (PW), Ceramic Chip Carriers |
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(FK), Plastic (NT), and Ceramic (JT) DIPs |
SN54ABT863 . . . FK PACKAGE |
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(TOP VIEW) |
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description
The 'ABT863 devices are 9-bit transceivers designed for asynchronous communication between data buses. The control-function implementation allows for maximum flexibility in timing.
These devices allow noninverted data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic
levels at the output-enable (OEAB and OEBA) inputs.
The outputs are in the high-impedance state during power up and power down. The outputs remain in the high-impedance state while the device is powered down.
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A2 |
A1 |
OEBA1 |
NC |
CC |
B1 |
B2 |
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V |
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4 |
3 |
2 |
1 |
28 27 26 |
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A3 |
5 |
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25 |
B3 |
A4 |
6 |
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24 |
B4 |
A5 |
7 |
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21 |
B5 |
NC |
8 |
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22 |
NC |
A6 |
9 |
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21 |
B6 |
A7 |
10 |
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20 |
B7 |
A8 |
11 |
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19 |
B8 |
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12 13 14 15 16 17 18 |
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A9 |
OEBA2 |
GND |
NC |
OEAB1 |
OEAB2 |
B9 |
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NC ± No internal connection
When VCC is between 0 and 2.1 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 2.1 V, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
The SN54ABT863 is characterized for operation over the full military temperature range of ±55°C to 125°C. The SN74ABT863 is characterized for operation from ±40°C to 85°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC-ΙΙB is a trademark of Texas Instruments Incorporated.
UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright 1998, Texas Instruments Incorporated
POST OFFICE BOX 655303 •DALLAS, TEXAS 75265 |
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SN54ABT863, SN74ABT863 9-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
SCBS201E ± FEBRUARY 1991 ± REVISED JULY 1998
FUNCTION TABLE
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INPUTS |
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OPERATION |
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OEAB1 |
OEAB2 |
OEBA1 |
OEBA2 |
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L |
L |
L |
L |
Latch A and B |
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L |
L |
H |
X |
A to B |
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L |
L |
X |
H |
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H |
X |
L |
L |
B to A |
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X |
H |
L |
L |
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H |
X |
H |
X |
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H |
X |
X |
H |
Isolation |
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X |
H |
X |
H |
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X |
H |
H |
X |
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logic symbol²
1 |
& |
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OEBA1 |
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EN1 |
11 |
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OEBA2 |
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13 |
& |
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OEAB1 |
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EN2 |
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14 |
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OEAB2 |
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2 |
1 |
1 |
23 |
A1 |
B1 |
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3 |
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1 |
2 |
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22 |
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A2 |
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B2 |
4 |
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21 |
A3 |
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B3 |
5 |
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20 |
A4 |
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B4 |
6 |
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19 |
A5 |
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B5 |
7 |
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18 |
A6 |
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B6 |
2 |
POST OFFICE BOX 655303 •DALLAS, TEXAS 75265 |
SN54ABT863, SN74ABT863 9-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
SCBS201E ± FEBRUARY 1991 ± REVISED JULY 1998
logic diagram (positive logic)
1 OEBA1 
11
OEBA2
13 OEAB1 
14
OEAB2
2 |
23 |
A1 |
B1 |
To Eight Other Channels
Pin numbers shown are for the DB, DW, JT, NT, and PW packages.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)²
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. ±0.5 V to 7 |
V |
Input voltage range, VI (except I/O ports) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. ±0.5 V to 7 |
V |
Voltage range applied to any output in the high or power-off state, VO . . . . . . . . . . . . . . . . . . . |
±0.5 V to 5.5 |
V |
Current into any output in the low state, IO: SN54ABT863 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . . . . 96 mA |
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SN74ABT863 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . . . 128 mA |
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Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . . . ±18 mA |
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Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . . . ±50 mA |
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Package thermal impedance, θJA (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . . 104°C/W |
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DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . . . 81°C/W |
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NT package . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . . . 67°C/W |
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PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . . 120°C/W |
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Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
±65°C to 150°C |
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²Stresses beyond those listed under ªabsolute maximum ratingsº may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under ªrecommended operating conditionsº is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2.The package thermal impedance is calculated in accordance with JESD 51, except for through-hole packages, which use a trace length of zero.
POST OFFICE BOX 655303 •DALLAS, TEXAS 75265 |
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