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SN54ACT32, SN74ACT32 |
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QUADRUPLE 2-INPUT POSITIVE-OR GATES |
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SCAS530A ± AUGUST 1995 ± REVISED MAY 1996 |
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D Inputs Are TTL-Voltage Compatible |
SN54ACT32 . . . J OR W PACKAGE |
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D EPIC (Enhanced-Performance Implanted |
SN74ACT32 . . . D, DB, N, OR PW PACKAGE |
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(TOP VIEW) |
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CMOS) 1- m Process |
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D Package Options Include Plastic |
1A |
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1 |
14 |
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VCC |
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Small-Outline (D), Shrink Small-Outline |
1B |
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2 |
13 |
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4B |
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(DB), and Thin Shrink Small-Outline (PW) |
1Y |
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3 |
12 |
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4A |
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Packages, Ceramic Chip Carriers (FK) and |
2A |
4 |
11 |
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4Y |
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Flatpacks (W), and Standard Plastic (N) and |
2B |
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3B |
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5 |
10 |
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Ceramic (J) DIPS |
2Y |
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3A |
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6 |
9 |
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GND |
7 |
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3Y |
description
The 'ACT32 are quadruple 2-input positive-OR gates. The devices perform the Boolean function Y = A + B or Y = A •B in positive logic.
The SN54ACT32 is characterized for operation over the full military temperature range of ±55°C to 125°C. The SN74ACT32 is characterized for operation from ±40°C to 85°C.
FUNCTION TABLE (EACH GATE)
INPUTS |
OUTPUT |
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A |
B |
Y |
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H |
X |
H |
X |
H |
H |
L |
L |
L |
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SN54ACT32 . . . FK PACKAGE
(TOP VIEW)
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1B |
1A |
NC |
CC |
4B |
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V |
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1Y |
3 |
2 |
1 |
20 19 |
4A |
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4 |
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18 |
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NC |
5 |
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17 |
NC |
2A |
6 |
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16 |
4Y |
NC |
7 |
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15 |
NC |
2B |
8 |
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14 |
3B |
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9 |
10 11 12 13 |
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2Y |
GND |
NC |
3Y |
3A |
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NC ± No internal connection
logic symbol² |
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logic diagram (positive logic) |
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1 |
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1A |
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≥ 1 |
3 |
1Y |
A |
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2 |
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Y |
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1B |
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B |
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4 |
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2A |
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6 |
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5 |
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2Y |
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2B |
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9 |
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3A |
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8 |
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10 |
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3Y |
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3B |
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12 |
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4A |
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11 |
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13 |
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4Y |
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4B |
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²This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the D, DB, J, N, PW, and W packages.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC is a trademark of Texas Instruments Incorporated.
UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright 1996, Texas Instruments Incorporated
POST OFFICE BOX 655303 •DALLAS, TEXAS 75265 |
1 |
SN54ACT32, SN74ACT32
QUADRUPLE 2-INPUT POSITIVE-OR GATES
SCAS530A ± AUGUST 1995 ± REVISED MAY 1996
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)²
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . . . . ±0.5 V to 7 |
V |
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
±0.5 V to VCC + 0.5 |
V |
Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
±0.5 V to VCC + 0.5 |
V |
Input clamp current, IIK (VI < 0 or VI > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . . . . . . . . ±20 mA |
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Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . . . . . . . . ±20 mA |
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Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . . . . . . . . ±50 mA |
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Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . . . . . . . ±200 mA |
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Maximum power dissipation at TA = 55°C (in still air) (see Note 2): D package . . . . . . . |
. . . . . . . . . . . . 1.25 W |
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DB package . . . . . . |
. . . . . . . . . . . . . 0.5 W |
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N package . . . . . . . |
. . . . . . . . . . . . . 1.1 W |
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PW package . . . . . . |
. . . . . . . . . . . . . 0.5 W |
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Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . ±65°C to 150°C |
²Stresses beyond those listed under ªabsolute maximum ratingsº may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under ªrecommended operating conditionsº is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2.The maximum package power dissipation is calculated using a junction temperature of 150°C and a board trace length of 750 mils, except for the N package, which has a trace length of zero.
recommended operating conditions (see Note 3)
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SN54ACT32 |
SN74ACT32 |
UNIT |
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MIN |
MAX |
MIN |
MAX |
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VCC |
Supply voltage |
4.5 |
5.5 |
4.5 |
5.5 |
V |
VIH |
High-level input voltage |
2 |
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2 |
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V |
VIL |
Low-level input voltage |
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0.8 |
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0.8 |
V |
VI |
Input voltage |
0 |
VCC |
0 |
VCC |
V |
VO |
Output voltage |
0 |
VCC |
0 |
VCC |
V |
IOH |
High-level output current |
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±24 |
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±24 |
mA |
IOL |
Low-level output current |
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24 |
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24 |
mA |
t/ v |
Input transition rise or fall rate |
0 |
8 |
0 |
8 |
ns/V |
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TA |
Operating free-air temperature |
±55 |
125 |
±40 |
85 |
°C |
NOTE 3: Unused inputs must be held high or low to prevent them from floating.
PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice.
2 |
POST OFFICE BOX 655303 •DALLAS, TEXAS 75265 |