Texas Instruments SN74ABT640DBLE, SN74ABT640DBR, SN74ABT640DW, SN74ABT640DWR, SN74ABT640N Datasheet

	SN54ABT640, SN74ABT640
	OCTAL BUS TRANSCEIVERS
			WITH 3-STATE OUTPUTS
	SCBS104C ± FEBRUARY 1991 ± REVISED JANUARY 1997
D State-of-the-Art EPIC-ΙΙB BiCMOS Design	SN54ABT640 . . . J PACKAGE
Significantly Reduces Power Dissipation	SN74ABT640 . . . DB, DW, N, OR PW PACKAGE
D ESD Protection Exceeds 2000 V Per		(TOP VIEW)
MIL-STD-883, Method 3015; Exceeds 200 V	DIR		1	20	VCC
Using Machine Model (C = 200 pF, R = 0)
	A1
			2	19	OE
D Latch-Up Performance Exceeds 500 mA Per
	A2		3	18	B1
JEDEC Standard JESD-17	A3		4	17	B2
D Typical VOLP (Output Ground Bounce) < 1 V	A4		5	16	B3
at VCC = 5 V, TA = 25°C	A5		6	15	B4
	A6				B5
D High-Drive Outputs (±32-mA IOH,			7	14
	A7		8	13	B6
64-mA IOL )
	A8		9	12	B7
D Package Options Include Plastic
	GND		10	11	B8
Small-Outline (DW), Shrink Small-Outline
(DB), and Thin Shrink Small-Outline (PW)
Packages, Ceramic Chip Carriers (FK), and	SN54ABT640 . . . FK PACKAGE
Plastic (N) and Ceramic (J) DIPs		(TOP VIEW)

description

The 'ABT640 bus transceivers are designed for asynchronous communication between data buses. These devices transmit inverted data from the A bus to the B bus or from the B bus to the A bus, depending on the level at the directioncontrol (DIR) input. The output-enable (OE) input can be used to disable the device so that the buses are effectively isolated.

To ensure the high-impedance state during power

up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of

the resistor is determined by the current-sinking capability of the driver.

	A2	A1	DIR	CC	OE
				V
A3	3	2	1	20 19		B1
	4				18
A4	5				17	B2
A5	6				16	B3
A6	7				15	B4
A7	8				14	B5
	9	10 11 12 13
	A8	GND	B8	B7	B6

The SN54ABT640 is characterized for operation over the full military temperature range of ±55°C to 125°C. The SN74ABT640 is characterized for operation from ±40°C to 85°C.

FUNCTION TABLE

	INPUTS			OPERATION
	OE	DIR
	L	L				data to A bus
				B
	L	H
				A		data to B bus
	H	X				Isolation

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

EPIC-ΙΙB is a trademark of Texas Instruments Incorporated.

UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

Copyright 1997, Texas Instruments Incorporated

POST OFFICE BOX 655303 •DALLAS, TEXAS 75265

1

SN54ABT640, SN74ABT640

OCTAL BUS TRANSCEIVERS

WITH 3-STATE OUTPUTS

SCBS104C ± FEBRUARY 1991 ± REVISED JANUARY 1997

logic symbol²

			19				G3
	OE
			1
DIR							3 EN1 [BA]
							3 EN2 [AB]

A1	2	1	18
	1		B1
	3	1	2
A2			17
	4		B2
A3			16
	5		B3
A4			15
			B4
A5	6		14
	7		B5
A6			13
	8		B6
A7			12
	9		B7
A8			11
			B8

² This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.

logic diagram (positive logic)

OE	19
DIR	1
A1	2	18
		B1

To Seven Other Transceivers

2	POST OFFICE BOX 655303 •DALLAS, TEXAS 75265