Texas Instruments SN74ABT241ADBLE, SN74ABT241ADBR, SN74ABT241ADW, SN74ABT241AN, SN74ABT241APWLE Datasheet

		SN54ABT241, SN74ABT241A
		OCTAL BUFFERS/DRIVERS
					WITH 3-STATE OUTPUTS
	SCBS184D ± JANUARY 1991 ± REVISED JANUARY 1997
D State-of-the-Art EPIC-ΙΙB BiCMOS Design	SN54ABT241 . . . J OR W PACKAGE
Significantly Reduces Power Dissipation	SN74ABT241A . . . DB, DW, N, OR PW PACKAGE
D Latch-Up Performance Exceeds 500 mA Per				(TOP VIEW)
JEDEC Standard JESD-17								VCC
	1OE				1	20
D ESD Protection Exceeds 2000 V Per
	1A1				2	19		2OE
MIL-STD-883, Method 3015; Exceeds 200 V	2Y4				3	18		1Y1
Using Machine Model (C = 200 pF, R = 0)	1A2				4	17		2A4
D Typical VOLP (Output Ground Bounce) < 1 V	2Y3				5	16		1Y2
at VCC = 5 V, TA = 25°C	1A3				6	15		2A3
	2Y2							1Y3
D High-Drive Outputs (±32-mA IOH, 64-mA IOL)					7	14
	1A4				8	13		2A2
D Package Options Include Plastic
	2Y1				9	12		1Y4
Small-Outline (DW), Shrink Small-Outline
	GND				10	11		2A1
(DB), and Thin Shrink Small-Outline (PW)
Packages, Ceramic Chip Carriers (FK),
Plastic (N) and Ceramic (J) DIPs, and	SN54ABT241 . . . FK PACKAGE
Ceramic Flat (W) Package				(TOP VIEW)

description

These octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. Together with the SN54ABT240, SN74ABT240A, and 'ABT244A, these devices provide the choice of selected combinations of inverting and noninverting outputs, symmetrical active-low output-enable (OE) inputs, and

complementary OE and OE inputs.

	2Y4	1A1	1OE	CC	2OE
				V
1A2	3	2	1	20 19		1Y1
	4				18
2Y3	5				17	2A4
1A3	6				16	1Y2
2Y2	7				15	2A3
1A4	8				14	1Y3
	9	10 11 12 13
	2Y1	GND	2A1	1Y4	2A2

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.

The SN54ABT241 is characterized for operation over the full military temperature range of ±55°C to 125°C. The SN74ABT241A is characterized for operation from ±40°C to 85°C.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

EPIC-ΙΙB is a trademark of Texas Instruments Incorporated.

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

Copyright 1997, Texas Instruments Incorporated

POST OFFICE BOX 655303 •DALLAS, TEXAS 75265

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SN54ABT241, SN74ABT241A

OCTAL BUFFERS/DRIVERS

WITH 3-STATE OUTPUTS

SCBS184D ± JANUARY 1991 ± REVISED JANUARY 1997

FUNCTION TABLES

	INPUTS		OUTPUT
		1A	1Y
1OE
	L	H	H
	L	L	L
	H	X	Z

INPUTS		OUTPUT
2OE	2A	2Y
H	H	H
H	L	L
L	X	Z

logic symbol²

			1						19
1OE
				EN					2OE		EN			9
			2				18		11						2Y1
1A1								1Y1	2A1
			4				16		13					7
1A2								1Y2	2A2						2Y2
			6				14		15					5
1A3								1Y3	2A3						2Y3
			8				12		17					3
1A4								1Y4	2A4						2Y4

² This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.

logic diagram (positive logic)

1		19
1OE		2OE
2	18	11	9
1A1	1Y1	2A1	2Y1
4	16	13	7
1A2	1Y2	2A2	2Y2
6	14	15	5
1A3	1Y3	2A3	2Y3
8	12	17	3
1A4	1Y4	2A4	2Y4

2	POST OFFICE BOX 655303 •DALLAS, TEXAS 75265

SN54ABT241, SN74ABT241A

OCTAL BUFFERS/DRIVERS

WITH 3-STATE OUTPUTS

SCBS184D ± JANUARY 1991 ± REVISED JANUARY 1997

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)²

Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. ±0.5 V to 7	V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. ±0.5 V to 7	V
Voltage range applied to any output in the high or power-off state, VO . . . . . . . . . . . . . . . . . . .	±0.5 V to 5.5	V
Current into any output in the low state, IO: SN54ABT241 . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . . . . 96 mA
SN74ABT241A . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . . . 128 mA
Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . . . ±18 mA
Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . . . ±50 mA
Package thermal impedance, θJA (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . . 115°C/W
DW package . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . . . 97°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . . . 67°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . . 128°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	±65°C to 150°C

²Stresses beyond those listed under ªabsolute maximum ratingsº may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under ªrecommended operating conditionsº is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.

2.The package thermal impedance is calculated in accordance with EIA/JEDEC Std JESD51, except for through-hole packages, which use a trace length of zero.

recommended operating conditions (see Note 3)

			SN54ABT241		SN74ABT241A		UNIT
			MIN	MAX	MIN	MAX
VCC	Supply voltage		4.5	5.5	4.5	5.5	V
VIH	High-level input voltage		2		2		V
VIL	Low-level input voltage			0.8		0.8	V
VI	Input voltage		0	VCC	0	VCC	V
IOH	High-level output current			±24		±32	mA
IOL	Low-level output current			48		64	mA
t/ v	Input transition rise or fall rate	Outputs enabled		5		5	ns/V
TA	Operating free-air temperature		±55	125	±40	85	°C

NOTE 3: Unused inputs must be held high or low to prevent them from floating.

POST OFFICE BOX 655303 •DALLAS, TEXAS 75265

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