Texas Instruments SN74ABT620DWR, SN74ABT620N, SN74ABT620DBLE, SN74ABT620DBR, SN74ABT620DW Datasheet

SN54ABT620, SN74ABT620

OCTAL BUS TRANSCEIVERS

WITH 3-STATE OUTPUTS

SCBS113D ± FEBRUARY 1991 ± REVISED APRIL 1998

D

State-of-the-Art EPIC-

ΙΙ

BiCMOS Design

SN54ABT620 . . . J PACKAGE

B

SN74ABT620 . . . DB, DW, N, OR PW PACKAGE

Significantly Reduces Power Dissipation

D ESD Protection Exceeds 2000 V Per

(TOP VIEW)

MIL-STD-883, Method 3015; Exceeds 200 V

OEAB

1

20

VCC

Using Machine Model (C = 200 pF, R = 0)

A1

2

19

OEBA

D Latch-Up Performance Exceeds 500 mA Per

A2

3

18

B1

JESD 17

A3

4

17

B2

D Typical VOLP (Output Ground Bounce) < 1 V

A4

5

16

B3

at VCC = 5 V, TA = 25°C

A5

6

15

B4

D High-Drive Outputs (±32-mA IOH,

A6

7

14

B5

A7

B6

8

13

64-mA IOL )

A8

B7

9

12

D Package Options Include Plastic					GND	10		11	B8
Small-Outline (DW), Shrink Small-Outline
(DB), and Thin Shrink Small-Outline (PW)				SN54ABT620 . . . FK PACKAGE
Packages, Ceramic Chip Carriers (FK), and
Plastic (N) and Ceramic (J) DIPs					(TOP VIEW)
					A2	A1	OEAB		OEBA
description								V
								CC
These octal bus transceivers provide for				A3	3	2	1	20 19		B1
asynchronous	communication	between	data		4				18
buses. The control-function		implementation		A4	5				17	B2
				A5	6				16	B3
allows for maximum flexibility in timing. The
'ABT620 devices provide inverted data at the				A6	7				15	B4
outputs.				A7	8				14	B5
					9	10 11 12 13
These devices allow data transmission from the					A8	GND	B8	B7	B6
A bus to the B bus or from the B bus to the A bus,
depending on the logic levels at the output-enable
(OEAB and OEBA) inputs.

The output-enable inputs can be used to disable the device so that the buses are effectively isolated. The dual-enable configuration gives the transceivers the capability of storing data by simultaneously enabling OEAB and OEBA. When both OEAB and OEBA are enabled and all other data sources to the two sets of bus lines are at high impedance, both sets of bus lines (16 total) remain at their last states. In this way, each output reinforces its input in this configuration.

To ensure the high-impedance state during power up or power down, OEBA should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. OEAB should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.

The SN54ABT620 is characterized for operation over the full military temperature range of ±55°C to 125°C. The SN74ABT620 is characterized for operation from ±40°C to 85°C.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

EPIC-ΙΙB is a trademark of Texas Instruments Incorporated.

UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

Copyright 1998, Texas Instruments Incorporated

POST OFFICE BOX 655303 •DALLAS, TEXAS 75265

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SN54ABT620, SN74ABT620

OCTAL BUS TRANSCEIVERS

WITH 3-STATE OUTPUTS

SCBS113D ± FEBRUARY 1991 ± REVISED APRIL 1998

			FUNCTION TABLE
		INPUTS				OPERATION
	OEBA		OEAB
		L	L
						B	data to A bus
		L	H		B		data to A bus,
						A data to B bus
		H	L				Isolation
		H	H
						A	data to B bus
logic symbol²				logic diagram (positive logic)

OEBA	19				19
	EN1				OEBA
	1
OEAB	EN2				1
					OEAB
A1	2			18	B1
	1	1
		1	2		2	18	B1
	3			17	A1
A2					B2
	4			16
A3					B3
	5			15
A4					B4
	6			14
A5					B5
	7			13
A6					B6	To Seven Other Channels
	8			12
A7					B7
	9			11
A8					B8

²This symbol is in accordance with ANSI/IEEE Std 91-1984 and

IEC Publication 617-12.

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)³

Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. ±0.5 V to 7	V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. ±0.5 V to 7	V
Voltage range applied to any output in the high or power-off state, VO . . . . . . . . . . . . . . . . . . .	±0.5 V to 5.5	V
Current into any output in the low state, IO: SN54ABT620 . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . . . . 96 mA
SN74ABT620 . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . . . 128 mA
Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . . . ±18 mA
Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . . . ±50 mA
Package thermal impedance, θJA (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . . 115°C/W
DW package . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . . . 97°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . . . 67°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . . 128°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	±65°C to 150°C

³Stresses beyond those listed under ªabsolute maximum ratingsº may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under ªrecommended operating conditionsº is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.

2.The package thermal impedance is calculated in accordance with JESD 51, except for through-hole packages, which use a trace length of zero.

2	POST OFFICE BOX 655303 •DALLAS, TEXAS 75265

SN54ABT620, SN74ABT620

OCTAL BUS TRANSCEIVERS

WITH 3-STATE OUTPUTS

SCBS113D ± FEBRUARY 1991 ± REVISED APRIL 1998

recommended operating conditions (see Note 3)

			SN54ABT620		SN74ABT620		UNIT
			MIN	MAX	MIN	MAX
VCC	Supply voltage		4.5	5.5	4.5	5.5	V
VIH	High-level input voltage		2		2		V
VIL	Low-level input voltage			0.8		0.8	V
VI	Input voltage		0	VCC	0	VCC	V
IOH	High-level output current			±24		±32	mA
IOL	Low-level output current			48		64	mA
t/ v	Input transition rise or fall rate	Outputs enabled		5		5	ns/V
TA	Operating free-air temperature		±55	125	±40	85	°C

NOTE 3: All unused pins (control or I/O) of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice.

POST OFFICE BOX 655303 •DALLAS, TEXAS 75265

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