Texas Instruments SN74AC241DBLE, SN74AC241DBR, SN74AC241DW, SN74AC241DWR, SN74AC241N Datasheet

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SN54AC241, SN74AC241

 

 

 

 

OCTAL BUFFERS/DRIVERS

 

 

 

 

 

 

WITH 3-STATE OUTPUTS

 

SCAS513C ± JUNE 1995 ± REVISED SEPTEMBER 1996

 

 

 

 

 

 

 

 

 

D EPIC (Enhanced-Performance Implanted

SN54AC241 . . . J OR W PACKAGE

CMOS) 1- m Process

SN74AC241 . . . DB, DW, N, OR PW PACKAGE

D Package Options Include Plastic

 

 

 

 

 

(TOP VIEW)

 

 

 

 

 

 

 

 

 

 

 

 

Small-Outline (DW), Shrink Small-Outline

 

 

 

 

 

 

 

 

 

 

1OE

 

 

1

20

 

VCC

(DB), and Thin Shrink Small-Outline (PW)

 

 

 

 

 

 

1A1

 

 

2

19

 

2OE

Packages, Ceramic Chip Carriers (FK), Flat

 

 

 

2Y4

 

 

3

18

 

1Y1

 

 

 

(W), and DIP (J, N) Packages

 

 

 

1A2

 

 

4

17

 

2A4

 

 

 

 

 

 

 

description

2Y3

 

 

5

16

 

1Y2

 

 

 

1A3

 

 

6

15

 

2A3

 

 

 

 

 

 

 

These octal buffers and line drivers are designed

2Y2

 

 

7

14

 

1Y3

 

 

 

specifically to improve the performance and

1A4

 

 

8

13

 

2A2

 

 

 

density of 3-state memory address drivers, clock

2Y1

 

 

9

12

 

1Y4

 

 

 

drivers, and bus-oriented receivers and

GND

 

 

10

11

 

2A1

 

 

 

transmitters.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

The 'AC241 are organized as two 4-bit buffers/drivers with separate complementary output-enable (1OE and 2OE) inputs. When 1OE is low or 2OE is high, the device passes noninverted data from the A inputs to the Y

outputs. When 1OE is high or 2OE is low, the outputs are in the high-impedance state.

The SN54AC241 is characterized for operation over the full military temperature range of ±55°C to 125°C. The SN74AC241 is characterized for operation from ±40°C to 85°C.

SN54AC241 . . . FK PACKAGE

(TOP VIEW)

 

2Y4

1A1

1OE

CC

2OE

 

 

V

 

1A2

3

2

1

20 19

1Y1

4

 

 

 

18

2Y3

5

 

 

 

17

2A4

1A3

6

 

 

 

16

1Y2

2Y2

7

 

 

 

15

2A3

1A4

8

 

 

 

14

1Y3

 

9

10 11 12 13

 

 

2Y1

GND

2A1

1Y4

2A2

 

FUNCTION TABLES

 

INPUTS

OUTPUT

 

 

1A

1Y

1OE

 

 

 

 

 

L

H

H

 

L

L

L

 

H

X

Z

 

 

 

 

INPUTS

OUTPUT

2OE

2A

2Y

 

 

 

H

H

H

H

L

L

L

X

Z

 

 

 

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

EPIC is a trademark of Texas Instruments Incorporated.

UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

Copyright 1996, Texas Instruments Incorporated

POST OFFICE BOX 655303 DALLAS, TEXAS 75265

1

Texas Instruments SN74AC241DBLE, SN74AC241DBR, SN74AC241DW, SN74AC241DWR, SN74AC241N Datasheet

SN54AC241, SN74AC241

OCTAL BUFFERS/DRIVERS

WITH 3-STATE OUTPUTS

SCAS513C ± JUNE 1995 ± REVISED SEPTEMBER 1996

logic symbol²

 

 

 

1

 

 

 

 

 

19

 

 

 

 

 

1OE

 

EN

 

 

2OE

 

EN

 

 

 

 

 

 

 

 

 

2

 

 

 

18

 

11

 

 

 

9

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1A1

 

 

 

 

 

1Y1

2A1

 

 

 

 

 

2Y1

 

 

 

 

 

 

 

 

 

4

 

 

 

16

 

13

 

7

 

 

 

 

 

 

 

 

1A2

 

 

 

 

 

1Y2

2A2

 

 

 

 

 

2Y2

 

 

 

 

 

 

 

 

 

 

6

 

 

 

14

 

15

 

5

 

 

 

 

 

 

 

 

 

1A3

 

 

 

 

 

1Y3

2A3

 

 

 

 

 

2Y3

 

 

 

 

 

 

 

 

 

 

8

 

 

 

12

 

17

 

3

 

 

 

 

 

 

 

 

 

1A4

 

 

 

 

 

1Y4

2A4

 

 

 

 

 

2Y4

 

 

 

 

 

 

 

² This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.

logic diagram (positive logic)

1OE

1

 

 

19

 

 

 

 

2OE

 

1A1

2

18

1Y1

11

9

 

 

2A1

2Y1

1A2

4

16

1Y2

13

7

 

 

2A2

2Y2

1A3

6

14

1Y3

15

5

 

 

2A3

2Y3

1A4

8

12

1Y4

17

3

 

 

2A4

2Y4

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)³

Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . ±0.5 V to 7

V

Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

±0.5 V to VCC + 0.5

V

Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

±0.5 V to VCC + 0.5

V

Input clamp current, IIK (VI < 0 or VI > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . ±20 mA

Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . ±20 mA

Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . ±50 mA

Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . ±200 mA

Maximum power dissipation at TA = 55°C (in still air) (see Note 2): DB package . . . . .

. . . . . . . . . . . . . 0.6 W

DW package . . . . .

. . . . . . . . . . . . . 1.6 W

N package . . . . . . .

. . . . . . . . . . . . . 1.3 W

PW package . . . . .

. . . . . . . . . . . . . 0.7 W

Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . ±65°C to 150°C

³Stresses beyond those listed under ªabsolute maximum ratingsº may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under ªrecommended operating conditionsº is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

2.The maximum package power dissipation is calculated using a junction temperature of 150°C and a board trace length of 750 mils, except for the N package, which has a trace length of zero.

2

POST OFFICE BOX 655303 DALLAS, TEXAS 75265

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