Texas Instruments SN74AC74D, SN74AC74DBLE, SN74AC74DBR, SN74AC74DR, SN74AC74N Datasheet

SN54AC74, SN74AC74

DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS

WITH CLEAR AND PRESET

	SCAS521C ± AUGUST 1995 ± REVISED SEPTEMBER 1996
D EPIC (Enhanced-Performance Implanted	SN54AC74 . . . J OR W PACKAGE
CMOS) 1- m Process	SN74AC74 . . . D, DB, N, OR PW PACKAGE
D Package Options Include Plastic					(TOP VIEW)
Small-Outline (D), Shrink Small-Outline
	1CLR					1	14	VCC
(DB), and Thin Shrink Small-Outline (PW)
		1D				2	13	2CLR
Packages, Ceramic Chip Carriers (FK), Flat
	1CLK					3	12	2D
(W), and DIP (J,N) Packages
	1PRE					4	11	2CLK
		1Q
description						5	10		2PRE
		1Q				6	9	2Q
The 'AC74 are dual positive-edge-triggered	GND
						7	8	2Q
D-type flip-flops.

A low level at the preset (PRE) or clear (CLR) input sets or resets the outputs, regardless of the levels of the other inputs. When PRE and CLR are inactive (high), data at the data (D) input meeting the setup-time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at D can be changed without affecting the levels at the outputs.

The SN54AC74 is characterized for operation over the full military temperature range of ±55°C to 125°C. The SN74AC74 is characterized for operation from ±40°C to 85°C.

SN54AC74 . . . FK PACKAGE

		(TOP VIEW)
	1D	1CLR	NC	V	2CLR
				CC
1CLK	3	2	1	20 19		2D
	4				18
NC	5				17	NC
1PRE	6				16	2CLK
NC	7				15	NC
1Q	8				14	2PRE
	9	10 11 12 13
	1Q	GND	NC	2Q	2Q
NC ± No internal connection

FUNCTION TABLE

			INPUTS			OUTPUTS
				CLK	D	Q
	PRE		CLR					Q
	L		H	X	X	H		L
	H		L	X	X	L		H
	L		L	X	X	H²	H²
	H		H	↑	H	H		L
	H		H	↑	L	L		H
	H		H	L	X	Q0
							Q		0

²This configuration is unstable; that is, it does not persist when either PRE or CLR returns to its inactive (high) level.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

EPIC is a trademark of Texas Instruments Incorporated.

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

Copyright 1996, Texas Instruments Incorporated

POST OFFICE BOX 655303 •DALLAS, TEXAS 75265

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SN54AC74, SN74AC74

DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS

WITH CLEAR AND PRESET

SCAS521C ± AUGUST 1995 ± REVISED SEPTEMBER 1996

logic symbol²

		4		S	5
	1PRE					1Q
3
				C1
1CLK
2
	1D			1D	6
		1		R		1Q
	1CLR
		10			9
	2PRE					2Q
11
2CLK
12
	2D				8
		13				2Q
	2CLR

²This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Pin numbers shown are for the D, DB, J, N, PW, and W packages.

logic diagram, each flip-flop (positive logic)

PRE
CLK		C	C
		C
			Q
			TG
	C	C	C
			C
D	TG	TG	TG
			Q
	C	C	C
CLR

2	POST OFFICE BOX 655303 •DALLAS, TEXAS 75265

SN54AC74, SN74AC74

DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS

WITH CLEAR AND PRESET

SCAS521C ± AUGUST 1995 ± REVISED SEPTEMBER 1996

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)²

Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . . . . ±0.5 V to 7	V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	±0.5 V to VCC + 0.5	V
Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	±0.5 V to VCC + 0.5	V
Input clamp current, IIK (VI < 0 or VI > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . . . . . . . . ±20 mA
Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . . . . . . . . ±20 mA
Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . . . . . . . . ±50 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . . . . . . . ±200 mA
Maximum power dissipation at TA = 55°C (in still air) (see Note 2): D package . . . . . . .	. . . . . . . . . . . . 1.25 W
DB package . . . . . .	. . . . . . . . . . . . . 0.5 W
N package . . . . . . .	. . . . . . . . . . . . . 1.1 W
PW package . . . . . .	. . . . . . . . . . . . . 0.5 W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . ±65°C to 150°C

²Stresses beyond those listed under ªabsolute maximum ratingsº may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under ªrecommended operating conditionsº is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

2.The maximum package power dissipation is calculated using a junction temperature of 150°C and a board trace length of 750 mils, except for the N package, which has a trace length of zero.

recommended operating conditions (see Note 3)

			SN54AC74		SN74AC74		UNIT
			MIN	MAX	MIN	MAX
VCC	Supply voltage		2	6	2	6	V
		VCC = 3 V	2.1		2.1
VIH	High-level input voltage	VCC = 4.5 V	3.15		3.15		V
		VCC = 5.5 V	3.85		3.85
		VCC = 3 V		0.9		0.9
VIL	Low-level input voltage	VCC = 4.5 V		1.35		1.35	V
		VCC = 5.5 V		1.65		1.65
VI	Input voltage		0	VCC	0	VCC	V
VO	Output voltage		0	VCC	0	VCC	V
		VCC = 3 V		±12		±12
IOH	High-level output current	VCC = 4.5 V		±24		±24	mA
		VCC = 5.5 V		±24		±24
		VCC = 3 V		12		12
IOL	Low-level output current	VCC = 4.5 V		24		24	mA
		VCC = 5.5 V		24		24
t/ v	Input transition rise or fall rate		0	8	0	8	ns/V
TA	Operating free-air temperature		±55	125	±40	85	°C

NOTE 3: Unused inputs must be held high or low to prevent them from floating.

POST OFFICE BOX 655303 •DALLAS, TEXAS 75265

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