Texas Instruments SN74ABT2240ADBLE, SN74ABT2240ADBR, SN74ABT2240ADW, SN74ABT2240ADWR, SN74ABT2240AN Datasheet

SN54ABT2240A, SN74ABT2240A

OCTAL BUFFERS AND LINE/MOS DRIVERS

WITH 3-STATE OUTPUTS

SCBS232E ± JANUARY 1991 ± REVISED OCTOBER 1998

D

Ω

SN54ABT2240A . . . J OR W PACKAGE

Output Ports Have Equivalent 25Series

SN74ABT2240A . . . DB, DW, N, OR PW PACKAGE

Resistors, So No External Resistors Are

Required

(TOP VIEW)

D

State-of-the-Art EPIC-ΙΙB BiCMOS Design

1OE

1

20

VCC

Significantly Reduces Power Dissipation

1A1

2

19

2OE

D Typical VOLP (Output Ground Bounce) < 1 V

2Y4

3

18

1Y1

at VCC = 5 V, TA = 25°C

1A2

4

17

2A4

D Latch-Up Performance Exceeds 500 mA

2Y3

5

16

1Y2

Per JESD 17

1A3

6

15

2A3

D ESD Protection Exceeds 2000 V Per

2Y2

7

14

1Y3

MIL-STD-883, Method 3015; Exceeds 200 V

1A4

8

13

2A2

Using Machine Model (C = 200 pF, R = 0)

2Y1

9

12

1Y4

D Package Options Include Plastic

GND

10

11

2A1

Small-Outline (DW), Shrink Small-Outline

(DB), and Thin Shrink Small-Outline (PW)

SN54ABT2240A . . . FK PACKAGE

Packages, Ceramic Chip Carriers (FK),

(TOP VIEW)

Plastic (N) and Ceramic (J) DIPs, and

2Y4

1A1

1OE

CC

2OE

Ceramic Flat (W) Package

V

description

1A2

4

3

2

1

20 19

1Y1

18

These octal buffers and line drivers are designed

2Y3

5

17

2A4

1A3

6

16

1Y2

specifically to improve both the performance and

density of 3-state memory address drivers, clock

2Y2

7

15

2A3

drivers,

and

bus-oriented

receivers

and

1A4

8

9

14

1Y3

transmitters. Together with the 'ABT2241 and

10 11 12 13

'ABT2244A, these devices provide combinations

2Y1

GND

2A1

1Y4

2A2

of inverting and noninverting outputs, symmetrical

active-low output-enable (OE) inputs, and complementary OE and OE inputs. These devices feature high fan-out and improved fan-in.

These devices are organized as two 4-bit line drivers with separate OE inputs. When OE is low, the devices pass inverted data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state.

The outputs, which are designed to sink up to 12 mA, include equivalent 25-Ω series resistors to reduce overshoot and undershoot.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN54ABT2240A is characterized for operation over the full military temperature range of ±55°C to 125°C. The SN74ABT2240A is characterized for operation from ±40°C to 85°C.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

EPIC-ΙΙB is a trademark of Texas Instruments Incorporated.

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

Copyright 1998, Texas Instruments Incorporated

On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.

POST OFFICE BOX 655303 •DALLAS, TEXAS 75265

1

SN54ABT2240A, SN74ABT2240A

OCTAL BUFFERS AND LINE/MOS DRIVERS

WITH 3-STATE OUTPUTS

SCBS232E ± JANUARY 1991 ± REVISED OCTOBER 1998

FUNCTION TABLE (each buffer)

	INPUTS		OUTPUT
		A	Y
	OE
	L	H	L
	L	L	H
	H	X	Z

logic symbol²

			1									19
1OE				EN						2OE				EN			9
			2					18		11
				1										1				2Y1
1A1									1Y1	2A1
			4				16			13							7
1A2									1Y2	2A2								2Y2
			6				14			15							5
1A3									1Y3	2A3								2Y3
			8				12			17							3
1A4									1Y4	2A4								2Y4

² This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.

logic diagram (positive logic)

1		19
1OE		2OE
2	18	11	9
1A1	1Y1	2A1	2Y1
4	16	13	7
1A2	1Y2	2A2	2Y2
6	14	15	5
1A3	1Y3	2A3	2Y3
8	12	17	3
1A4	1Y4	2A4	2Y4

2	POST OFFICE BOX 655303 •DALLAS, TEXAS 75265

SN54ABT2240A, SN74ABT2240A

OCTAL BUFFERS AND LINE/MOS DRIVERS

WITH 3-STATE OUTPUTS

SCBS232E ± JANUARY 1991 ± REVISED OCTOBER 1998

schematic of Y outputs

VCC

Output

GND

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)²

Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. ±0.5 V to 7	V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. ±0.5 V to 7	V
Voltage range applied to any output in the high or power-off state, VO . . . . . . . . . . . . . . . . . . .	±0.5 V to 5.5	V
Current into any output in the low state, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . . . . 30 mA
Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . . . ±18 mA
Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . . . ±50 mA
Package thermal impedance, θJA (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . . 115°C/W
DW package . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . . . 97°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . . . 67°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . . 128°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	±65°C to 150°C

²Stresses beyond those listed under ªabsolute maximum ratingsº may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under ªrecommended operating conditionsº is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.

2.The package thermal impedance is calculated in accordance with JESD 51, except for through-hole packages, which use a trace length of zero.

POST OFFICE BOX 655303 •DALLAS, TEXAS 75265

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