Texas Instruments SN74ACT240DWR, SN74ACT240N, SN74ACT240PWLE, SN74ACT240PWR, SN74ACT240DBLE Datasheet

			SN54ACT240, SN74ACT240
			OCTAL BUFFERS/DRIVERS
					WITH 3-STATE OUTPUTS
		SCAS515B ± JUNE 1995 ± REVISED MAY 1996
D Inputs Are TTL Compatible	SN54ACT240 . . . J OR W PACKAGE
D EPIC (Enhanced-Performance Implanted	SN74ACT240 . . . DB, DW, N, OR PW PACKAGE
				(TOP VIEW)
CMOS) 1- m Process
D Package Options Include Plastic
	1OE				1	20		VCC
Small-Outline (DW), Shrink Small-Outline	1A1				2	19		2OE
(DB), Thin Shrink Small-Outline (PW), and	2Y4				3	18		1Y1
Flat (W) Packages, Ceramic Chip Carriers	1A2				4	17		2A4
(FK), and Plastic (N) and Ceramic (J) DIPs	2Y3				5	16		1Y2
description	1A3				6	15		2A3
	2Y2				7	14		1Y3
These octal buffers and line drivers are designed	1A4				8	13		2A2
	2Y1				9	12		1Y4
specifically to improve the performance and
	GND				10	11		2A1
density of 3-state memory address drivers, clock
drivers, and bus-oriented receivers and
transmitters.	SN54ACT240 . . . FK PACKAGE
				(TOP VIEW)

The 'ACT240 are organized as two 4-bit

buffers/drivers with separate output-enable (OE) inputs. When OE is low, the device passes inverted data from the A inputs to the Y outputs.

When OE is high, the outputs are in the high-impedance state.

The SN54ACT240 is characterized for operation over the full military temperature range of ±55°C to 125°C. The SN74ACT240 is characterized for operation from ±40°C to 85°C.

FUNCTION TABLE (each buffer)

	INPUTS		OUTPUT
	OE	A	Y
	L	H	L
	L	L	H
	H	X	Z

	2Y4	1A1	1OE	CC	2OE
				V
1A2	3	2	1	20 19		1Y1
	4				18
2Y3	5				17	2A4
1A3	6				16	1Y2
2Y2	7				15	2A3
1A4	8				14	1Y3
	9	10 11 12 13
	2Y1	GND	2A1	1Y4	2A2

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

EPIC is a trademark of Texas Instruments Incorporated.

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

Copyright 1996, Texas Instruments Incorporated

POST OFFICE BOX 655303 •DALLAS, TEXAS 75265

1

SN54ACT240, SN74ACT240

OCTAL BUFFERS/DRIVERS

WITH 3-STATE OUTPUTS

SCAS515B ± JUNE 1995 ± REVISED MAY 1996

logic symbol²

			1									19
1OE				EN						2OE				EN
			2				18			11							9
1A1									1Y1	2A1								2Y1
			4				16			13							7
1A2									1Y2	2A2								2Y2
			6					14		15							5
1A3									1Y3	2A3								2Y3
			8				12			17							3
1A4									1Y4	2A4								2Y4

² This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.

logic diagram (positive logic)

1OE	1			19
				2OE
1A1	2	18	1Y1	11	9
				2A1	2Y1
1A2	4	16	1Y2	13	7
				2A2	2Y2
1A3	6	14	1Y3	15	5
				2A3	2Y3
1A4	8	12	1Y4	17	3
				2A4	2Y4

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)³

Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . . . . ±0.5 V to 7	V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	±0.5 V to VCC + 0.5	V
Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	±0.5 V to VCC + 0.5	V
Input clamp current, IIK (VI < 0 or VI > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . . . . . . . . ±20 mA
Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . . . . . . . . ±20 mA
Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . . . . . . . . ±50 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . . . . . . . ±200 mA
Maximum power dissipation at TA = 55°C (in still air) (see Note 2): DB package . . . . .	. . . . . . . . . . . . . 0.6 W
DW package . . . . .	. . . . . . . . . . . . . 1.6 W
N package . . . . . . .	. . . . . . . . . . . . . 1.3 W
PW package . . . . .	. . . . . . . . . . . . . 0.7 W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . ±65°C to 150°C

³Stresses beyond those listed under ªabsolute maximum ratingsº may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under ªrecommended operating conditionsº is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

2.The maximum package power dissipation is calculated using a junction temperature of 150°C and a board trace length of 750 mils, except for the N package, which has a trace length of zero.

2	POST OFFICE BOX 655303 •DALLAS, TEXAS 75265