Texas Instruments SN74AC14D, SN74AC14DBLE, SN74AC14DBR, SN74AC14DR, SN74AC14N Datasheet

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Texas Instruments SN74AC14D, SN74AC14DBLE, SN74AC14DBR, SN74AC14DR, SN74AC14N Datasheet

 

 

 

 

SN54AC14, SN74AC14

 

HEX SCHMITT-TRIGGER INVERTERS

 

SCAS522D ± AUGUST 1995 ± REVISED FEBRUARY 1998

 

 

 

 

 

 

 

D EPIC (Enhanced-Performance Implanted

SN54AC14 . . . J OR W PACKAGE

CMOS) Submicron Process

SN74AC14 . . . D, DB, N, OR PW PACKAGE

D Package Options Include Plastic

 

 

(TOP VIEW)

 

 

 

 

 

 

 

 

 

Small-Outline (D), Shrink Small-Outline

1A

 

1

14

 

VCC

 

 

(DB), and Thin Shrink Small-Outline (PW)

 

 

1Y

 

2

13

 

6A

Packages, Ceramic Chip Carriers (FK) and

 

 

2A

 

 

 

 

6Y

 

3

12

 

Flatpacks (W), and Standard Plastic (N) and

 

 

2Y

 

 

 

 

5A

 

4

11

 

Ceramic (J) DIPS

 

 

3A

 

 

 

 

5Y

 

 

5

10

 

description

3Y

 

6

9

 

4A

 

 

 

GND

 

7

8

 

4Y

 

 

 

 

 

 

 

 

The 'AC14 devices contain six independent

 

 

 

 

 

 

 

inverters. The devices perform the Boolean

 

 

 

 

 

 

 

function Y = A.

 

SN54AC14 . . . FK PACKAGE

 

 

The SN54AC14 is characterized for operation

 

(TOP VIEW)

 

 

over the full military temperature range of ±55°C

 

1Y

A1

NC

CC

6A

 

to 125°C. The SN74AC14 is characterized for

 

 

 

V

 

operation from ±40°C to 85°C.

 

3

2

1

20 19

 

 

 

2A

6Y

FUNCTION TABLE

4

 

 

 

18

NC

5

 

 

 

17

NC

(each inverter)

 

 

 

2Y

6

 

 

 

16

5A

INPUT

OUTPUT

 

 

 

NC

7

 

 

 

15

NC

A

Y

 

 

 

3A

8

 

 

 

14

5Y

H

L

 

 

 

 

9

10 11 12 13

 

L

H

 

3Y

GND

NC

4Y

4A

 

 

 

 

 

 

 

NC ± No internal connection

 

logic symbol²

 

 

 

 

 

 

 

logic diagram, each inverter (positive logic)

1

 

 

 

 

 

2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1A

 

 

 

 

 

4

1Y

A

 

 

 

 

 

 

 

Y

3

 

 

 

 

 

2Y

 

 

 

 

 

 

 

 

 

2A

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

5

 

 

 

 

 

6

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

3A

 

 

 

 

 

 

 

3Y

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

8

 

 

 

 

 

 

 

 

 

9

 

 

 

 

 

4Y

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

4A

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

10

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

11

 

 

 

 

 

5Y

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

5A

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

12

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

13

 

 

 

 

 

6Y

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

6A

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

² This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.

Pin numbers shown are for the D, DB, J, N, PW, or W packages.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

EPIC is a trademark of Texas Instruments Incorporated.

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

Copyright 1998, Texas Instruments Incorporated

On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.

POST OFFICE BOX 655303 DALLAS, TEXAS 75265

1

SN54AC14, SN74AC14

HEX SCHMITT-TRIGGER INVERTERS

SCAS522D ± AUGUST 1995 ± REVISED FEBRUARY 1998

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)²

Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . ± 0.5 V to 7

V

Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

±0.5 V to VCC + 0.5

V

Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

±0.5 V to VCC + 0.5

V

Input clamp current, IIK (VI < 0 or VI > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . . ± 20 mA

Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . . ± 20 mA

Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . . ± 50 mA

Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . ± 200 mA

Package thermal impedance, θJA (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . 127°C/W

DB package . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . 158°C/W

N package . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . . 78°C/W

PW package . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . 170°C/W

Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . ± 65°C to 150°C

²Stresses beyond those listed under ªabsolute maximum ratingsº may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under ªrecommended operating conditionsº is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

2.The package thermal impedance is calculated in accordance with JESD 51, except for through-hole packages, which use a trace length of zero

recommended operating conditions (see Note 3)

 

 

 

SN54AC14

SN74AC14

UNIT

 

 

 

 

 

 

 

 

 

 

MIN

MAX

MIN

MAX

 

 

 

 

 

 

 

 

 

 

 

 

VCC

Supply voltage

 

2

6

2

6

V

VI

Input voltage

 

0

VCC

0

VCC

V

VO

Output voltage

 

0

VCC

0

VCC

V

 

 

VCC = 3 V

 

± 12

 

± 12

 

IOH

High-level output current

VCC = 4.5 V

 

± 24

 

± 24

mA

 

 

VCC = 5.5 V

 

± 24

 

± 24

 

 

 

VCC = 3 V

 

12

 

12

 

IOL

Low-level output current

VCC = 4.5 V

 

24

 

24

mA

 

 

VCC = 5.5 V

 

24

 

24

 

TA

Operating free-air temperature

 

± 55

125

± 40

85

°C

NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,

Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

2

POST OFFICE BOX 655303 DALLAS, TEXAS 75265

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