Texas Instruments SN74ABT373DBLE, SN74ABT373DBR, SN74ABT373DW, SN74ABT373DWR, SN74ABT373N Datasheet
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SN54ABT373, SN74ABT373 |
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OCTAL TRANSPARENT D-TYPE LATCHES |
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WITH 3-STATE OUTPUTS |
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SCBS155D ± JANUARY 1991 ± REVISED MAY 1997 |
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D State-of-the-Art EPIC-ΙΙB BiCMOS Design |
SN54ABT373 . . . J OR W PACKAGE |
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Significantly Reduces Power Dissipation |
SN74ABT373 . . . DB, DW, N, OR PW PACKAGE |
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(TOP VIEW) |
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DLatch-Up Performance Exceeds 500 mA Per
JEDEC Standard JESD-17 |
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VCC |
OE |
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1 |
20 |
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D Typical VOLP (Output Ground Bounce) < 1 V |
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1Q |
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2 |
19 |
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8Q |
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at VCC = 5 V, TA = 25°C |
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1D |
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3 |
18 |
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8D |
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D High-Drive Outputs (±32-mA IOH, 64-mA IOL) |
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2D |
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4 |
17 |
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7D |
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D Package Options Include Plastic |
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2Q |
5 |
16 |
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7Q |
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Small-Outline (DW), Shrink Small-Outline |
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3Q |
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6 |
15 |
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6Q |
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(DB), and Thin Shrink Small-Outline (PW) |
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3D |
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7 |
14 |
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6D |
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Packages, Ceramic Chip Carriers (FK), |
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4D |
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8 |
13 |
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5D |
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Ceramic Flat (W) Package, and Plastic (N) |
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4Q |
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9 |
12 |
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5Q |
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and Ceramic (J) DIPs |
GND |
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10 |
11 |
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LE |
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description |
SN54ABT373 . . . FK PACKAGE |
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The eight latches of the 'ABT373 are transparent D-type latches. While the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the logic levels set up at the D inputs.
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components.
(TOP VIEW)
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1D |
1Q |
OE |
CC |
8Q |
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V |
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2D |
3 |
2 |
1 |
20 19 |
8D |
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4 |
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18 |
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2Q |
5 |
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17 |
7D |
3Q |
6 |
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16 |
7Q |
3D |
7 |
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15 |
6Q |
4D |
8 |
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14 |
6D |
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9 |
10 11 12 13 |
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4Q |
GND |
LE |
5Q |
5D |
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OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
The SN54ABT373 is characterized for operation over the full military temperature range of ±55°C to 125°C. The SN74ABT373 is characterized for operation from ±40°C to 85°C.
FUNCTION TABLE (each latch)
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INPUTS |
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OUTPUT |
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LE |
D |
Q |
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OE |
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L |
H |
H |
H |
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L |
H |
L |
L |
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L |
L |
X |
Q0 |
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H |
X |
X |
Z |
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Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC-ΙΙB is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright 1997, Texas Instruments Incorporated
POST OFFICE BOX 655303 •DALLAS, TEXAS 75265 |
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SN54ABT373, SN74ABT373
OCTAL TRANSPARENT D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SCBS155D ± JANUARY 1991 ± REVISED MAY 1997
logic symbol²
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1 |
EN |
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OE |
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11 |
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LE |
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C1 |
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3 |
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2 |
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1D |
1D |
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1Q |
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4 |
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5 |
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2D |
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2Q |
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7 |
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6 |
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3D |
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3Q |
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8 |
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9 |
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4D |
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4Q |
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12 |
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13 |
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5Q |
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5D |
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15 |
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14 |
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6Q |
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6D |
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17 |
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16 |
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7D |
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7Q |
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18 |
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19 |
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8D |
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8Q |
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² This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
logic diagram (positive logic)
OE |
1 |
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LE |
11 |
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C1 |
2 |
1D |
3 |
1D |
1Q |
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To Seven Other Channels
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)³
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. ±0.5 V to 7 |
V |
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. ±0.5 V to 7 |
V |
Voltage range applied to any output in the high or power-off state, VO . . . . . . . . . . . . . . . . . . . |
±0.5 V to 5.5 |
V |
Current into any output in the low state, IO: SN54ABT373 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . . . . 96 mA |
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SN74ABT373 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . . . 128 mA |
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Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . . . ±18 mA |
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Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . . . ±50 mA |
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Package thermal impedance, θJA (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . . 115°C/W |
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DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . . . 97°C/W |
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N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . . . 67°C/W |
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PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . . 128°C/W |
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Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
±65°C to 150°C |
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³ Stresses beyond those listed under ªabsolute maximum ratingsº may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under ªrecommended operating conditionsº is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2.The package thermal impedance is calculated in accordance with EIA/JEDEC Std JESD51, except for through-hole packages, which use a trace length of zero.
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POST OFFICE BOX 655303 •DALLAS, TEXAS 75265 |
SN54ABT373, SN74ABT373
OCTAL TRANSPARENT D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SCBS155D ± JANUARY 1991 ± REVISED MAY 1997
recommended operating conditions (see Note 3)
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SN54ABT373 |
SN74ABT373 |
UNIT |
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MIN |
MAX |
MIN |
MAX |
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VCC |
Supply voltage |
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4.5 |
5.5 |
4.5 |
5.5 |
V |
VIH |
High-level input voltage |
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2 |
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2 |
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V |
VIL |
Low-level input voltage |
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0.8 |
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0.8 |
V |
VI |
Input voltage |
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0 |
VCC |
0 |
VCC |
V |
IOH |
High-level output current |
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±24 |
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±32 |
mA |
IOL |
Low-level output current |
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48 |
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64 |
mA |
t/ v |
Input transition rise or fall rate |
Outputs enabled |
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5 |
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5 |
ns/V |
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TA |
Operating free-air temperature |
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±55 |
125 |
±40 |
85 |
°C |
NOTE 3: Unused inputs must be held high or low to prevent them from floating.
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER |
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TEST CONDITIONS |
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TA = 25°C |
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SN54ABT373 |
SN74ABT373 |
UNIT |
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MIN |
TYP² |
MAX |
MIN |
MAX |
MIN |
MAX |
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VIK |
VCC = 4.5 V, |
II = ±18 mA |
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±1.2 |
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±1.2 |
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±1.2 |
V |
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VCC = 4.5 V, |
IOH = ±3 mA |
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2.5 |
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2.5 |
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2.5 |
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VOH |
VCC = 5 V, |
IOH = ±3 mA |
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3 |
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3 |
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3 |
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V |
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VCC = 4.5 V |
IOH = ±24 mA |
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2 |
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2 |
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IOH = ±32 mA |
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2* |
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2 |
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VOL |
VCC = 4.5 V |
IOL = 48 mA |
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0.55 |
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0.55 |
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V |
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IOL = 64 mA |
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0.55* |
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0.55 |
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Vhys |
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100 |
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mV |
II |
VCC = 5.5 V, |
VI = VCC or GND |
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±1 |
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±1 |
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±1 |
µA |
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I |
V |
CC |
= 5.5 V, |
V |
= 2.7 V |
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10³ |
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10³ |
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10³ |
µA |
OZH |
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O |
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I |
V |
CC |
= 5.5 V, |
V |
= 0.5 V |
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±10³ |
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±10³ |
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±10³ |
µA |
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OZL |
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O |
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Ioff |
VCC = 0, |
VI or VO ≤ 4.5 V |
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±100 |
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±100 |
µA |
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ICEX |
VCC = 5.5 V, |
VO = 5.5 V |
Outputs high |
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50 |
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50 |
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50 |
µA |
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I § |
V |
CC |
= 5.5 V, |
V |
= 2.5 V |
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±50 |
±100 |
±180 |
±50 |
±180 |
±50 |
±180 |
mA |
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O |
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O |
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VCC = 5.5 V, IO |
= 0, |
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Outputs high |
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1 |
250 |
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250 |
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250 |
µA |
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ICC |
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Outputs low |
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24 |
30 |
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30 |
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30 |
mA |
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VI = VCC or GND |
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Outputs disabled |
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0.5 |
250 |
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250 |
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250 |
µA |
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ICC¶ |
VCC = 5.5 V, One input at 3.4 V, |
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1.5 |
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1.5 |
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1.5 |
mA |
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Other inputs at VCC or GND |
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Ci |
VI = 2.5 V or 0.5 V |
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3 |
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pF |
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Co |
VO = 2.5 V or 0.5 V |
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6 |
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pF |
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* On products compliant to MIL-PRF-38535, this parameter does not apply. |
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² All typical values are at VCC = 5 V. |
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³ This data sheet limit may vary among suppliers. |
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§ Not more than one output should be tested at a time, and the duration of the test should not exceed one second. |
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¶ This is the increase in supply current for each input that is at the specified TTL voltage level rather than V |
CC |
or GND. |
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POST OFFICE BOX 655303 •DALLAS, TEXAS 75265 |
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