SN54ABT623A, SN74ABT623
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
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SCBS114D ± FEBRUARY 1991 ± REVISED MAY 1997 |
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D State-of-the-Art EPIC-ΙΙB BiCMOS Design |
SN54ABT623A . . . JT OR W PACKAGE |
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Significantly Reduces Power Dissipation |
SN74ABT623 . . . DB, DW, N, OR PW PACKAGE |
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D ESD Protection Exceeds 2000 V Per |
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(TOP VIEW) |
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MIL-STD-883, Method 3015; Exceeds 200 V |
OEAB |
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1 |
20 |
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VCC |
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Using Machine Model (C = 200 pF, R = 0) |
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A1 |
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2 |
19 |
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OEBA |
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D Latch-Up Performance Exceeds 500 mA Per |
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A2 |
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3 |
18 |
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B1 |
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JEDEC Standard JESD-17 |
A3 |
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4 |
17 |
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B2 |
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D Typical VOLP (Output Ground Bounce) < 1 V |
A4 |
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5 |
16 |
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B3 |
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at VCC = 5 V, TA = 25°C |
A5 |
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6 |
15 |
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B4 |
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A6 |
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B5 |
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D High-Drive Outputs (±32-mA IOH, 64-mA IOL) |
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7 |
14 |
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A7 |
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8 |
13 |
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B6 |
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D Package Options Include Plastic |
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A8 |
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9 |
12 |
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B7 |
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Small-Outline (DW), Shrink Small-Outline |
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GND |
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10 |
11 |
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B8 |
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(DB), and Thin Shrink Small-Outline (PW) |
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Packages, Ceramic Chip Carriers (FK), |
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Ceramic Flat (W) Package, and Plastic (N) |
SN54ABT623A . . . FK PACKAGE |
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and Ceramic (JT) DIPs |
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(TOP VIEW) |
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description
The SN54ABT623A and SN74ABT623 bus transceivers are designed for asynchronous communication between data buses. The control-function implementation allows for maximum flexibility in timing. The SN54ABT623A and SN74ABT623 provide true data at their outputs.
These devices allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic levels at the output-enable (OEAB and OEBA) inputs.
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A2 |
A1 |
OEAB |
CC |
OEBA |
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V |
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A3 |
3 |
2 |
1 |
20 19 |
B1 |
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4 |
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18 |
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A4 |
5 |
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17 |
B2 |
A5 |
6 |
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16 |
B3 |
A6 |
7 |
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15 |
B4 |
A7 |
8 |
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14 |
B5 |
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9 10 11 12 13 |
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A8 |
GND |
B8 |
B7 |
B6 |
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The output-enable inputs can be used to disable the device so that the buses are effectively isolated. The dual-enable configuration gives the transceivers the capability of storing data by simultaneously enabling OEAB and OEBA. Each output reinforces its input in this configuration. When both OEAB and OEBA are enabled and all other data sources to the two sets of bus lines are at high impedance, both sets of bus lines (16 total) remain at their last states.
To ensure the high-impedance state during power up or power down, OEBA should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. OEAB should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.
The SN54ABT623A is characterized for operation over the full military temperature range of ±55°C to 125°C. The SN74ABT623 is characterized for operation from ±40°C to 85°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC-ΙΙB is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright 1997, Texas Instruments Incorporated
POST OFFICE BOX 655303 •DALLAS, TEXAS 75265 |
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SN54ABT623A, SN74ABT623
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS114D ± FEBRUARY 1991 ± REVISED MAY 1997
FUNCTION TABLE
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INPUTS |
OPERATION |
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OEBA |
OEAB |
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L |
L |
B data to A bus |
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L |
H |
B data to A bus, |
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A data to B bus |
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H |
L |
Isolation |
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H |
H |
A data to B bus |
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logic symbol²
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19 |
EN1 |
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OEBA |
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1 |
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OEAB |
EN2 |
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A1 |
2 |
1 |
18 |
1 |
B1 |
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3 |
1 |
2 |
A2 |
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17 |
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B2 |
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A3 |
4 |
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16 |
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B3 |
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A4 |
5 |
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15 |
6 |
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B4 |
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A5 |
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14 |
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B5 |
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A6 |
7 |
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13 |
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B6 |
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A7 |
8 |
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12 |
9 |
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B7 |
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A8 |
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11 |
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B8 |
² This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
logic diagram (positive logic)
19 |
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OEBA |
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1 |
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OEAB |
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2 |
18 |
A1 |
B1 |
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To Seven Other Channels |
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POST OFFICE BOX 655303 •DALLAS, TEXAS 75265 |
SN54ABT623A, SN74ABT623
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS114D ± FEBRUARY 1991 ± REVISED MAY 1997
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)²
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. ±0.5 V to 7 |
V |
Input voltage range, VI (except I/O ports) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. ±0.5 V to 7 |
V |
Voltage range applied to any output in the high or power-off state, VO . . . . . . . . . . . . . . . . . . . |
±0.5 V to 5.5 |
V |
Current into any output in the low state, IO: SN54ABT623A . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . . . . 96 mA |
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SN74ABT623 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . . . 128 mA |
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Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . . . ±18 mA |
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Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . . . ±50 mA |
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Package thermal impedance, θJA (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . . 115°C/W |
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DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . . . 97°C/W |
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N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . . . 67°C/W |
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PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . . 128°C/W |
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Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
±65°C to 150°C |
²Stresses beyond those listed under ªabsolute maximum ratingsº may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under ªrecommended operating conditionsº is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2.The package thermal impedance is calculated in accordance with EIA/JEDEC Std JESD51, except for through-hole packages, which use a trace length of zero.
recommended operating conditions (see Note 3)
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SN54ABT623A |
SN74ABT623 |
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MIN |
MAX |
MIN |
MAX |
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VCC |
Supply voltage |
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4.5 |
5.5 |
4.5 |
5.5 |
V |
VIH |
High-level input voltage |
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2 |
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2 |
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V |
VIL |
Low-level input voltage |
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0.8 |
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0.8 |
V |
VI |
Input voltage |
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0 |
VCC |
0 |
VCC |
V |
IOH |
High-level output current |
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±24 |
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±32 |
mA |
IOL |
Low-level output current |
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48 |
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64 |
mA |
t/ v |
Input transition rise or fall rate |
Outputs enabled |
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5 |
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5 |
ns/V |
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TA |
Operating free-air temperature |
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±55 |
125 |
±40 |
85 |
°C |
NOTE 3: Unused pins (input or I/O) must be held high or low to prevent them from floating.
POST OFFICE BOX 655303 •DALLAS, TEXAS 75265 |
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