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SN54ABT2952A, SN74ABT2952A |
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OCTAL BUS TRANSCEIVERS AND REGISTERS |
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WITH 3-STATE OUTPUTS |
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SCBS203D ± AUGUST 1992 ± REVISED JANUARY 1998 |
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D |
State-of-the-Art EPIC-ΙΙB BiCMOS Design |
SN54ABT2952A . . . JT OR W PACKAGE |
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Significantly Reduces Power Dissipation |
SN74ABT2952A . . . DB, DW, PW, OR NT PACKAGE |
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D Two 8-Bit Back-to-Back Registers Store |
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(TOP VIEW) |
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Data Flowing in Both Directions |
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B8 |
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1 |
24 |
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VCC |
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Noninverting Outputs |
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D |
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B7 |
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2 |
23 |
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A8 |
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D Typical VOLP (Output Ground Bounce) < 1 V |
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B6 |
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3 |
22 |
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A7 |
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B5 |
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4 |
21 |
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A6 |
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at VCC = 5 V, TA = 25°C |
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B4 |
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5 |
20 |
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A5 |
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D Latch-Up Performance Exceeds 500 mA Per |
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B3 |
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6 |
19 |
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A4 |
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JESD 17 |
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B2 |
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7 |
18 |
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A3 |
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D ESD Protection Exceeds 2000 V Per |
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B1 |
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8 |
17 |
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A2 |
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MIL-STD-883, Method 3015; Exceeds 200 V |
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A1 |
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OEAB |
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16 |
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Using Machine Model (C = 200 pF, R = 0) |
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CLKAB |
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15 |
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OEBA |
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D Package Options Include Plastic |
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CLKBA |
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CLKENAB |
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11 |
14 |
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Small-Outline (DW), Shrink Small-Outline |
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GND |
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12 |
13 |
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CLKENBA |
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(DB), and Thin Shrink Small-Outline (PW) |
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Packages, Ceramic Chip Carriers (FK), |
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SN54ABT2952A . . . FK PACKAGE |
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Ceramic Flat (W) Package, and Plastic (NT) |
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and Ceramic (JT) DIPs |
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(TOP VIEW) |
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description
The 'ABT2952A transceivers consist of two 8-bit back-to-back registers that store data flowing in both directions between two bidirectional buses. Data on the A or B bus is stored in the registers on the low-to-high transition of the clock (CLKAB or CLKBA) input provided that the clock-enable (CLKENAB or CLKENBA) input is low. Taking the output-enable (OEAB or OEBA) input low accesses the data on either port.
To ensure the high-impedance state during power
up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of
the resistor is determined by the current-sinking capability of the driver.
The SN54ABT2952A is characterized for operation over the full military temperature range of ±55°C to 125°C. The SN74ABT2952A is characterized for operation from ±40°C to 85°C.
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B6 |
B7 |
B8 |
NC |
CC |
A8 |
A7 |
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V |
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B5 |
4 |
3 |
2 |
1 |
28 27 26 |
A6 |
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5 |
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25 |
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B4 |
6 |
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24 |
A5 |
B3 |
7 |
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23 |
A4 |
NC |
8 |
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22 |
NC |
B2 |
9 |
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21 |
A3 |
B1 |
10 |
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20 |
A2 |
OEAB |
11 |
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19 |
A1 |
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12 13 14 15 16 17 18 |
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CLKAB |
CLKENAB |
GND |
NC |
CLKENBA |
CLKBA |
OEBA |
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NC ± No internal connection |
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Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright 1998, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.
POST OFFICE BOX 655303 •DALLAS, TEXAS 75265 |
1 |
SN54ABT2952A, SN74ABT2952A
OCTAL BUS TRANSCEIVERS AND REGISTERS
WITH 3-STATE OUTPUTS
SCBS203D ± AUGUST 1992 ± REVISED JANUARY 1998
FUNCTION TABLE²
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INPUTS |
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OUTPUT |
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CLKAB |
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A |
B |
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CLKENAB |
OEAB |
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H |
X |
L |
X |
B |
³ |
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0 |
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H or L |
L |
X |
B |
³ |
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0 |
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L |
↑ |
L |
L |
L |
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L |
↑ |
L |
H |
H |
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X |
X |
H |
X |
Z |
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² A-to-B data flow is shown; B-to-A data flow is similar, but uses CLKENBA, CLKBA, and OEBA.
³Level of B before the indicated steady-state input conditions were established
logic symbol§
15 |
EN3 |
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OEBA |
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13 |
G1 |
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CLKENBA |
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14 |
1 C5 |
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CLKBA |
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9 |
EN4 |
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OEAB |
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11 |
G2 |
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CLKENAB |
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10 |
2 C6 |
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CLKAB |
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16 |
3 |
1 |
5D |
8 |
A1 |
B1 |
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17 |
6D |
1 |
4 |
7 |
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A2 |
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B2 |
18 |
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6 |
A3 |
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B3 |
19 |
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5 |
A4 |
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B4 |
20 |
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4 |
A5 |
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B5 |
21 |
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3 |
A6 |
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B6 |
22 |
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2 |
A7 |
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B7 |
23 |
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1 |
A8 |
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B8 |
§ This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Pin numbers shown are for the DB, DW, JT, NT, PW, and W packages.
2 |
POST OFFICE BOX 655303 •DALLAS, TEXAS 75265 |
SN54ABT2952A, SN74ABT2952A
OCTAL BUS TRANSCEIVERS AND REGISTERS
WITH 3-STATE OUTPUTS
SCBS203D ± AUGUST 1992 ± REVISED JANUARY 1998
logic diagram (positive logic)
11
CLKENAB
10
CLKAB
9
OEAB
13
CLKENBA
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CLKBA |
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15 |
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OEBA |
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C1 |
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16 |
1D |
8 |
A1 |
B1 |
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C1 |
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1D |
To Seven Other Channels
Pin numbers shown are for the DB, DW, JT, NT, PW, and W packages.
POST OFFICE BOX 655303 •DALLAS, TEXAS 75265 |
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