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SN54ABT540, SN74ABT540 |
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OCTAL BUFFERS/DRIVERS |
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WITH 3-STATE OUTPUTS |
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SCBS188C ± FEBRUARY 1991 ± REVISED JANUARY 1997 |
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D State-of-the-Art EPIC-ΙΙB BiCMOS Design |
SN54ABT540 . . . J OR W PACKAGE |
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Significantly Reduces Power Dissipation |
SN74ABT540 . . . DB, DW, N, OR PW PACKAGE |
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D ESD Protection Exceeds 2000 V Per |
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(TOP VIEW) |
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MIL-STD-883, Method 3015; Exceeds 200 V |
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VCC |
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OE1 |
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1 |
20 |
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Using Machine Model (C = 200 pF, R = 0) |
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A1 |
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19 |
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OE2 |
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D Latch-Up Performance Exceeds 500 mA Per |
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A2 |
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18 |
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Y1 |
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JEDEC Standard JESD-17 |
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A3 |
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4 |
17 |
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Y2 |
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D Typical VOLP (Output Ground Bounce) < 1 V |
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A4 |
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5 |
16 |
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Y3 |
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at VCC = 5 V, TA = 25°C |
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A5 |
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6 |
15 |
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Y4 |
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A6 |
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Y5 |
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D High-Drive Outputs (±32-mA IOH, 64-mA IOL) |
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7 |
14 |
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A7 |
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8 |
13 |
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Y6 |
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D Package Options Include Plastic |
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A8 |
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9 |
12 |
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Y7 |
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Small-Outline (DW), Shrink Small-Outline |
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GND |
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10 |
11 |
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Y8 |
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(DB), and Thin Shrink Small-Outline (PW) |
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Packages, Ceramic Chip Carriers (FK), |
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Plastic (N) and Ceramic (J) DIPs, and |
SN54ABT540 . . . FK PACKAGE |
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Ceramic Flat (W) Package |
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(TOP VIEW) |
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description
The 'ABT540 octal buffers and line drivers are ideal for driving bus lines or buffer memory address registers. The devices feature inputs and outputs on opposite sides of the package that facilitate printed circuit board layout.
The 3-state control gate is a 2-input AND gate with active-low inputs so that if either output-enable (OE1 or OE2) input is high, all corresponding outputs are in the high-impedance state.
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A2 |
A1 |
OE1 |
CC |
OE2 |
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V |
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A3 |
3 |
2 |
1 |
20 19 |
Y1 |
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4 |
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18 |
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A4 |
5 |
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17 |
Y2 |
A5 |
6 |
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16 |
Y3 |
A6 |
7 |
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15 |
Y4 |
A7 |
8 |
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14 |
Y5 |
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9 |
10 11 12 13 |
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A8 |
GND |
Y8 |
Y7 |
Y6 |
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To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
The SN54ABT540 is characterized for operation over the full military temperature range of ±55°C to 125°C. The SN74ABT540 is characterized for operation from ±40°C to 85°C.
FUNCTION TABLE
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INPUTS |
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OUTPUT |
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A |
Y |
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OE1 |
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OE2 |
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L |
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L |
L |
H |
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L |
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H |
L |
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H |
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X |
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Z |
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X |
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H |
X |
Z |
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Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC-ΙΙB is a trademark of Texas Instruments Incorporated.
UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright 1997, Texas Instruments Incorporated
POST OFFICE BOX 655303 •DALLAS, TEXAS 75265 |
1 |
SN54ABT540, SN74ABT540
OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCBS188C ± FEBRUARY 1991 ± REVISED JANUARY 1997
logic symbol² |
logic diagram (positive logic) |
1 |
& |
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OE1 |
1 |
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OE1 |
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19 |
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EN |
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19 |
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OE2 |
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OE2 |
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2 |
1 |
18 |
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A1 |
Y1 |
A1 |
2 |
18 |
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3 |
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17 |
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Y1 |
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A2 |
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Y2 |
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4 |
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16 |
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A3 |
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Y3 |
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5 |
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15 |
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A4 |
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Y4 |
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6 |
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14 |
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To Seven Other Channels |
A5 |
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Y5 |
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7 |
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13 |
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A6 |
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Y6 |
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8 |
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12 |
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A7 |
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Y7 |
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9 |
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11 |
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A8 |
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Y8 |
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²This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)³
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. ±0.5 V to 7 |
V |
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. ±0.5 V to 7 |
V |
Voltage range applied to any output in the high or power-off state, VO . . . . . . . . . . . . . . . . . . . |
±0.5 V to 5.5 |
V |
Current into any output in the low state, IO: SN54ABT540 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . . . . 96 mA |
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SN74ABT540 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . . . 128 mA |
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Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . . . ±18 mA |
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Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . . . ±50 mA |
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Package thermal impedance, θJA (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . . 115°C/W |
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DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . . . 97°C/W |
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N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . . . 67°C/W |
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PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . . 128°C/W |
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Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
±65°C to 150°C |
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³ Stresses beyond those listed under ªabsolute maximum ratingsº may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under ªrecommended operating conditionsº is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2.The package thermal impedance is calculated in accordance with EIA/JEDEC Std JESD51, except for through-hole packages, which use a trace length of zero.
recommended operating conditions (see Note 3)
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SN54ABT540 |
SN74ABT540 |
UNIT |
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MIN |
MAX |
MIN |
MAX |
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VCC |
Supply voltage |
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4.5 |
5.5 |
4.5 |
5.5 |
V |
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VIH |
High-level input voltage |
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2 |
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2 |
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V |
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VIL |
Low-level input voltage |
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0.8 |
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0.8 |
V |
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VI |
Input voltage |
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0 |
VCC |
0 |
VCC |
V |
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IOH |
High-level output current |
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±24 |
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±32 |
mA |
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IOL |
Low-level output current |
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48 |
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64 |
mA |
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t/ v |
Input transition rise or fall rate |
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Outputs enabled |
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5 |
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5 |
ns/V |
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TA |
Operating free-air temperature |
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±55 |
125 |
±40 |
85 |
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NOTE 3: Unused inputs must be held high or low to prevent them from floating. |
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PRODUCT PREVIEW information concerns products in the formative or |
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design phase of development. Characteristic data and other |
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specifications are design goals. Texas Instruments reserves the right to |
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change or discontinue these products without notice. |
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2 |
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POST OFFICE BOX 655303 •DALLAS, TEXAS 75265 |
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