Texas Instruments SN74AC86D, SN74AC86DBLE, SN74AC86DBR, SN74AC86DR, SN74AC86N Datasheet
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SN54AC86, SN74AC86 |
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QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES |
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SCAS533A ± AUGUST 1995 ± REVISED MAY 1996 |
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D EPIC (Enhanced-Performance Implanted |
SN54AC86 . . . J OR W PACKAGE |
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CMOS) 1- m Process |
SN74AC86 . . . D, DB, N, OR PW PACKAGE |
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D Package Options Include Plastic |
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(TOP VIEW) |
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Small-Outline (D), Shrink Small-Outline |
1A |
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1 |
14 |
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VCC |
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(DB), and Thin Shrink Small-Outline (PW) |
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1B |
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2 |
13 |
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4B |
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Packages, Ceramic Chip Carriers (FK) and |
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1Y |
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3 |
12 |
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4A |
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Flatpacks (W), and Standard Plastic (N) and |
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2A |
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4 |
11 |
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4Y |
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Ceramic (J) DIPs |
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2B |
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5 |
10 |
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3B |
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description |
2Y |
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6 |
9 |
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3A |
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GND |
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7 |
8 |
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3Y |
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The 'AC86 are quadruple 2-input exclusive-OR |
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gates. The devices perform the Boolean function |
SN54AC86 . . . FK PACKAGE |
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Y = A B or Y = AB + AB in positive logic. |
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(TOP VIEW) |
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A common application is as a true/complement element. If one of the inputs is low, the other input is reproduced in true form at the output. If one of the inputs is high, the signal on the other input is reproduced inverted at the output.
The SN54AC86 is characterized for operation over the full military temperature range of ±55°C to 125°C. The SN74AC86 is characterized for operation from ±40°C to 85°C.
FUNCTION TABLE (each gate)
INPUTS |
OUTPUT |
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A |
B |
Y |
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L |
L |
L |
L |
H |
H |
H |
L |
H |
H |
H |
L |
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1B |
1A |
NC |
CC |
4B |
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V |
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1Y |
3 |
2 |
1 |
20 19 |
4A |
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4 |
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18 |
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NC |
5 |
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17 |
NC |
2A |
6 |
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16 |
4Y |
NC |
7 |
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15 |
NC |
2B |
8 |
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14 |
3B |
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9 |
10 11 12 13 |
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2Y |
GND |
NC |
3Y |
3A |
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NC ± No internal connection
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright 1996, Texas Instruments Incorporated
POST OFFICE BOX 655303 •DALLAS, TEXAS 75265 |
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SN54AC86, SN74AC86
QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES
SCAS533A ± AUGUST 1995 ± REVISED MAY 1996
logic symbol²
1 |
= 1 |
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1A |
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3 |
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2 |
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1Y |
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1B |
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4 |
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6 |
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2A |
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5 |
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2Y |
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2B |
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9 |
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3A |
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8 |
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10 |
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3Y |
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3B |
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12 |
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11 |
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4A |
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13 |
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4Y |
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4B |
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² This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the D, DB, J, N, PW, and W packages.
exclusive-OR logic
An exclusive-OR gate has many applications, some of which can be represented better by alternative logic symbols.
EXCLUSIVE OR
= 1
These five equivalent exclusive-OR symbols are valid for an 'AC86 gate in positive logic; negation may be shown at any two ports.
LOGIC-IDENTITY ELEMENT |
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EVEN-PARITY ELEMENT |
ODD-PARITY ELEMENT |
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= |
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2k |
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2k + 1 |
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The output is active (low) if |
The output is active (low) if |
The output is active (high) |
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all inputs stand at the same |
an even number of inputs |
if an odd number of inputs |
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logic level (i.e., A = B). |
(i.e., 0 or 2) are active. |
(i.e., only 1 of the 2) are |
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active. |
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POST OFFICE BOX 655303 •DALLAS, TEXAS 75265 |
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