TPS7301Q, TPS7325Q, TPS7330Q, TPS7333Q, TPS7348Q, TPS7350Q LOW-DROPOUT VOLTAGE REGULATORS WITH INTEGRATED DELAYED RESET FUNCTION
SLVS124F ± JUNE 1995 ± REVISED JANUARY 1999
D Available in 2.5-V, 3-V, 3.3-V, 4.85-V, and 5-V |
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D OR P PACKAGE |
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Fixed-Output and Adjustable Versions |
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(TOP VIEW) |
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D Integrated Precision Supply-Voltage |
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GND |
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1 |
8 |
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RESET |
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Supervisor Monitoring Regulator Output |
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SENSE² /FB³ |
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EN |
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7 |
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Voltage |
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IN |
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3 |
6 |
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OUT |
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D Active-Low Reset Signal with 200-ms Pulse |
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4 |
5 |
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OUT |
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Width |
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DVery Low Dropout Voltage . . . Maximum of 35 mV at IO = 100 mA (TPS7350)
DLow Quiescent Current ± Independent of Load . . . 340 A Typ
DExtremely Low Sleep-State Current,
0.5A Max
D2% Tolerance Over Full Range of Load,
Line, and Temperature for Fixed-Output Versions§
DOutput Current Range of 0 mA to 500 mA
DTSSOP Package Option Offers Reduced Component Height For Critical Applications
description
PW PACKAGE (TOP VIEW)
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GND |
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1 |
20 |
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RESET |
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GND |
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2 |
19 |
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NC |
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GND |
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18 |
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NC |
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NC |
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17 |
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FB³ |
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NC |
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16 |
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NC |
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15 |
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SENSE² |
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EN |
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NC |
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7 |
14 |
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OUT |
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8 |
13 |
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OUT |
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IN |
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9 |
12 |
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NC |
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IN |
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NC |
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The TPS73xx devices are members of a family of micropower low-dropout (LDO) voltage regulators.
They are differentiated from the TPS71xx and TPS72xx LDOs by their integrated delayed microprocessor-reset function. If the precision delayed reset is not required, the TPS71xx and TPS72xx should be considered.¶
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AVAILABLE OPTIONS |
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OUTPUT VOLTAGE |
NEGATIVE-GOING |
RESET |
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PACKAGED DEVICES |
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(V) |
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THRESHOLD VOLTAGE (V) |
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CHIP FORM |
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TJ |
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SMALL |
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PLASTIC DIP |
TSSOP |
(Y) |
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MIN |
TYP |
MAX |
MIN |
TYP |
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OUTLINE |
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(P) |
(PW) |
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(D) |
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4.9 |
5 |
5.1 |
4.55 |
4.65 |
4.75 |
TPS7350QD |
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TPS7350QP |
TPS7350QPW |
TPS7350Y |
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4.75 |
4.85 |
4.95 |
4.5 |
4.6 |
4.7 |
TPS7348QD |
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TPS7348QP |
TPS7348QPW |
TPS7348Y |
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±40°C to |
3.23 |
3.3 |
3.37 |
2.868 |
2.934 |
3 |
TPS7333QD |
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TPS7333QP |
TPS7333QPW |
TPS7333Y |
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2.94 |
3 |
3.06 |
2.58 |
2.64 |
2.7 |
TPS7330QD |
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TPS7330QP |
TPS7330QPW |
TPS7330Y |
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125°C |
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2.425 |
2.5 |
2.575 |
2.23 |
2.32 |
2.39 |
TPS7325QD |
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TPS7325QP |
TPS7325QPW |
TPS7325Y |
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Adjustable |
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1.101 |
1.123 |
1.145 |
TPS7301QD |
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TPS7301QP |
TPS7301QPW |
TPS7301Y |
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1.2 V to 9.75 V |
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The D and PW packages are available taped and reeled. Add an R suffix to device type (e.g., TPS7350QDR). The TPS7301Q is programmable using an external resistor divider (see application information). The chip form is tested at 25°C.
§ The TPS7325 has a tolerance of ± 3% over the full temperature range.
¶The TPS71xx and the TPS72xx are 500-mA and 250-mA output regulators respectively, offering performance similar to that of the TPS73xx but without the delayed-reset function. The TPS72xx devices are further differentiated by availability in 8-pin thin-shrink small-outline packages (TSSOP) for applications requiring minimum package size.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright 1999, Texas Instruments Incorporated
POST OFFICE BOX 655303 •DALLAS, TEXAS 75265 |
1 |
TPS7301Q, TPS7325Q, TPS7330Q, TPS7333Q, TPS7348Q, TPS7350Q
LOW-DROPOUT VOLTAGE REGULATORS
WITH INTEGRATED DELAYED RESET FUNCTION
SLVS124F ± JUNE 1995 ± REVISED JANUARY 1999
description (continued)
The RESET output of the TPS73xx initiates a reset in microcomputer and microprocessor systems in the event of an undervoltage condition. An internal comparator in the TPS73xx monitors the output voltage of the regulator to detect an undervoltage condition on the regulated output voltage.
If that occurs, the RESET output (open-drain NMOS) turns on, taking the RESET signal low. RESET stays low for the duration of the undervoltage condition. Once the undervoltage condition ceases, a 200-ms (typ) time-out begins. At the completion of the 200-ms delay, RESET goes high.
An order of magnitude reduction in dropout voltage and quiescent current over conventional LDO performance is achieved by replacing the typical pnp pass transistor with a PMOS device.
Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (maximum of 35 mV at an output current of 100 mA for the TPS7350) and is directly proportional to the output current (see Figure 1). Additionally, since the PMOS pass element is a voltage-driven device, the quiescent current is low and remains constant, independent of output loading (typically 340 A over the full range of output current, 0 mA to 500 mA). These two key specifications yield a significant improvement in operating life for battery-powered systems.
The LDO family also features a sleep mode; applying a logic high signal to EN (enable) shuts down the regulator, reducing the quiescent current to 0.5 A maximum at TJ = 25°C.
The TPS73xx is offered in 2.5-V, 3-V, 3.3-V, 4.85-V, and 5-V fixed-voltage versions and in an adjustable version (programmable over the range of 1.2 V to 9.75 V). Output voltage tolerance is specified as a maximum of 2% over line, load, and temperature ranges (3% for the 2.5 V and the adjustable version). The TPS73xx family is available in PDIP (8 pin), SO (8 pin) and TSSOP (20 pin) packages. The TSSOP has a maximum height of 1.2 mm.
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0.3 |
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TA = 25°C |
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TPS7330 |
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0.25 |
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TPS7333 |
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± V |
0.2 |
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TPS7325 |
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Voltage |
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0.15 |
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Dropout |
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TPS7348 |
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0.1 |
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TPS7350 |
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0.05 |
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0 |
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0 |
50 |
100 |
150 |
200 |
250 |
300 |
350 |
400 |
450 |
500 |
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IO ± Output Current ± mA |
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TPS73xxPW² |
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VI |
8 |
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20 |
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To System |
IN |
RESET |
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Reset |
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9 |
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15 |
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250 kΩ |
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IN |
SENSE |
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10 |
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14 |
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VO |
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IN |
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OUT |
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0.1 µF |
6 |
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13 |
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EN |
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OUT |
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CO³ |
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+ |
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GND |
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10 |
µF |
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1 |
2 |
3 |
CSR = 1 Ω |
² TPS7325, TPS7330, TPS7333, TPS7348, TPS7350 (fixed-voltage
options)
³Capacitor selection is nontrivial. See application information section for details.
Figure 1. Dropout Voltage Versus Output Current |
Figure 2. Typical Application Configuration |
2 |
POST OFFICE BOX 655303 •DALLAS, TEXAS 75265 |
TPS7301Q, TPS7325Q, TPS7330Q, TPS7333Q, TPS7348Q, TPS7350Q
LOW-DROPOUT VOLTAGE REGULATORS
WITH INTEGRATED DELAYED RESET FUNCTION
SLVS124F ± JUNE 1995 ± REVISED JANUARY 1999
TPS73xxY chip information
These chips, when properly assembled, display characteristics similar to those of the TPS73xxQ. Thermal compression or ultrasonic bonding may be used on the doped aluminum bonding pads. Chips may be mounted with conductive epoxy or a gold-silicon preform.
BONDING PAD ASSIGNMENTS
(5) |
(4) |
(6)
(7)
80
(1) |
(2) |
(3) |
92
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(5) |
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(3) |
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SENSE² |
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IN |
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(6) |
FB³ |
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(2) |
TPS73xx |
(4) |
OUT |
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EN |
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(7) |
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RESET |
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(1) GND
CHIP THICKNESS: 15 TYPICAL
BONDING PADS: 4 × 4 MINIMUM
TJmax = 150°C
TOLERANCES ARE ± 10%.
ALL DIMENSIONS ARE IN MILS.
² SENSE ± Fixed voltage options only (TPS7325, TPS7330, TPS7333, TPS7348, and TPS7350)
³ FB ± Adjustable version only (TPS7301)
NOTE A. For most applications, OUT and SENSE should be tied together as close as possible to the device; for other implementations, refer to SENSE-pin connection discussion in the applications information section of this data sheet.
functional block diagram |
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IN |
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RESISTOR DIVIDER OPTIONS |
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EN |
¶ |
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¶ |
¶ |
DEVICE |
R1 |
R2 |
UNIT |
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∞ |
Ω |
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TPS7301 |
0 |
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RESET |
TPS7325 |
260 |
233 |
kΩ |
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TPS7330 |
358 |
233 |
kΩ |
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_ |
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TPS7333 |
420 |
233 |
kΩ |
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+ |
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TPS7348 |
726 |
233 |
kΩ |
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OUT |
TPS7350 |
756 |
233 |
kΩ |
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NOTE A. Resistors are nominal values only. |
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+ |
Delayed |
SENSE§/FB |
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Vref |
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Reset |
R1 |
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COMPONENT COUNT |
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MOS transistors |
464 |
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R2 |
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Bilpolar transistors |
41 |
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Diodes |
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4 |
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Capacitors |
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Resistors |
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GND
§ For most applications, SENSE should be externally connected to OUT as close as possible to the device. For other implementations, refer to SENSE-pin connection discussion in applications information section.
¶ Switch positions are shown with EN low (active).
POST OFFICE BOX 655303 •DALLAS, TEXAS 75265 |
3 |
TPS7301Q, TPS7325Q, TPS7330Q, TPS7333Q, TPS7348Q, TPS7350Q
LOW-DROPOUT VOLTAGE REGULATORS
WITH INTEGRATED DELAYED RESET FUNCTION
SLVS124F ± JUNE 1995 ± REVISED JANUARY 1999
timing diagram
VI |
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Vres² |
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Vres |
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t |
VO |
V |
V |
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IT + |
IT + |
Threshold |
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Voltage |
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VIT ± |
VIT ± |
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t |
RESET |
200 ms |
200 ms |
Output |
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Delay |
Delay |
Output |
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Output |
Undefined |
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Undefined |
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t |
²Vres is the minimum input voltage for a valid RESET. The symbol Vres is not currently listed within EIA or JEDEC standards for semiconductor symbology.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)³
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Input voltage range§, VI, |
RESET, SENSE, EN . . . . . . . . . . . . . . . . . . . . |
. . . . . . . . . . . . . . . . . . . . ±0.3 V to 11 |
V |
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Output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 |
A |
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Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
See Dissipation Rating Tables 1 and 2 |
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Operating virtual junction temperature range, TJ . . . . . . . . . . . . . . . . . . |
. . . . . . . . . . . . . . . . . . . ±55°C to 150°C |
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Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . . . . . . . . . . . . . . . . ±65°C to 150°C |
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Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . |
. . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C |
³Stresses beyond those listed under ªabsolute maximum ratingsº may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under ªrecommended operating conditionsº is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
§ All voltage values are with respect to network terminal ground.
4 |
POST OFFICE BOX 655303 •DALLAS, TEXAS 75265 |
TPS7301Q, TPS7325Q, TPS7330Q, TPS7333Q, TPS7348Q, TPS7350Q LOW-DROPOUT VOLTAGE REGULATORS WITH INTEGRATED DELAYED RESET FUNCTION
SLVS124F ± JUNE 1995 ± REVISED JANUARY 1999
DISSIPATION RATING TABLE 1 ± FREE-AIR TEMPERATURE (SEE FIGURE 3)
PACKAGE |
TA ≤ 25°C |
DERATING FACTOR |
TA = 70°C |
TA = 125°C |
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POWER RATING |
ABOVE TA = 25°C |
POWER RATING |
POWER RATING |
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D |
725 mW |
5.8 mW/°C |
464 mW |
145 mW |
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P |
1175 mW |
9.4 mW/°C |
752 mW |
235 mW |
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PW² |
700 mW |
5.6 mW/°C |
448 mW |
140 mW |
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DISSIPATION RATING TABLE 2 ± CASE TEMPERATURE (SEE FIGURE 4) |
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PACKAGE |
TC ≤ 25°C |
DERATING FACTOR |
TC = 70°C |
TC = 125°C |
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POWER RATING |
ABOVE TC = 25°C |
POWER RATING |
POWER RATING |
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D |
2188 mW |
9.4 mW/°C |
1765 mW |
1248 mW |
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P |
2738 mW |
21.9 mW/°C |
1752 mW |
548 mW |
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PW² |
4025 mW |
32.2 mW/°C |
2576 mW |
805 mW |
²Refer to Thermal Information section for detailed power dissipation considerations when using the TSSOP package.
MAXIMUM CONTINUOUS DISSIPATION |
MAXIMUM CONTINUOUS DISSIPATION |
vs |
vs |
FREE-AIR TEMPERATURE |
CASE TEMPERATURE |
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1400 |
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4800 |
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± mW |
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±mW |
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4400 |
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1200 |
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4000 |
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Dissipation |
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Dissipation |
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3600 |
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1000 |
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P Package |
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3200 |
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RθJA = 106°C/W |
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2800 |
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Continuous |
800 |
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Continuous |
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2400 |
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600 |
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D Package |
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2000 |
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RθJA = 172°C/W |
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1600 |
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Maximum |
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Maximum |
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400 |
PW Package |
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1200 |
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200 |
RθJA = 178°C/W |
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800 |
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± |
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± |
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D |
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D |
400 |
P |
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P |
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0 |
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125 |
150 |
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0 |
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25 |
50 |
75 |
100 |
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TA ± Free-Air Temperature ± °C |
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PW Package
RθJC = 37°C/W |
P Package |
RθJC = 46°C/W |
D Package |
RθJC = 57°C/W |
25 |
50 |
75 |
100 |
125 |
150 |
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TC ± Case Temperature ± °C |
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Figure 3 |
Figure 4 |
POST OFFICE BOX 655303 •DALLAS, TEXAS 75265 |
5 |
TPS7301Q, TPS7325Q, TPS7330Q, TPS7333Q, TPS7348Q, TPS7350Q
LOW-DROPOUT VOLTAGE REGULATORS
WITH INTEGRATED DELAYED RESET FUNCTION
SLVS124F ± JUNE 1995 ± REVISED JANUARY 1999
recommended operating conditions
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MIN |
MAX |
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TPS7301Q |
2.47 |
10 |
V |
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TPS7325Q |
3.1 |
10 |
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Input voltage, VI² |
TPS7330Q |
3.5 |
10 |
V |
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TPS7333Q |
3.77 |
10 |
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V |
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TPS7348Q |
5.2 |
10 |
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TPS7350Q |
5.33 |
10 |
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High-level input voltage at |
EN, |
VIH |
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Low-level input voltage at |
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Output current range, IO |
0 |
500 |
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Operating virtual junction temperature range, TJ |
± 40 |
125 |
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²Minimum input voltage defined in the recommended operating conditions is the maximum specified output voltage plus dropout voltage, VDO, at the maximum specified load range. Since dropout voltage is a function of output current, the usable range can be extended for lighter loads. To calculate the minimum input voltage for the maximum load current used in a given application, use the following equation:
VI(min) + VO(max) )VDO(max load)
Becausethe TPS7301 is programmable, rDS(on) should be used to calculate VDO beforeapplyingtheaboveequation.Theequationforcalculating
VDO from rDS(on) is given in Note 2 in the TPS7301 electrical characteristics table. The minimum value of 2.97 V is the absolute lower limit for the recommended input voltage range for the TPS7301.
6 |
POST OFFICE BOX 655303 •DALLAS, TEXAS 75265 |
TPS7301Q, TPS7325Q, TPS7330Q, TPS7333Q, TPS7348Q, TPS7350Q
LOW-DROPOUT VOLTAGE REGULATORS
WITH INTEGRATED DELAYED RESET FUNCTION
SLVS124F ± JUNE 1995 ± REVISED JANUARY 1999
electrical characteristics at IO = 10 mA, EN = 0 V, Co = 4.7 µF (CSR³ = 1 Ω), SENSE/FB shorted to
OUT (unless otherwise noted)
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PARAMETER |
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TEST CONDITIONS§ |
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TYP |
MAX |
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J |
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25°C |
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340 |
400 |
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Ground current (active mode) |
EN ≤ 0.5 V, |
VI = VO + 1 V, |
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A |
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0 mA ≤ IO ≤ 500 mA |
± 40°C to 125°C |
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550 |
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Input current (standby mode) |
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= VI, |
2.7 V ≤ VI ≤ 10 V |
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25°C |
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0.01 |
0.5 |
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EN |
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± 40°C to 125°C |
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2 |
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Output current limit |
VO = 0 V, |
VI = 10 V |
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25°C |
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1.2 |
2 |
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± 40°C to 125°C |
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2 |
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Pass-element leakage current in standby |
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25°C |
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EN = VI, |
2.7 V ≤ VI ≤ 10 V |
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mode |
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1 |
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± 40 C to 125 C |
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leakage current |
Normal operation, |
V at |
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= 10 V |
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25°C |
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0.02 |
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A |
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RESET |
RESET |
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± 40°C to 125°C |
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0.5 |
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Output voltage temperature coefficient |
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± 40°C to 125°C |
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61 |
75 |
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Thermal shutdown junction temperature |
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165 |
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°C |
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logic high (standby mode) |
2.5 V ≤ VI ≤ 6 V |
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±40°C to 125°C |
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V |
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EN |
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6 V ≤ VI ≤ 10 V |
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2.7 |
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logic low (active mode) |
2.7 V ≤ VI ≤ 10 V |
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25°C |
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0.5 |
V |
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EN |
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± 40°C to 125°C |
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0.5 |
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hysteresis voltage |
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25°C |
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EN |
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input current |
0 V ≤ VI ≤ 10 V |
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25°C |
± 0.5 |
0.001 |
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A |
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EN |
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± 40°C to 125°C |
± 0.5 |
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0.5 |
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Minimum VI for active pass element |
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25°C |
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2.05 |
2.5 |
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± 40°C to 125°C |
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2.5 |
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IO(RESET) = ±300 A |
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25°C |
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1 |
1.5 |
V |
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Minimum VI for valid RESET |
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± 40°C to 125°C |
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1.9 |
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³CSR (compensation series resistance) refers to the total series resistance, including the equivalent series resistance (ESR) of the capacitor, any series resistance added externally, and PWB trace resistance to Co.
§Pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; thermal effects must be taken into account separately.
POST OFFICE BOX 655303 •DALLAS, TEXAS 75265 |
7 |
TPS7301Q, TPS7325Q, TPS7330Q, TPS7333Q, TPS7348Q, TPS7350Q
LOW-DROPOUT VOLTAGE REGULATORS
WITH INTEGRATED DELAYED RESET FUNCTION
SLVS124F ± JUNE 1995 ± REVISED JANUARY 1999
TPS7301Q electrical characteristics at IO = 10 mA, VI = 3.5 V, EN = 0 V, Co = 4.7 µF (CSR² = 1 Ω), FB shorted to OUT at device leads (unless otherwise noted)
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PARAMETER |
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TEST CONDITIONS³ |
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T |
MIN |
TYP |
MAX |
UNIT |
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J |
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25°C |
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1.182 |
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V |
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Reference voltage (measured at FB) |
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2.5 V ≤ VI ≤ 10 V, |
5 mA ≤ IO ≤ 500 mA, |
± 40°C to 125°C |
1.147 |
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1.217 |
V |
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See Note 1 |
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Reference voltage temperature |
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± 40°C to 125°C |
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61 |
75 |
ppm/°C |
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coefficient |
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VI = 2.4 V, |
50 A ≤ IO |
≤ 150 mA |
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25°C |
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0.7 |
1 |
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± 40°C to 125°C |
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1 |
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VI = 2.4 V, |
150 mA ≤ IO ≤ 500 mA |
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25°C |
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0.83 |
1.3 |
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Pass-element series resistance |
± 40°C to 125°C |
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1.3 |
Ω |
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(See Note 2) |
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0.52 |
0.85 |
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VI = 2.9 V, |
50 A ≤ IO |
≤ 500 mA |
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25 C |
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± 40°C to 125°C |
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0.85 |
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VI = 3.9 V, |
50 A ≤ IO ≤ 500 mA |
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25°C |
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0.32 |
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VI = 5.9 V, |
50 A ≤ IO ≤ 500 mA |
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25°C |
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0.23 |
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Input regulation |
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VI = 2.5 V to 10 V, |
50 A ≤ IO ≤ 500 mA, |
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25°C |
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3 |
18 |
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See Note 1 |
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± 40 C to 125 C |
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2.5 V ≤ VI ≤ 10 V, |
IO = 5 mA to 500 mA, |
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25°C |
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See Note 1 |
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Output regulation |
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± 40 C to 125 C |
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2.5 V ≤ VI ≤ 10 V, |
IO = 50 A to 500 mA, |
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25°C |
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7 |
22 |
mV |
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See Note 1 |
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± 40 C to 125 C |
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IO = 50 A |
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25°C |
48 |
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Ripple rejection |
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f = 120 Hz |
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± 40°C to 125°C |
44 |
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IO = 500 mA, |
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25°C |
45 |
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See Note 1 |
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44 |
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± 40 C to 125 C |
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25°C |
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Output noise-spectral density |
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f = 120 Hz |
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V/√ |
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Co = 4.7 F |
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25°C |
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Output noise voltage |
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10 Hz ≤ f ≤ 100 kHz |
Co = 10 F |
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25°C |
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Vrms |
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Co = 100 F |
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25°C |
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74 |
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VO(FB) decreasing |
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1.101 |
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1.145 |
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RESET trip-threshold voltage |
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± 40 C to 125 C |
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Measured at VO(FB) |
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RESET hysteresis voltage |
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25 C |
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output low voltage§ |
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V = 2.13 V, |
I |
= 400 A |
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25°C |
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0.1 |
0.4 |
V |
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RESET |
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I |
O(RESET) |
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± 40°C to 125°C |
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0.4 |
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FB input current |
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25°C |
± 10 |
0.1 |
10 |
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± 40°C to 125°C |
± 20 |
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²CSR refers to the total series resistance, including the ESR of the capacitor, any series resistance added externally, and PWB trace resistance to Co.
³Pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; thermal effects must be taken into account separately.
§ Output voltage programmed to 2.5 V with closed-loop configuration (see application information).
NOTES: 1. When VI < 2.9 V and IO > 150 mA simultaneously, pass element rDS(on) increases (see Figure 33) to a point where the resulting dropout voltage prevents the regulator from maintaining the specified tolerance range.
2.To calculate dropout voltage, use equation: VDO = IO rDS(on)
rDS(on) is a function of both output current and input voltage. This parametric table lists rDS(on) for VI = 2.4 V, 2.9 V, 3.9 V, and 5.9 V, which corresponds to dropout conditions for programmed output voltages of 2.5 V, 3 V, 4 V, and 6 V respectively. For other
programmed values, refer to Figure 33.
8 |
POST OFFICE BOX 655303 •DALLAS, TEXAS 75265 |
TPS7301Q, TPS7325Q, TPS7330Q, TPS7333Q, TPS7348Q, TPS7350Q
LOW-DROPOUT VOLTAGE REGULATORS
WITH INTEGRATED DELAYED RESET FUNCTION
SLVS124F ± JUNE 1995 ± REVISED JANUARY 1999
TPS7325Q electrical characteristics at I = 10 mA, V |
= 3.5 V, |
EN |
= 0 V, C |
o |
= 10 µF (CSR² = 1 Ω), SENSE |
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O |
I |
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shorted to OUT (unless otherwise noted) |
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||||
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|
PARAMETER |
|
TEST CONDITIONS³ |
|
|
|
T |
|
|
MIN |
TYP |
MAX |
UNIT |
|||
|
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|
J |
|
|
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|
Output voltage |
|
|
|
|
|
|
25°C |
|
|
2.45 |
2.5 |
2.55 |
V |
|||
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|
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|
|
|
|||||
|
3.5 V ≤ VI ≤ 10 V, |
5 mA ≤ IO ≤ 500 mA |
± 40°C to 125°C |
2.425 |
|
2.575 |
|||||||||||
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||||||||||
|
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IO = 10 mA, |
VI = 2.97 V |
|
25°C |
|
|
|
5 |
|
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||
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||||
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± 40°C to 125°C |
|
|
14 |
|
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|||||||
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|||||
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|
Dropout voltage§ |
|
I = 100 mA, |
V = 2.97 V |
|
25°C |
|
|
|
50 |
80 |
mV |
|||||
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|
|||||||||
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|
||||||||||
|
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|
O |
I |
|
|
± 40°C to 125°C |
|
|
150 |
|
|
|
|||
|
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|||||
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|
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|
IO = 500 mA, |
VI = 2.97 V |
|
25°C |
|
|
|
270 |
400 |
|
|
|
||
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||||
|
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|
|
± 40°C to 125°C |
|
|
600 |
|
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|||||||
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|||||
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|
|
|
|
Pass-element series resistance |
§ |
(2.97 V ± VO)/IO, |
VI = 2.97 V, |
|
25°C |
|
|
|
0.5 |
0.7 |
Ω |
|||||
|
|
|
|
|
|
|
|
||||||||||
|
|
I = 500 mA |
|
|
|
° |
|
° |
|
|
1.4 |
||||||
|
|
|
|
O |
|
|
|
± 40 C to 125 C |
|
|
|
|
|
||||
|
Input regulation |
|
VI = 3.5 V to 10 V, |
50 A ≤ IO ≤ 500 mA |
|
25°C |
|
|
|
6 |
20 |
mV |
|||||
|
|
|
|
|
|
|
|
|
|||||||||
|
± 40°C to 125°C |
|
|
25 |
|||||||||||||
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|||||
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|
|
|
|
|
|
IO = 5 mA to 500 mA, |
3.5 V ≤ VI ≤ 10 V |
|
25°C |
|
|
|
20 |
32 |
mV |
||||
|
|
|
|
|
|
|
|
|
|
|
|||||||
|
Output regulation |
|
± 40°C to 125°C |
|
|
50 |
|||||||||||
|
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|||||||
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|
|
|
|
||
|
IO = 50 A to 500 mA, |
3.5 V ≤ VI ≤ 10 V |
|
25°C |
|
|
|
28 |
60 |
mV |
|||||||
|
|
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|
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||||||||||
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|
|||||||
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|
± 40°C to 125°C |
|
|
100 |
||||||||||
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|||||
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|
IO = 50 A |
|
25°C |
|
|
50 |
53 |
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|||
|
Ripple rejection |
|
f = 120 Hz |
± 40°C to 125°C |
49 |
|
|
dB |
|||||||||
|
|
|
|
|
|
|
|||||||||||
|
|
|
|
|
|
|
|
|
|
|
|
||||||
|
IO = 500 mA |
|
25°C |
|
|
49 |
53 |
|
|||||||||
|
|
|
|
|
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|
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||||||
|
|
|
|
|
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|
|
|
|
|
|
|
|
|
|||
|
|
|
|
|
± 40°C to 125°C |
32 |
|
|
|
|
|
||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|||||
|
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|
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|
|
|
|
|
|
|
|
|
|
|
|
|
|
25°C |
|
|
|
|
|
|
||
|
Output noise-spectral density |
|
f = 120 Hz |
|
|
|
|
|
|
|
2 |
|
V/√ |
Hz |
|
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
|
|
|
|
Co = 4.7 F |
|
25°C |
|
|
|
274 |
|
|
|
|
||
|
Output noise voltage |
|
10 Hz ≤ f ≤ 100 kHz |
Co = 10 F |
|
25°C |
|
|
|
228 |
|
Vrms |
|||||
|
|
|
|
|
Co = 100 F |
|
25°C |
|
|
|
159 |
|
|
|
|
||
|
|
|
VO decreasing |
|
|
|
± 40°C to 125°C |
2.23 |
2.32 |
2.39 |
V |
||||||
|
RESET |
trip-threshold voltage |
|
|
|
|
|||||||||||
|
|
|
|
|
|
|
|
|
25°C |
|
|
|
0.14 |
0.4 |
|
|
|
|
RESET output low voltage |
|
VI = 2.1 V, |
IO(RESET) = ±0.8 mA |
|
|
|
|
V |
||||||||
|
|
|
|
|
|
|
|
|
|||||||||
|
|
± 40°C to 125°C |
|
|
0.4 |
||||||||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
²CSR refers to the total series resistance, including the ESR of the capacitor, any series resistance added externally, and PWB trace resistance to Co.
³Pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; thermal effects must be taken into account separately.
§Dropout test and pass-element series resistance test are not production tested. Test method requires SENSE terminal to be disconnected from output voltage.
POST OFFICE BOX 655303 •DALLAS, TEXAS 75265 |
9 |
TPS7301Q, TPS7325Q, TPS7330Q, TPS7333Q, TPS7348Q, TPS7350Q
LOW-DROPOUT VOLTAGE REGULATORS
WITH INTEGRATED DELAYED RESET FUNCTION
SLVS124F ± JUNE 1995 ± REVISED JANUARY 1999
TPS7330Q electrical characteristics at IO = 10 mA, VI = 4 V, EN = 0 V, Co = 4.7 µF (CSR² = 1 Ω), SENSE shorted to OUT (unless otherwise noted)
|
|
PARAMETER |
TEST CONDITIONS³ |
|
T |
MIN |
TYP |
MAX |
UNIT |
|||
|
|
|
|
|
|
J |
|
|
|
|
|
|
|
Output voltage |
|
|
|
25°C |
|
3 |
|
V |
|||
|
|
|
|
|
|
|
|
|||||
4 V ≤ VI ≤ 10 V, |
5 mA ≤ IO ≤ 500 mA |
± 40°C to 125°C |
2.94 |
|
3.06 |
|||||||
|
|
|
|
|
|
|
||||||
|
|
|
IO = 10 mA, |
VI = 2.94 V |
|
25°C |
|
5.2 |
7 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
|
|
± 40°C to 125°C |
|
|
10 |
|
|
|
|||
|
|
|
|
|
|
|
|
|
|
|||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Dropout voltage |
IO = 100 mA, |
VI = 2.94 V |
|
25°C |
|
52 |
75 |
mV |
|||
|
|
|
|
|
|
|||||||
± 40°C to 125°C |
|
|
100 |
|||||||||
|
|
|
|
|
|
|
|
|
|
|||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
IO = 500 mA, |
VI = 2.94 V |
|
25°C |
|
267 |
450 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
|
|
± 40°C to 125°C |
|
|
500 |
|
|
|
|||
|
|
|
|
|
|
|
|
|
|
|||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Pass-element series resistance |
(2.94 V ± VO)/IO, |
VI = 2.94 V, |
|
25°C |
|
0.5 |
0.7 |
Ω |
|||
|
|
|
|
|
|
|||||||
|
I = 500 mA |
|
° |
° |
|
|
1 |
|||||
|
|
|
O |
|
± 40 C to 125 C |
|
|
|
|
|
||
|
Input regulation |
VI = 4 V to 10 V, |
50 A ≤ IO ≤ 500 mA |
|
25°C |
|
6 |
23 |
mV |
|||
|
|
|
|
|
|
|||||||
± 40°C to 125°C |
|
|
29 |
|||||||||
|
|
|
|
|
|
|
|
|
|
|||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
IO = 5 mA to 500 mA, |
4 V ≤ VI ≤ 10 V |
|
25°C |
|
20 |
32 |
mV |
||
|
|
|
|
|
|
|
|
|||||
|
Output regulation |
± 40°C to 125°C |
|
|
60 |
|||||||
|
|
|
|
|
|
|
|
|||||
|
|
|
|
|
|
|
|
|
|
|
||
IO = 50 A to 500 mA, |
4 V ≤ VI ≤ 10 V |
|
25°C |
|
28 |
60 |
mV |
|||||
|
|
|
|
|
||||||||
|
|
|
|
|
|
|
|
|||||
|
|
|
± 40°C to 125°C |
|
|
120 |
||||||
|
|
|
|
|
|
|
|
|
|
|||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
IO = 50 A |
|
25°C |
43 |
53 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Ripple rejection |
f = 120 Hz |
± 40°C to 125°C |
40 |
|
|
dB |
|||||
|
|
|
|
|||||||||
|
|
|
|
|
|
|
||||||
IO = 500 mA |
|
25°C |
39 |
53 |
|
|||||||
|
|
|
|
|
|
|
|
|
||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
± 40°C to 125°C |
36 |
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
|||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
25°C |
|
|
|
|
||
|
Output noise-spectral density |
f = 120 Hz |
|
|
|
2 |
|
V/√ |
Hz |
|
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Co = 4.7 F |
|
25°C |
|
274 |
|
|
|
|
|
Output noise voltage |
10 Hz ≤ f ≤ 100 kHz |
Co = 10 F |
|
25°C |
|
228 |
|
Vrms |
|||
|
|
|
|
Co = 100 F |
|
25°C |
|
159 |
|
|
|
|
|
|
VO decreasing |
|
± 40°C to 125°C |
2.58 |
2.64 |
2.7 |
V |
||||
|
RESET |
trip-threshold voltage |
|
|||||||||
|
|
|
|
|
|
25°C |
|
0.14 |
0.4 |
|
|
|
|
RESET output low voltage |
VI = 2.6 V, |
IO(RESET) = ±0.8 mA |
|
|
V |
||||||
|
|
|
|
|
|
|||||||
|
± 40°C to 125°C |
|
|
0.4 |
||||||||
|
|
|
|
|
|
|
|
|
|
|||
|
|
|
|
|
|
|
|
|
|
|
|
|
²CSR refers to the total series resistance, including the ESR of the capacitor, any series resistance added externally, and PWB trace resistance to Co.
³Pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; thermal effects must be taken into account separately.
10 |
POST OFFICE BOX 655303 •DALLAS, TEXAS 75265 |
TPS7301Q, TPS7325Q, TPS7330Q, TPS7333Q, TPS7348Q, TPS7350Q
LOW-DROPOUT VOLTAGE REGULATORS
WITH INTEGRATED DELAYED RESET FUNCTION
SLVS124F ± JUNE 1995 ± REVISED JANUARY 1999
TPS7333Q electrical characteristics at IO = 10 mA, VI = 4.3 V, EN = 0 V, Co = 4.7 µF (CSR² = 1 Ω),
SENSE shorted to OUT (unless otherwise noted)
|
|
|
PARAMETER |
TEST CONDITIONS³ |
|
T |
MIN |
TYP |
MAX |
UNIT |
|||
|
|
|
|
|
|
|
J |
|
|
|
|
|
|
|
Output voltage |
|
|
|
25°C |
|
3.3 |
|
V |
||||
|
|
|
|
|
|
|
|
||||||
4.3 V ≤ VI ≤ 10 V, |
5 mA ≤ IO ≤ 500 mA |
± 40°C to 125°C |
3.23 |
|
3.37 |
||||||||
|
|
|
|
|
|
|
|
||||||
|
|
|
|
IO = 10 mA, |
VI = 3.23 V |
|
25°C |
|
4.5 |
7 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
|
|
|
± 40°C to 125°C |
|
|
8 |
|
|
|
|||
|
|
|
|
|
|
|
|
|
|
|
|||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Dropout voltage |
IO = 100 mA, |
VI = 3.23 V |
|
25°C |
|
44 |
60 |
mV |
||||
|
|
|
|
|
|
||||||||
± 40°C to 125°C |
|
|
80 |
||||||||||
|
|
|
|
|
|
|
|
|
|
|
|||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
IO = 500 mA, |
VI = 3.23 V |
|
25°C |
|
235 |
300 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
|
|
|
± 40°C to 125°C |
|
|
400 |
|
|
|
|||
|
|
|
|
|
|
|
|
|
|
|
|||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Pass-element series resistance |
(3.23 V ± VO)/IO, |
VI = 3.23 V, |
|
25°C |
|
0.44 |
0.6 |
Ω |
||||
|
|
|
|
|
|
||||||||
|
I = 500 mA |
|
° |
° |
|
|
0.8 |
||||||
|
|
|
|
O |
|
± 40 C to 125 C |
|
|
|
|
|
||
|
Input regulation |
VI = 4.3 V to 10 V, |
50 A ≤ IO ≤ 500 mA |
|
25°C |
|
6 |
23 |
mV |
||||
|
|
|
|
|
|
||||||||
± 40°C to 125°C |
|
|
29 |
||||||||||
|
|
|
|
|
|
|
|
|
|
|
|||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
IO = 5 mA to 500 mA, |
4.3 V ≤ VI ≤ 10 V |
|
25°C |
|
21 |
38 |
mV |
||
|
|
|
|
|
|
|
|
|
|||||
|
Output regulation |
± 40°C to 125°C |
|
|
75 |
||||||||
|
|
|
|
|
|
|
|
||||||
|
|
|
|
|
|
|
|
|
|
|
|||
IO = 50 A to 500 mA, 4.3 V ≤ VI ≤ 10 V |
|
25°C |
|
31 |
60 |
mV |
|||||||
|
|
|
|
|
|
||||||||
|
|
|
|
|
|
|
|
|
|||||
|
|
|
|
± 40°C to 125°C |
|
|
120 |
||||||
|
|
|
|
|
|
|
|
|
|
|
|||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
IO = 50 A |
|
25°C |
43 |
51 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Ripple rejection |
f = 120 Hz |
± 40°C to 125°C |
40 |
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dB |
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IO = 500 mA |
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25°C |
39 |
49 |
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± 40°C to 125°C |
36 |
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25°C |
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Output noise-spectral density |
f = 120 Hz |
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2 |
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V/√ |
Hz |
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Co = 4.7 F |
|
25°C |
|
274 |
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Output noise voltage |
10 Hz ≤ f ≤ 100 kHz |
Co = 10 F |
|
25°C |
|
228 |
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Vrms |
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Co = 100 F |
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25°C |
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159 |
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trip-threshold voltage |
VO decreasing |
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± 40°C to 125°C |
2.868 |
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V |
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RESET |
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hysteresis voltage |
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25°C |
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18 |
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mV |
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RESET |
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25°C |
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0.17 |
0.4 |
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RESET output low voltage |
VI = 2.8 V, |
IO(RESET) = ±1 mA |
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V |
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± 40°C to 125°C |
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0.4 |
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²CSR refers to the total series resistance, including the ESR of the capacitor, any series resistance added externally, and PWB trace resistance to Co.
³Pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; thermal effects must be taken into account separately.
POST OFFICE BOX 655303 •DALLAS, TEXAS 75265 |
11 |
TPS7301Q, TPS7325Q, TPS7330Q, TPS7333Q, TPS7348Q, TPS7350Q
LOW-DROPOUT VOLTAGE REGULATORS
WITH INTEGRATED DELAYED RESET FUNCTION
SLVS124F ± JUNE 1995 ± REVISED JANUARY 1999
TPS7348Q electrical characteristics at IO = 10 mA, VI = 5.85 V, EN = 0 V, Co = 4.7 µF (CSR² = 1 Ω),
SENSE shorted to OUT (unless otherwise noted)
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PARAMETER |
TEST CONDITIONS³ |
|
T |
MIN |
TYP |
MAX |
UNIT |
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J |
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Output voltage |
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25°C |
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4.85 |
|
V |
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5.85 V ≤ VI ≤ 10 V, |
5 mA ≤ IO ≤ 500 mA |
± 40°C to 125°C |
4.75 |
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4.95 |
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IO = 10 mA, |
VI |
= 4.75 V |
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25°C |
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2.9 |
6 |
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± 40°C to 125°C |
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8 |
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Dropout voltage |
IO = 100 mA, |
VI |
= 4.75 V |
|
25°C |
|
28 |
37 |
mV |
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± 40°C to 125°C |
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54 |
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IO = 500 mA, |
VI |
= 4.75 V |
|
25°C |
|
150 |
180 |
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± 40°C to 125°C |
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250 |
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Pass-element series resistance |
(4.75 V ± VO)/IO, |
VI = 4.75 V, |
|
25°C |
|
0.28 |
0.37 |
Ω |
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I = 500 mA |
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° |
° |
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0.52 |
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O |
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± 40 C to 125 C |
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Input regulation |
VI = 5.85 V to 10 V, |
50 A ≤ IO ≤ 500 mA |
|
25°C |
|
9 |
35 |
mV |
|||||
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|||||||||
± 40°C to 125°C |
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37 |
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IO = 5 mA to 500 mA, |
5.85 V ≤ VI ≤ 10 V |
|
25°C |
|
28 |
42 |
mV |
|||
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||||||
|
Output regulation |
± 40°C to 125°C |
|
|
80 |
|||||||||
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IO = 50 A to 500 mA, 5.85 V ≤ VI ≤ 10 V |
|
25°C |
|
42 |
65 |
mV |
||||||||
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|||||||||
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||||||
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± 40°C to 125°C |
|
|
130 |
|||||||
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IO |
= 50 A |
|
25°C |
42 |
53 |
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|
||
|
Ripple rejection |
f = 120 Hz |
± 40°C to 125°C |
39 |
|
|
dB |
|||||||
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|
||||||||||
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|||||||
IO |
= 500 mA |
|
25°C |
39 |
50 |
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||
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± 40°C to 125°C |
35 |
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||
|
Output noise-spectral density |
f = 120 Hz |
|
|
|
25°C |
|
2 |
|
V/√ |
Hz |
|
||
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Co = 4.7 F |
|
25°C |
|
410 |
|
|
|
|
|
|
Output noise voltage |
10 Hz ≤ f ≤ 100 kHz |
Co = 10 F |
|
25°C |
|
328 |
|
Vrms |
|||||
|
|
|
|
|
Co = 100 F |
|
25°C |
|
212 |
|
|
|
|
|
|
|
trip-threshold voltage |
VO decreasing |
|
|
± 40°C to 125°C |
4.5 |
|
4.7 |
V |
||||
|
RESET |
|
|
|
|
|||||||||
|
|
|
hysteresis voltage |
|
|
|
|
25°C |
|
26 |
|
mV |
||
|
RESET |
|
|
|
|
|
|
|||||||
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|
25°C |
|
0.2 |
0.4 |
|
|
|
|
RESET output low voltage |
IO(RESET) = ±1.2 mA,VI |
= 4.12 V |
|
|
V |
||||||||
|
|
|
|
|
|
|||||||||
|
± 40°C to 125°C |
|
|
0.4 |
||||||||||
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|
|
|
|||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
²CSR refers to the total series resistance, including the ESR of the capacitor, any series resistance added externally, and PWB trace resistance to Co.
³Pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; thermal effects must be taken into account separately.
12 |
POST OFFICE BOX 655303 •DALLAS, TEXAS 75265 |
TPS7301Q, TPS7325Q, TPS7330Q, TPS7333Q, TPS7348Q, TPS7350Q
LOW-DROPOUT VOLTAGE REGULATORS
WITH INTEGRATED DELAYED RESET FUNCTION
SLVS124F ± JUNE 1995 ± REVISED JANUARY 1999
TPS7350Q electrical characteristics at IO = 10 mA, VI = 6 V, EN = 0 V, Co = 4.7 µF (CSR² = 1 Ω), SENSE shorted to OUT (unless otherwise noted)
|
|
|
PARAMETER |
TEST CONDITIONS³ |
|
T |
MIN |
TYP |
MAX |
UNIT |
|||
|
|
|
|
|
|
|
J |
|
|
|
|
|
|
|
Output voltage |
|
|
|
25°C |
|
5 |
|
V |
||||
|
|
|
|
|
|
|
|
||||||
6 V ≤ VI ≤ 10 V, |
5 mA ≤ IO ≤ 500 mA |
± 40°C to 125°C |
4.9 |
|
5.1 |
||||||||
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||||||
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|
IO = 10 mA, |
VI = 4.88 V |
|
25°C |
|
2.9 |
6 |
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||
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|
± 40°C to 125°C |
|
|
8 |
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|||
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|
Dropout voltage |
IO = 100 mA, |
VI = 4.88 V |
|
25°C |
|
27 |
35 |
mV |
||||
|
|
|
|
|
|
||||||||
± 40°C to 125°C |
|
|
50 |
||||||||||
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|
IO = 500 mA, |
VI = 4.88 V |
|
25°C |
|
146 |
170 |
|
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||
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|
± 40°C to 125°C |
|
|
230 |
|
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|||
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|||
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|
|
Pass-element series resistance |
(4.88 V ± VO)/IO, |
VI = 4.88 V, |
|
25°C |
|
0.27 |
0.35 |
Ω |
||||
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|
|
|
||||||||
|
I = 500 mA |
|
° |
° |
|
|
0.5 |
||||||
|
|
|
|
O |
|
± 40 C to 125 C |
|
|
|
|
|
||
|
Input regulation |
VI = 6 V to 10 V, |
50 A ≤ IO ≤ 500 mA |
|
25°C |
|
4 |
25 |
mV |
||||
|
|
|
|
|
|
||||||||
± 40°C to 125°C |
|
|
45 |
||||||||||
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|||
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|
|
IO = 5 mA to 500 mA, |
6 V ≤ VI ≤ 10 V |
|
25°C |
|
30 |
45 |
mV |
||
|
|
|
|
|
|
|
|
|
|||||
|
Output regulation |
± 40°C to 125°C |
|
|
86 |
||||||||
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|
||||||
|
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|
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|
|
|
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|
|||
IO = 50 A to 500 mA, |
6 V ≤ VI ≤ 10 V |
|
25°C |
|
45 |
65 |
mV |
||||||
|
|
|
|
|
|
||||||||
|
|
|
|
|
|
|
|
|
|||||
|
|
|
|
± 40°C to 125°C |
|
|
140 |
||||||
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|||
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|
IO = 50 A |
|
25°C |
43 |
53 |
|
|
|
|
|
|
|
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|
|
|
|
|
|
|
|
|
|
|
Ripple rejection |
f = 120 Hz |
± 40°C to 125°C |
38 |
|
|
dB |
||||||
|
|
|
|
||||||||||
|
|
|
|
|
|
|
|||||||
IO = 500 mA |
|
25°C |
41 |
51 |
|
||||||||
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|
||||
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|
|
|
|
|
|
|
|
|
± 40°C to 125°C |
36 |
|
|
|
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|
||
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|||
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|
|
|
|
25°C |
|
|
|
|
||
|
Output noise-spectral density |
f = 120 Hz |
|
|
|
2 |
|
V/√ |
Hz |
|
|||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Co = 4.7 F |
|
25°C |
|
430 |
|
|
|
|
|
Output noise voltage |
10 Hz ≤ f ≤ 100 kHz |
Co = 10 F |
|
25°C |
|
345 |
|
Vrms |
||||
|
|
|
|
|
Co = 100 F |
|
25°C |
|
220 |
|
|
|
|
|
|
trip-threshold voltage |
VO decreasing |
|
± 40°C to 125°C |
4.55 |
|
4.75 |
V |
||||
|
RESET |
|
|
|
|||||||||
|
|
|
hysteresis voltage |
|
|
|
25°C |
|
28 |
|
mV |
||
|
RESET |
|
|
|
|
|
|||||||
|
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|
|
25°C |
|
0.15 |
0.4 |
|
|
|
|
RESET output low voltage |
IO(RESET) = ±1.2 mA, |
VI = 4.25 V |
|
|
V |
|||||||
|
|
|
|
|
|
||||||||
|
± 40°C to 125°C |
|
|
0.4 |
|||||||||
|
|
|
|
|
|
|
|
|
|
|
|||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
²CSR refers to the total series resistance, including the ESR of the capacitor, any series resistance added externally, and PWB trace resistance to Co.
³Pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; thermal effects must be taken into account separately.
POST OFFICE BOX 655303 •DALLAS, TEXAS 75265 |
13 |