Data sheet acquired from Harris Semiconductor SCHS235
September 1998
CD74AC139,
CD74ACT139
Dual 2-to-4-Line Decoder/Demultiplexer
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Description |
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Buffered Inputs |
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The CD74AC139 and CD74ACT139 are dual 2-to-4-line |
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Typical Propagation Delay |
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decoders/demultiplexers that utilize |
the Harris |
Advanced |
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CMOS Logic technology. These devices contain two inde- |
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- 5.4ns at VCC = 5V, TA = 25oC, CL = 50pF |
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pendent binary to one-of-four decoders, each with a single |
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Exceeds 2kV ESD Protection MIL-STD-883, Method |
active LOW enable input (1E or 2E). Data on the select |
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inputs (1A0 and 1A1 or 2A0 and 2A1) cause one of the four |
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3015 |
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normally HIGH outputs to go LOW. |
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SCR-Latchup-Resistant CMOS Process and Circuit |
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If the enable input is HIGH, all four outputs remain HIGH. For |
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[ /Title |
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Design |
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demultiplexer operation, the enable input is the data input. |
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(CD74 |
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Speed of Bipolar FAST™/AS/S with Significantly |
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The enable input also functions as a chip select when these |
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AC139 |
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Reduced Power Consumption |
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devices are cascaded. |
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Balanced Propagation Delays |
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Ordering Information |
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CD74 |
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AC Types Feature 1.5V to 5.5V Operation and |
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PART |
TEMP. |
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PKG. |
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ACT13 |
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Balanced Noise Immunity at 30% of the Supply |
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NUMBER |
RANGE (oC) |
PACKAGE |
NO. |
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9) |
• ±24mA Output Drive Current |
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CD74AC139E |
0 to 70oC, -40 to 85, |
16 Ld PDIP |
E16.3 |
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- Fanout to 15 FAST™ ICs |
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-55 to 125 |
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ject |
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- Drives 50Ω Transmission Lines |
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CD74ACT139E |
0 to 70oC, -40 to 85, |
16 Ld PDIP |
E16.3 |
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(Dual |
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-55 to 125 |
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2-to-4- |
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CD74AC139M96 |
0 to 70oC, -40 to 85, |
16 Ld SOIC |
M16.15 |
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Line |
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-55 to 125 |
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0 to 70oC, -40 to 85, |
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Decod |
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CD74ACT139M |
16 Ld SOIC |
M16.15 |
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er/Dem |
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-55 to 125 |
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NOTES: |
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ulti- |
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1. When ordering, use the entire part number. Add the suffix 96 to |
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plexer) |
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obtain the variant in the tape and reel. |
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/Autho |
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2. Wafer and die for this part number is available which meets all elec- |
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r () |
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trical specifications. Please contact your local sales office or Harris |
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/Key- |
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customer service for ordering information. |
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words |
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(Har- |
Pinout |
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ris |
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Semi- |
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CD74AC139, CD74ACT139 |
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con- |
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(PDIP, SOIC) |
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TOP VIEW |
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ductor, |
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Advan |
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1E |
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16 VCC |
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ced |
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1A0 |
2 |
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15 2E |
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CMOS |
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1A1 |
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14 2A0 |
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1Y0 |
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13 2A1 |
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/Cre- |
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1Y1 |
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12 2Y0 |
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ator () |
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1Y2 |
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11 2Y1 |
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/DOCI |
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1Y3 |
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10 |
2Y2 |
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NFO |
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GND |
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9 |
2Y3 |
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CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
File Number 1953.1
FAST™ is a Trademark of Fairchild Semiconductor. |
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Copyright © Harris Corporation 1998 |
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CD74AC139, CD74ACT139
Functional Diagram
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4 |
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1A0 |
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5 |
1Y0 |
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DECODER |
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1Y1 |
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1 |
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1Y2 |
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1A1 |
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1Y3 |
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1E |
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2A0 |
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2Y0 |
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DECODER |
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2Y1 |
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2Y2 |
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2A1 |
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2Y3 |
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2E |
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GND = 8 |
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VCC = 16 |
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TRUTH TABLE
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INPUTS |
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ENABLE |
SELECT |
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OUTPUTS |
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A1 |
A0 |
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E |
Y3 |
Y2 |
Y1 |
Y0 |
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X = Don’t Care
2
CD74AC139, CD74ACT139
Absolute Maximum Ratings
DC Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . |
-0.5V to 6V |
DC Input Diode Current, IIK |
±20mA |
For VI < -0.5V or VI > VCC + 0.5V . . . . . . . . . . . . . . . . . . |
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DC Output Diode Current, IOK |
±50mA |
For VO < -0.5V or VO > VCC + 0.5V . . . . . . . . . . . . . . . . |
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DC Output Source or Sink Current per Output Pin, IO |
±50mA |
For VO > -0.5V or VO < VCC + 0.5V . . . . . . . . . . . . . . . . |
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DC VCC or Ground Current, ICC or IGND (Note 3) . . . . . . |
. . .±100mA |
Thermal Information |
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Thermal Resistance (Typical, Note 5) |
θJA (oC/W) |
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. 90 |
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. 160 |
Maximum Junction Temperature (Plastic Package) . . . |
. . . . . . . 150oC |
Maximum Storage Temperature Range . . . . . . . . . . |
-65oC to 150oC |
Maximum Lead Temperature (Soldering 10s) . . . . . . |
. . . . . . . 300oC |
Operating Conditions
Temperature Range, TA . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC
Supply Voltage Range, VCC (Note 4)
AC Types. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.5V to 5.5V
ACT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V
DC Input or Output Voltage, VI, VO . . . . . . . . . . . . . . . . . 0V to VCC
Input Rise and Fall Slew Rate, dt/dv
AC Types, 1.5V to 3V . . . . . . . . . . . . . . . . . . . . . . . . . 50ns (Max)
AC Types, 3.6V to 5.5V . . . . . . . . . . . . . . . . . . . . . . . . 20ns (Max)
ACT Types, 4.5V to 5.5V. . . . . . . . . . . . . . . . . . . . . . . 10ns (Max)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
3.For up to 4 outputs per device, add ±25mA for each additional output.
4.Unless otherwise specified, all voltages are referenced to ground.
5.θJA is measured with the component mounted on an evaluation PC board in free air.
DC Electrical Specifications
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TEST |
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-40oC TO |
-55oC TO |
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CONDITIONS |
VCC |
25oC |
85oC |
125oC |
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PARAMETER |
SYMBOL |
VI (V) |
IO (mA) |
(V) |
MIN |
MAX |
MIN |
MAX |
MIN |
MAX |
UNITS |
AC TYPES |
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High Level Input Voltage |
VIH |
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1.5 |
1.2 |
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1.2 |
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1.2 |
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3 |
2.1 |
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2.1 |
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2.1 |
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V |
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5.5 |
3.85 |
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3.85 |
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3.85 |
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Low Level Input Voltage |
VIL |
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1.5 |
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0.3 |
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0.3 |
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0.3 |
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3 |
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0.9 |
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0.9 |
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0.9 |
V |
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5.5 |
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1.65 |
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1.65 |
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1.65 |
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High Level Output Voltage |
VOH |
VIH or VIL |
-0.05 |
1.5 |
1.4 |
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1.4 |
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1.4 |
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-0.05 |
3 |
2.9 |
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2.9 |
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2.9 |
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-0.05 |
4.5 |
4.4 |
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4.4 |
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4.4 |
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V |
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-4 |
3 |
2.58 |
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2.48 |
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2.4 |
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-24 |
4.5 |
3.94 |
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3.8 |
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3.7 |
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-75 |
5.5 |
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3.85 |
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(Note 6, 7) |
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-50 |
5.5 |
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3.85 |
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(Note 6, 7) |
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3