Analog Devices AD9012SQ, AD9012SE, AD9012BQ, AD9012BJ, AD9012AQ Datasheet

a		High-Speed 8-Bit
		TTL A/D Converter
		AD9012

FEATURES

100 MSPS Encode Rate

Very Low Input Capacitance—16 pF

Low Power—1 W

TTL Compatible Outputs

MIL-STD-883 Compliant Versions Available

APPLICATIONS

Radar Guidance

Digital Oscilloscopes/ATE Equipment

Laser/Radar Warning Receivers

Digital Radio

Electronic Warfare (ECM, ECCM, ESM)

Communication/Signal Intelligence

GENERAL DESCRIPTION

The AD9012 is an 8-bit, ultrahigh speed, analog-to-digital converter. The AD9012 is fabricated in an advanced bipolar process that allows operation at sampling rates up to one hundred megasamples/second. Functionally, the AD9012 is comprised of 256 parallel comparator stages whose outputs are decoded to drive the TTL compatible output latches.

FUNCTIONAL BLOCK DIAGRAM

OVERFLOW			AD9012
INHIBIT
ANALOG IN
R	256			OVERFLOW
VREF
R				D8 (MSB)
	255
		D		D7
R		E
		C
	128	O		D6
		D	L
		I
			A
R/2		N
			T	D5
REFMID		G	C
R/2		L	H
	127			D4
		O
		G
		I		D3
R		C
	2			D2
R				D1 (LSB)
	1
VREF
ENCODE
GND	HYSTERESIS		VS	VS

The exceptionally wide large-signal analog input bandwidth of 160 MHz is due to an innovative comparator design and very close attention to device layout considerations. The wide input bandwidth of the AD9012 allows very accurate acquisition of high speed pulse inputs without an external track-and-hold. The comparator output decoding scheme minimizes false codes, which is critical to high speed linearity.

The AD9012 is available in two grades: one with 0.5 LSB linearity and one with 0.75 LSB linearity. Both versions are

offered in an industrial grade, –25°C to +85°C, packaged in a 28-lead DIP and a 28-lead JLCC. The military temperature range devices, –55°C to +125°C, are available in ceramic DIP and LCC packages and are compliant to MIL-STD-883 Class B.

The AD9012 is available in versions compliant with MIL-STD- 883. Refer to the Analog Devices Military Products Databook or current AD9012/883B data sheet for detailed specifications.

REV. E

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: [phone]	www.analog.com
Fax: [phone]	© Analog Devices, Inc., 2001

AD9012–SPECIFICATIONS

ELECTRICAL CHARACTERISTICS (+VS = +5.0 V; –VS = –5.2 V; Differential Reference Voltage = 2.0 V; unless otherwise noted.)

		Test	AD9012AQ/AJ			AD9012BQ/BJ			AD9012SQ/SE			AD9012TQ/TE
Parameter	Temp	Level	Min	Typ	Max	Min	Typ	Max	Min	Typ	Max	Min	Typ	Max	Unit
RESOLUTION			8			8			8			8			Bits
DC ACCURACY	25°C
Differential Linearity		I		0.6	0.75		0.4	0.5		0.6	0.75		0.4	0.5	LSB
	Full	VI			1.0			0.75			1.0			0.75	LSB
Integral Linearity	25°C	I		0.6	1.0		0.4	0.5		0.6	1.0		0.4	0.5	LSB
	Full	VI			1.2			1.2			1.2			1.2	LSB
No Missing Codes	Full	VI	GUARANTEED			GUARANTEED			GUARANTEED			GUARANTEED
INITIAL OFFSET ERROR	25°C
Top of Reference Ladder		I		7	15		7	15		7	15		7	15	mV
	Full	VI			18			18			18			18	mV
Bottom of Reference Ladder	25°C	I		6	10		6	10		6	10		6	10	mV
	Full	VI			13			13			13			13	mV
Offset Drift Coefficient	Full	V		25			25			25			25		µV/°C
ANALOG INPUT	25°C														µA
Input Bias Current1		I		60	200		60	200		60	200		60	200
	Full	VI			200			200			200			200	µA
Input Resistance	25°C	I	25	200		25	200		25	200		25	200		kΩ
Input Capacitance	25°C	III		16	18		16	18		16	18		16	18	pF
Large Signal Bandwidth2	25°C	V		160			160			160			160		MHz
Analog Input Slew Rate3	25°C	V		440			440			440			440		V/µs
REFERENCE INPUT	25°C														Ω
Reference Ladder Resistance		VI	40	80	110	40	80	110	40	80	110	40	80	110
Ladder Temperature Coefficient	25°C	V		0.25			0.25			0.25			0.25		Ω/°C
Reference Input Bandwidth		V		10			10			10			10		MHz
DYNAMIC PERFORMANCE	25°C
Conversion Rate		I	75	100		75	100		75	100		75	100		MSPS
Aperture Delay	25°C	V		3.8			3.8			3.8			3.8		ns
Aperture Uncertainty (Jitter)	25°C	V		15			15			15			15		ps
Output Delay (tPD)4, 5	25°C	I	4	4.9	11	4	4.9	11	4	4.9	11	4	4.9	11	ns
Transient Response6	25°C	V		8			8			8			8		ns
Overvoltage Recovery Time7	25°C	V		8			8			8			8		ns
Output Rise Time4	25°C	I		6.6	8.0		6.6	8.0		6.6	8.0		6.6	8.0	ns
Output Fall Time4	25°C	I		3.3	4.3		3.3	4.3		3.3	4.3		3.3	4.3	ns
Output Time Skew4, 8	25°C	V		3.0			3.0			3.0			3.0		ns
ENCODE INPUT
Logic “1” Voltage4	Full	VI	2.0			2.0			2.0			2.0			V
Logic “0” Voltage4	Full	VI			0.8			0.8			0.8			0.8	V
Logic “1” Current	Full	VI			250			250			250			250	µA
Logic “0” Current	Full	VI			400			400			400			400	µA
Input Capacitance	25°C	V		2.5			2.5			2.5			2.5		pF
Encode Pulsewidth (Low)9	25°C	I	2.5			2.5			2.5			2.5			ns
Encode Pulsewidth (High)9	25°C	I	2.5			2.5			2.5			2.5			ns
OVERFLOW INHIBIT INPUT															µA
0 V Input Current	Full	VI		200	250		200	250		200	250		200	250
AC LINEARITY10	25°C
Effective Bits11		V		7.5			7.5			7.5			7.5		Bits
In-Band Harmonics	25°C
dc to 1.23 MHz		I	48	55		48	55		48	55		48	55		dBc
dc to 9.3 MHz	25°C	V		50			50			50			50		dBc
dc to 19.3 MHz	25°C	V		44			44			44			44		dBc
Signal-to-Noise Ratio12	25°C	I	46	47.6		46	47.6		46	47.6		46	47.6		dBc
Noise Power Ratio13	25°C	V		37			37			37			37		dBc
DIGITAL OUTPUT
Logic “1” Voltage	Full	VI	2.4			2.4			2.4			2.4			V
Logic “0” Voltage	Full	VI			0.4			0.4			0.4			0.4	V
POWER SUPPLY14	25°C
Positive Supply Current (+5.0 V)		I		33	45		33	45		33	45		33	45	mA
	Full	VI			48			48			48			48	mA
Supply Current (–5.2 V)	25°C	I		152	179		152	179		152	179		152	179	mA
	Full	VI			191			191			191			191	mA
Nominal Power Dissipation	25°C	V		955			955			955			955		mW
Reference Ladder Dissipation	25°C	V		44			44			44			44		mW
Power Supply Rejection Ratio15	25°C	I		0.85	2.5		0.85	2.5		0.8	2.5		0.8	2.5	mV/V

–2–

REV. E

AD9012

NOTES

1Measured with Analog Input = 0 V.

2Measured by FFT analysis where fundamental is –3 dBc.

3Input slew rate derived from rise time (10% to 90%) of full-scale step input. 4Outputs terminated with two equivalent ’LS00 type loads. (See load circuit.) 5Measured from ENCODE into data out for LSB only.

6For full-scale step input, 8-bit accuracy is attained in specified time.

7Recovers to 8-bit accuracy in specified time, after 150% full-scale input overvoltage. 8Output time skew includes high-to-low and low-to-high transitions as well as bit-to-bit time skew differences.

9ENCODE signal rise/fall times should be less than 30 ns for normal operation. 10Measured at 75 MSPS encode rate. Harmonic data based on worst case harmonics. 11Analog input frequency = 1.23 MHz.

12RMS signal to rms noise, including harmonics with 1.23 MHz. analog input signal.

13NPR measured @ 0.5 MHz. Noise Source is 250 mW (rms) from 0.5 MHz to 8 MHz.

14Supplies should remain stable within ± 5% for normal operation. 15Measured at –5.2 V ± 5% and +5.0 V ± 5%.

Specifications subject to change without notice.

ABSOLUTE MAXIMUM RATINGS1

VS

Positive Supply Voltage (+VS)

. . . . . . . . . . . . . . . . . . . . . . 6 V

1k

Analog to Digital Supply Voltage Differential (–VS) . . .

0.5 V

TTL

Negative Supply Voltage (–VS)

. . . . . . . . . . . . . . . . . . . . –6 V

OUTPUT

Analog Input Voltage . . . . . . . . . . . . . . . . . . . .

–VS to +0.5 V

15pF

ENCODE Input Voltage . . . . . . . . . . . . . . . . . –0.5 V to +5 V

OVERFLOW INH Input Voltage . . . . . . . . . . . –5.2 V to 0 V

Reference Input Voltage (+VREF –VREF)2 . . .

–3.5 V to +0.1 V

Figure 1. Load Circuit

Differential Reference Voltage . . . . . . . . . . . . . . . . . . . .

2.1 V

Reference Midpoint Current . . . . . . . . . . . . . . . . . . . . ± 4 mA

Digital Output Current . . . . . . . . . . . . . . . . . . . . . . . .

30 mA

EXPLANATION OF TEST LEVELS

Operating Temperature Range

–25°C to +85°C

Test Level

AD9012AQ/BQ/AJ/BJ . . . . . . . . . . . . . . .

I

– 100% production tested.

AD9012SE/SQ/TE/TQ . . . . . . . . . . . . .

–55°C to +125°C

Storage Temperature Range . . . . . . . . . . .

–65°C to +150°C

II

– 100% production tested at 25°C, and sample tested at

Junction Temperature3 . . . . . . . . . . . . . . . . . . . . . . . .

150°C

specified temperatures. AC testing done on sample basis.

Lead Soldering Temperature (10 sec) . . . . . . . . . . . . .

300°C

III – Sample tested only.

NOTES

IV – Parameter is guaranteed by design and characterization

1Absolute maximum ratings are limiting values, to be applied individually, and

beyond which the serviceability of the circuit may be impaired. Functional

testing.

operability under any of these conditions is not necessarily implied. Exposure to

V

– Parameter is a typical value only.

absolute maximum rating conditions for extended periods may affect device

VI – All devices are 100% production tested at 25°C. 100%

reliability.

2+VREF ≥ –VREF under all circumstances.

production tested at temperature extremes for extended

3Maximum junction temperature (tJ max) should not exceed 150°C for ceramic

temperature devices; guaranteed by design and

and plastic packages:

characterization testing for industrial devices.

tJ = PD (θJA) + tA

PD (θJC) + tc

ORDERING GUIDE

where

PD = power dissipation

θJA = thermal impedance from junction to ambient (°C/W)

Temperature

Package

θJC = thermal impedance from junction to case (°C/W)

Device

Linearity

Ranges

Options*

tA = ambient temperature (°C)

–25°C to +85°C

tC = case temperature (°C)

AD9012AQ

0.75 LSB

Q-28

typical thermal impedances are:

AD9012BQ

0.50 LSB

–25°C to +85°C

Q-28

Ceramic DIP θJA = 42°C/W; θJC = 10°C/W

AD9012AJ

0.75 LSB

–25°C to +85°C

J-28A

Ceramic LCC θJA = 50°C/W; θJC = 15°C/W

AD9012BJ

0.50 LSB

–25°C to +85°C

J-28A

JLCC θJA = 59°C/W; θJC = 15°C/W.

AD9012SQ

0.75 LSB

–55°C to +125°C

Q-28

Recommended Operating Conditions

AD9012SE

0.75 LSB

–55°C to +125°C

E-28A

AD9012TQ

0.50 LSB

–55°C to +125°C

Q-28

Parameter

Input Voltage

AD9012TE

0.50 LSB

–55°C to +125°C

E-28A

Min

Nominal

Max

*E = Leadless Ceramic Chip Carrier; J = Ceramic Leaded Chip Carrier;

–VS

–5.46

–5.20

–4.94

Q = Cerdip.

+VS

+4.75

5.00

+5.25

+VREF

–VREF

0.0 V

+0.1

–VREF

–2.1

–2.0

+VREF

Analog Input

–VREF

+VREF

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily

WARNING!

accumulate on the human body and test equipment and can discharge without detection. Although

the AD9012 features proprietary ESD protection circuitry, permanent damage may occur on

devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are

ESD SENSITIVE DEVICE

recommended to avoid performance degradation or loss of functionality.

REV. E

–3–