Analog Devices AD7893BR-2, AD7893BR-10, AD7893BN-5, AD7893BN-2, AD7893AR-5 Datasheet

a		LC2MOS 12-Bit, Serial 6 ms
		ADC in 8-Pin Package
		AD7893

FEATURES

Fast 12-Bit ADC with 6 ms Conversion Time

8-Pin Mini-DlP and SOIC

Single Supply Operation

High Speed, Easy-to-Use, Serial Interface On-Chip Track/Hold Amplifier

Selection of Input Ranges 610 V for AD7893-10 62.5 V for AD7893-3

0 V to +2.5 V for AD7893-2

0 V to +5 V for AD7893-5 Low Power: 25 mW typ

FUNCTIONAL BLOCK DIAGRAM

		REF IN		VDD
	AD7893
		TRACK/
VIN	SIGNAL	HOLD
	SCALING*		12-BIT
			ADC
CONVST			OUTPUT
			REGISTER
	AGND DGND		SCLK	SDATA
*AD7893-5, AD7893-10, AD7893-3

GENERAL DESCRIPTION

The AD7893 is a fast, 12-bit ADC that operates from a single +5 V supply and is housed in a small 8-pin mini-DIP and 8-pin SOIC. The part contains a 6 μs successive approximation A/D converter, an on-chip track/hold amplifier, an on-chip clock and a high speed serial interface.

Output data from the AD7893 is provided via a high speed, serial interface port. This two-wire serial interface has a serial clock input and a serial data output with the external serial clock accessing the serial data from the part.

In addition to traditional dc accuracy specifications such as linearity, full-scale and offset errors, the AD7893 is also specified for dynamic performance parameters, including harmonic distortion and signal-to-noise ratio.

The part accepts an analog input range of ±10 V (AD7893-10),

±2.5 V (AD7893-3), 0 V to +5 V (AD7893-5) or 0 V to +2.5 V (AD7893-2) and operates from a single +5 V supply, consuming only 25 mW typical.

The AD7893 is fabricated in Analog Devices’ Linear Compatible CMOS (LC2MOS) process, a mixed technology process that combines precision bipolar circuits with low power CMOS logic. The part is available in a small, 8-pin, 0.3" wide, plastic or hermetic dual-in-line package (mini-DIP) and in an 8-pin, small outline IC (SOIC).

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Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

PRODUCT HIGHLIGHTS

1.Fast, 12-Bit ADC in 8-Pin Package

The AD7893 contains a 6 μs ADC, a track/hold amplifier, control logic and a high speed serial interface, all in an 8-pin package. This offers considerable space saving over alternative solutions.

2.Low Power, Single Supply Operation

The AD7893 operates from a single +5 V supply and consumes only 25 mW. This low power, single supply operation makes it ideal for battery powered or portable applications.

3.High Speed Serial Interface

The part provides high speed serial data and serial clock lines, allowing for an easy, two-wire serial interface arrangement.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: [phone]	World Wide Web Site: http://www.analog.com
Fax: [phone]	© Analog Devices, Inc., 1997

AD7893–SPECIFICATIONS (VDD = +5 V, AGND = DGND = 0 V, REF IN = +2.5 V. All specifications TMIN to TMAX unless otherwise noted.)

	A	B	S
Parameter	Versionsl	Versions	Version	Units	Test Conditions/Comments
DYNAMIC PERFORMANCE
Signal to (Noise + Distortion) Ratio2
@ +25°C	70	70	70	dB min	fIN = 10 kHz Sine Wave, fSAMPLE = 117 kHz
Total Harmonic Distortion (THD)2	–80	–80	–80	dB max	fIN = 10 kHz Sine Wave, fSAMPLE = 117 kHz
Peak Harmonic or Spurious Noise2	–80	–80	–80	dB max	fIN = 10 kHz Sine Wave, fSAMPLE = 117 kHz
Intermodulation Distortion (IMD)2					fa = 9 kHz, fb = 9.5 kHz, fSAMPLE = 117 kHz
2nd Order Terms	–80	–80	–80	dB max
3rd Order Terms	–80	–80	–80	dB max
DC ACCURACY
Resolution	12	12	12	Bits
Minimum Resolution for which
No Missing Codes are Guaranteed	12	12	12	Bits
Relative Accuracy2	±1	±1/2	±1	LSB max
Differential Nonlinearity2	±1	±1	±1	LSB max
Positive Full-Scale Error2	±3	±1.5	±3	LSB max
AD7893-2, AD7893-5	±4	±3	±4
Unipolar Offset Error				LSB max
AD7893-10, AD7893-3	±3	±1.5	±3
Negative Full-Scale Error2				LSB max
Bipolar Zero Error	±4	±2	±4	LSB max
ANALOG INPUT
AD7893-10	±10	±10	±10
Input Voltage Range				Volts
Input Resistance	16	16	16	kΩ min
AD7893-3	±2.5	±2.5	±2.5
Input Voltage Range				Volts
Input Resistance	4	4	4	kΩ min
AD7893-5
Input Voltage Range	0 to +5	0 to +5	0 to +5	Volts
Input Resistance	9	9	9	kΩ min
AD7893-2
Input Voltage Range	0 to +2.5	0 to +2.5	0 to +2.5	Volts
Input Current	500	500	500	nA max
REFERENCE INPUT					2.5 V ± 5%
REF IN Input Voltage Range	2.375/2.625	2.375/2.625	2.375/2.625	V min/V max
Input Current	2	2	10	μA max
Input Capacitance3	10	10	10	pF max
LOGIC INPUTS					VDD = 5 V ± 5%
Input High Voltage, VINH	2.4	2.4	2.4	V min
Input Low Voltage, VINL	0.8	0.8	0.8	V max	VDD = 5 V ± 5%
Input Current, IIN	±10	±10	±10	μA max	VIN = 0 V to VDD
Input Capacitance, CIN3	10	10	10	pF max
LOGIC OUTPUTS					ISOURCE = 200 μA
Output High Voltage, VOH	4.0	4.0	4.0	V min
Output Low Voltage, VOL	0.4	0.4	0.4	V max	ISINK = 1.6 mA
Output Coding
AD7893-10, AD7893-3	2s Complement
AD7893-2, AD7893-5	Straight (Natural) Binary
CONVERSION RATE				μs max
Conversion Time	6	6	6
Track/Hold Acquisition Time2	1.5	1.5	1.5	μs max
POWER REQUIREMENTS					±5% for Specified Performance
VDD	+5	+5	+5	V nom
IDD	9	9	9	mA max
Power Dissipation	45	45	45	mW max	Typically 25 mW

NOTES

1Temperature Ranges are as follows: A, B Versions: –40°C to +85°C, S Version: –55°C to +125°C. 2See Terminology.

3Sample tested @ +25°C to ensure compliance. Specifications subject to change without notice.

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AD7893

TIMING CHARACTERISTICS1, 2 (VDD = +5 V, AGND = DGND = 0 V, REF IN = +2.5 V)

	A, B	S
Parameter	Versions	Version	Units	Test Conditions/Comments
t1	50	50	ns min			Pulse Width
					CONVST
t2	60	70	ns min		SCLK High Pulse Width
t3	30	40	ns min		SCLK Low Pulse Width
t43	50	60	ns max		SCLK Rising Edge to Data Valid Delay
t54	10	10	ns min		Bus Relinquish Time after Falling Edge of SCLK
	100	100	ns max

NOTES

1Sample tested at +25°C to ensure compliance. All input signals are measured with tr = tf = 1 ns (10% to 90% of +5 V) and timed from a voltage level of +1.6 V.

2See Figure 5.

3Measured with the load circuit of Figure 1 and defined as the time required for an output to cross 0.8 V or 2.4 V.

4Derived from the measured time taken by the data outputs to change 0.5 V when loaded with the circuit of Figure 1. The measured number is then extrapolated back

to remove the effects of charging or discharging the 50 pF capacitor. This means that the time, t 5, quoted in the timing characteristics is the true bus relinquish time of the part and, as such, is independent of external bus loading capacitances.

ABSOLUTE MAXIMUM RATINGS*

(TA = +25°C unless otherwise noted)
VDD to AGND . . . . . . . . . . . . . . . . . . . .	. . . . . –0.3 V to +7 V
VDD to DGND . . . . . . . . . . . . . . . . . . . . .	. . . . –0.3 V to +7 V
Analog Input Voltage to AGND	±17 V
AD7893-10, AD7893-5 . . . . . . . . . . . .
AD7893-2, AD7893-3 . . . . . . . . . . . . .	. . . . . . –5 V, +10 V
Reference Input Voltage to AGND . . .	–0.3 V to VDD + 0.3 V
Digital Input Voltage to DGND . . . . .	–0.3 V to VDD + 0.3 V
Digital Output Voltage to DGND . . . .	–0.3 V to VDD + 0.3 V
Operating Temperature Range	–40°C to +85°C
Commercial (A, B Versions) . . . . . . . .
Extended (S Version) . . . . . . . . . . . . . .	. . –55°C to +125°C
Storage Temperature Range . . . . . . . . . .	. . –65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . .	. . . . . . . . . . +150°C
Plastic DIP Package, Power Dissipation .	. . . . . . . . . 450 mW
θJA Thermal Impedance . . . . . . . . . . . .	. . . . . . . . . 130°C/W
Lead Temperature (Soldering, 10 sec) .	. . . . . . . . . . +260°C
Cerdip Package, Power Dissipation . . . . .	. . . . . . . . . 450 mW
θJA Thermal Impedance . . . . . . . . . . . .	. . . . . . . . . 125°C/W
Lead Temperature (Soldering, 10 sec) .	. . . . . . . . . . +300°C
SOIC Package, Power Dissipation . . . . . .	. . . . . . . . . 450 mW
θJA Thermal Impedance . . . . . . . . . . . .	. . . . . . . . . 170°C/W
Lead Temperature, Soldering	+215°C
Vapor Phase (60 sec) . . . . . . . . . . . .
Infrared (15 sec) . . . . . . . . . . . . . . . .	. . . . . . . . . . +220°C

*Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

1.6mA

TO

OUTPUT +2.1V PIN

50pF

200µA

Figure 1. Load Circuit for Access Time and Bus Relinquish Time

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD7893 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.

WARNING!

ESD SENSITIVE DEVICE

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AD7893

PIN FUNCTION DESCRIPTION

Pin

Pin

No.

Mnemonic

Description

1

REF IN

Voltage Reference Input. An external reference source should be connected to this pin to provide the refer-

ence voltage for the AD7893’s conversion process. The REF IN input is buffered on-chip. The nominal ref-

erence voltage for correct operation of the AD7893 is +2.5 V.

2

VIN

Analog Input Channel. The analog input range is ±10 V (AD7893-10), ±2.5 V (AD7893-3), 0 V to +5 V

(AD7893-5) and 0 V to +2.5 V (AD7893-2).

3

AGND

Analog Ground. Ground reference for track/hold, comparator and DAC.

4

SCLK

Serial Clock Input. An external serial clock is applied to this input to obtain serial data from the AD7893. A

new serial data bit is clocked out on the rising edge of this serial clock, and data is valid on the falling edge.

The serial clock input should be taken low at the end of the serial data transmission.

5

SDATA

Serial Data Output. Serial data from the AD7893 is provided at this output. The serial data is clocked out by

the rising edge of SCLK and is valid on the falling edge of SCLK. Sixteen bits of serial data are provided

with four leading zeros followed by the 12 bits of conversion data. On the sixteenth falling edge of SCLK, the

SDATA line is disabled (three-stated). Output data coding is twos complement for the AD7893-10 and

AD7893-3, straight binary for the AD7893-2 and AD7893-5.

6

DGND

Digital Ground. Ground reference for digital circuitry.

7

Convert Start. Edge-triggered logic input. On the falling edge of this input, the serial clock counter is reset to

CONVST

zero. On the rising edge of this input, the track/hold goes into its hold mode and conversion is initiated.

8

VDD

Positive supply voltage, +5 V ± 5%.

PIN CONFIGURATION

DIP and SOIC

REF IN

VDD

1

8

VIN

2

AD7893

7

CONVST

DGND

AGND

3

TOP VIEW

6

SCLK

(NOT TO SCALE)

SDATA

4

5

ORDERING GUIDE

Temperature

Linearity

Package

Model

Range

Error

SNR

Options*

AD7893AN-2

–40°C to +85°C

±1 LSB

70 dB

N-8

AD7893BN-2

–40°C to +85°C

±1/2 LSB

72 dB

N-8

AD7893AR-2

–40°C to +85°C

±1 LSB

70 dB

SO-8

AD7893BR-2

–40°C to +85°C

±1/2 LSB

72 dB

SO-8

AD7893SQ-2

–55°C to +125°C

±1 LSB

70 dB

Q-8

AD7893AN-5

–40°C to +85°C

±1 LSB

70 dB

N-8

AD7893BN-5

–40°C to +85°C

±1/2 LSB

72 dB

N-8

AD7893AR-5

–40°C to +85°C

±1 LSB

70 dB

SO-8

AD7893BR-5

–40°C to +85°C

±1/2 LSB

72 dB

SO-8

AD7893SQ-5

–55°C to +125°C

±1 LSB

70 dB

Q-8

AD7893AN-10

–40°C to +85°C

±1 LSB

70 dB

N-8

AD7893BN-10

–40°C to +85°C

±1/2 LSB

72 dB

N-8

AD7893AR-10

–40°C to +85°C

±1 LSB

70 dB

SO-8

AD7893BR-10

–40°C to +85°C

±1/2 LSB

72 dB

SO-8

AD7893SQ-10

–55°C to +125°C

±1 LSB

70 dB

Q-8

AD7893AR-3

–40°C to +85°C

±1 LSB

70 dB

SO-8

*N = Plastic DIP, Q = Cerdip, SO = SOIC.

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