Analog Devices AD7547UQ, AD7547UE, AD7547TQ, AD7547TE, AD7547SQ Datasheet

a		LC2MOS
		Parallel Loading Dual 12-Bit DAC
		AD7547

FEATURES

Two 12-Bit DACs in One Package

DAC Ladder Resistance Matching: 0.5% Space Saving Skinny DIP and Surface

Mount Packages 4-Quadrant Multiplication

Low Gain Error (1 LSB max Over Temperature) Fast Interface Timing

APPLICATIONS

Automatic Test Equipment

Programmable Filters

Audio Applications

Synchro Applications

Process Control

GENERAL DESCRIPTION

The AD7547 contains two 12-bit current output DACs on one monolithic chip. Also on-chip are the level shifters, data registers and control logic for easy microprocessor interfacing. There are 12 data inputs. CSA, CSB, WR control DAC selection and loading. Data is latched into the DAC registers on the rising edge of WR. The device is speed compatible with most microprocessors and accepts TTL, 74HC and 5 V CMOS logic level inputs.

The D/A converters provide 4-quadrant multiplication capabilities with separate reference inputs and feedback resistors. Monolithic construction ensures that thermal and gain error tracking is excellent. 12-bit monotonicity is guaranteed for both DACs over the full temperature range.

The AD7547 is manufactured using the Linear Compatible CMOS (LC2MOS) process. This allows fast digital logic and precision linear circuitry to be fabricated on the same die.

FUNCTIONAL BLOCK DIAGRAM

PRODUCT HIGHLIGHTS

1.DAC to DAC Matching

Since both DACs are fabricated on the same chip, precise matching and tracking is inherent. Many applications which are not practical using two discrete DACs are now possible. Typical matching: 0.5%.

2.Small Package Size

The AD7547 is available in 0.3" wide 24-pin DIPs and SOICs and in 28-terminal surface mount packages.

3.Wide Power Supply Tolerance

The device operates on a +12 V to +15 V VDD, with ±10% tolerance on this nominal figure. All specifications are guaranteed over this range.

REV. A

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: [phone] Fax: [phone]

AD7547–SPECIFICATIONS1			(VDD = +12 V to +15 V, 610%, VREFA = VREFB = 10 V; IOUTA = IOUTB = AGND =
			O V. All specifications TMIN to TMAX unless otherwise noted.)
Parameter	J, A Versions	K, B Versions	L, C Versions	S Version	T Version	U Version	Units	Test Conditions/Comments
ACCURACY
Resolution	12	12	12	12	12	12	Bits
Relative Accuracy	± 1	± 1/2	± 1/2	± 1	± 1/2	± 1/2	LSB max
Differential Nonlinearity	± 1	± 1	± 1	± 1	± 1	± 1	LSB max	All grades guaranteed
	± 6	± 3	± l	± 6	± 3	± 2		monotonic over temperature.
Gain Error							LSB max	Both DAC registers loaded
Gain Temperature Coefficient2;								with all 1s.
DGain/DTemperature	± 5	± 5	± 5	± 5	± 5	± 5	ppm/°C max	Typical value is 1 ppm/°C
Output Leakage Current
IOUTA
+25°C	10	10	10	10	10	10	nA max	DAC A Register loaded
TMIN to TMAX	150	150	150	250	250	250	nA max	with all 0s.
IOUTB
+25°C	10	10	10	10	10	10	nA max	DAC B Register loaded
TMIN to TMAX	150	150	150	250	250	250	nA max	with all 0s.
REFERENCE INPUT							kW min	Typical Input Resistance = 14 kW
Input Resistance	9	9	9	9	9	9
	20	20	20	20	20	20	kW max
VREFA, VREFB	± 3	± 3	± 1	± 3	± 3	± 1		Typically ±0.5%
Input Resistance Match							% max
DIGITAL INPUTS
VIH (Input High Voltage)	2.4	2.4	2.4	2.4	2.4	2.4	V min
VIL (lnput Low Voltage)	0.8	0.8	0.8	0.8	0.8	0.8	V max
IIN (Input Current)
+25°C	± 1	± 1	± 1	± 1	± 1	± 1	mA max	VIN = VDD
TMIN to TMAX	± 10	± 10	± 10	± 10	± 10	± 10	mA max
CIN (Input Capacitance)2	10	10	10	10	10	10	pF max
POWER SUPPLY3
VDD	10.8/16.5	10.8/16.5	10.8/16.5	10.8/16.5	10.8/16.5	10.8/16.5	V min/V max
IDD	2	2	2	2	2	2	mA max

AC PERFORMANCE CHARACTERISTICS

These characteristics are included for Design Guidance only and are not subject to test.

(VDD = +12 V to +15 V; VREFA = VREFB = +10 V, IOUTA = IOUTB = AGND = 0 V. Output Amplifiers are AD644 except where noted.)

Parameter	TA = +258C	TA = TMIN, TMAX	Units			Test Conditions/Comments
Output Current Settling Time	1.5		ms max			To 0.01 % of full-scale range. IOUT load = 100 W, CEXT = 13 pF.
						DAC output measured from rising edge of	WR	.
						Typical Value of Settling Time is 0.8 ms.
Digital-to-Analog Glitch Impulse	7		nV-s typ			Measured with VREFA = VREFB = 0 V. IOUTA, IOUTB
						load = 100 W, CEXT = 13 pF. DAC registers alternately
						loaded with all 0s and all 1s.
AC Feedthrough4
VREFA to IOUTA	–70	–65	dB max			VREFA, VREFB = 20 V p-p, 10 kHz sine wave. DAC
VREFB to IOUTB	–70	–65	dB max			registers loaded with all 0s.
Power Supply Rejection
DGain/DVDD	± 0.01	± 0.02	% per % max			DVDD = VDD max – VDD min
Output Capacitance
COUTA	70	70	pF max			DAC A, DAC B loaded with all 0s.
COUTB	70	70	pF max
COUTA	140	140	pF max			DAC A, DAC B loaded with all 1s.
COUTB	140	140	pF max
Channel-to-Channel Isolation
VREFA to IOUTB	–84		dB typ			VREFA = 20 V p-p 10 kHz sine wave, VREFB = 0 V.
						Both DACs loaded with all 1s.
VREFB to IOUTA	–84		dB typ			VREFB = 20 V p-p 10 kHz sine wave, VREFA = 0 V.
						Both DACs loaded with all 1s.
Digital Crosstalk	7		nV-s typ			Measured for a Code Transition of all 0s to all 1s.
						IOUTA, IOUTB Load = 100 W, CEXT = 13 pF
Output Noise Voltage Density	25		nV/Ö		typ	Measured between RFBA and IOUTA or RFBB and IOUTB.
				Hz
(10 Hz–100 kHz)						Frequency of measurement is 10 Hz–100 kHz.
Total Harmonic Distortion	–82		dB typ			VIN = 6 V rms, 1 kHz. Both DACs loaded with all 1s.

NOTES

1Temperature range as follows: J, K, L Versions, –40°C to +85°C; A, B, C Versions, –40°C to +85°C; S, T, U Versions, –55°C to +125°C. 2Sample tested at +25°C to ensure compliance.

3Functional at VDD = 5 V with degraded specifications. 4Pin 12 (DGND) on ceramic DIPs is connected to lid.

Specifications subject to change without notice.

–2–

REV. A

					AD7547
TIMING CHARACTERISTICS (VDD = 10.8 V to 16.5 V, VREFA = VREFB = +10 V, IOUTA = IOUTB = AGND = 0 V)
		Limit at	Limit at
	Limit at	TA = –408C	TA = –558C
Parameter	TA = +258C	to +858C	to +1258C	Units	Test Conditions/Comments
t1	60	80	80	ns min	Data Setup Time
t2	25	25	25	ns min	Data Hold Time
t3	80	80	100	ns min	Chip Select to Write Setup Time
t4	0	0	0	ns min	Chip Select to Write Hold Time
t5	80	80	100	ns min	Write Pulse Width

Specifications subject to change without notice.

ABSOLUTE MAXIMUM RATINGS*

(TA = +25°C unless otherwise noted)

VDD to DGND . . . . . . . . . . . . . . . . . . . .	. . . . . . –0.3 V, +17 V
VREFA, VREFB to AGND . . . . . . . . . . . . .	. . . . . . . . . . . . ±25 V
VRFBA, VRFBB to AGND . . . . . . . . . . . . . .	. . . . . . . . . . . ±25 V
Digital Input Voltage to DGND . . . . . . .	–0.3 V, VDD +0.3 V
IOUTA, IOUTB to DGND . . . . . . . . . . . . . .	–0.3 V, VDD +0.3 V
AGND to DGND . . . . . . . . . . . . . . . . . .	–0.3 V, VDD +0.3 V
Power Dissipation (Any Package)
To +75°C . . . . . . . . . . . . . . . . . . . . . . .	. . . . . . . . . 450 mW
Derates above +75°C . . . . . . . . . . . . . .	. . . . . . . . 6 mW/°C
Operating Temperature Range	. . . . –40°C to +85°C
Commercial Plastic (J, K, L Versions)
Industrial Hermetic (A, B, C Versions)	. . . –40°C to +85°C
Extended Hermetic (S, T, U Versions) .	. . –55°C to +125°C
Storage Temperature . . . . . . . . . . . . . .	. . –65°C to +150°C
Lead Temperature (Soldering, 10 secs) . .	. . . . . . . . . +300°C

*Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

Table I. AD7547 Truth Table

CSA

CSB

WR

FUNCTION

X

X

1

No Data Transfer

1

1

X

No Data Transfer

g

g

0

A Rising Edge on

CSA

or

CSB

Loads

Data to the Respective DAC from the Data Bus

0

1

g

DAC A Register Loaded from Data Bus

1

0

g

DAC B Register Loaded from Data Bus

0

0

g

DAC A and DAC B Registers Loaded

from Data Bus

NOTES

1.X = Don’t care.

2.g means rising edge triggered.

Figure 1. Timing Diagram

ORDERING GUIDE1

	Temperature	Relative	Gain	Package
Model2	Range	Accuracy	Error	Option3
AD7547JN	–40°C to +85°C	±1 LSB	±6 LSB	N-24
AD7547KN	–40°C to +85°C	±1/2 LSB	±3 LSB	N-24
AD7547LN	–40°C to +85°C	±1/2 LSB	±1 LSB	N-24
AD7547JP	–40°C to +85°C	±1 LSB	±6 LSB	P-28A
AD7547KP	–40°C to +85°C	±1/2 LSB	±3 LSB	P-28A
AD7547LP	–40°C to +85°C	±1/2 LSB	±1 LSB	P-28A
AD7547JR	–40°C to +85°C	±1 LSB	±6 LSB	R-24
AD7547KR	–40°C to +85°C	±1/2 LSB	±3 LSB	R-24
AD7547LR	–40°C to +85°C	±1/2 LSB	±1 LSB	R-24
AD7547AQ	–40°C to +85°C	±1 LSB	±6 LSB	Q-24
AD7547BQ	–40°C to +85°C	±1/2 LSB	±3 LSB	Q-24
AD7547CQ	–40°C to +85°C	±1/2 LSB	±1 LSB	Q-24
AD7547SQ	–55°C to +125°C	±1 LSB	±6 LSB	Q-24
AD7547TQ	–55°C to +125°C	±1/2 LSB	±3 LSB	Q-24
AD7547UQ	–55°C to +125°C	±1/2 LSB	±2 LSB	Q-24
AD7547SE	–55°C to +125°C	±1 LSB	±6 LSB	E-28A
AD7547TE	–55°C to +125°C	±1/2 LSB	±3 LSB	E-28A
AD7547UE	–55°C to +125°C	±1/2 LSB	±2 LSB	E-28A

NOTES

1Analog Devices reserves the right to ship ceramic packages (D-24A) in lieu of cerdip packages (Q-24).

2To order MIL-STD-883, Class B processed parts, add /883B to part number. Contact your local sales office for military data sheets.

3E = Leadless Ceramic Chip Carrier; N = Plastic DIP; P = Plastic Leaded Chip Carrier; Q = Cerdip; R = SOIC.

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD7547 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.

WARNING!

ESD SENSITIVE DEVICE

REV. A

–3–