Texas Instruments SN74AHCT86D, SN74AHCT86DBLE, SN74AHCT86DBR, SN74AHCT86DGVR, SN74AHCT86DR Datasheet

	SN54AHCT86, SN74AHCT86
	QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES
	SCLS250J ± OCTOBER 1995 ± REVISED JANUARY 2000
D EPIC (Enhanced-Performance Implanted	SN54AHCT86 . . . J OR W PACKAGE
CMOS) Process	SN74AHCT86 . . . D, DB, DGV, N, OR PW PACKAGE
D Inputs Are TTL-Voltage Compatible		(TOP VIEW)
D Latch-Up Performance Exceeds 250 mA Per	1A				1	14			VCC
JESD 17	1B	2				13			4B
D ESD Protection Exceeds 2000 V Per	1Y				3	12			4A
MIL-STD-883, Method 3015; Exceeds 200 V	2A				4	11			4Y
Using Machine Model (C = 200 pF, R = 0)	2B				5	10			3B

	D Package Options Include Plastic			2Y	6		9	3A
	Small-Outline (D), Shrink Small-Outline		GND		7		8	3Y
	(DB), Thin Very Small-Outline (DGV), Thin
	Shrink Small-Outline (PW), and Ceramic Flat		SN54AHCT86 . . . FK PACKAGE
	(W) Packages, Ceramic Chip Carriers (FK),
				(TOP VIEW)
	and Standard Plastic (N) and Ceramic (J)
						NC	CC
	DIPs			1B	1A			4B
							V
	description		1Y	3	2	1	20 19		4A
				4				18
	The 'AHCT86 devices are quadruple 2-input		NC	5				17	NC
	exclusive-OR gates. These devices perform the		2A	6				16	4Y
	Boolean function Y = A	B or Y = AB + AB in	NC	7				15	NC
	positive logic.		2B	8				14	3B
	The SN54AHCT86 is characterized for operation			9	10 11 12 13
				2Y	GND	NC	3Y	3A
	over the full military temperature range of ±55°C
	to 125°C.The SN74AHCT86 is characterized for
	operation from ±40 C to 85 C.		NC ± No internal connection
	°	°

FUNCTION TABLE (each gate)

INPUTS		OUTPUT
A	B	Y
L	L	L
L	H	H
H	L	H
H	H	L

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

EPIC is a trademark of Texas Instruments Incorporated.

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

Copyright 2000, Texas Instruments Incorporated

On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.

POST OFFICE BOX 655303 •DALLAS, TEXAS 75265

1

SN54AHCT86, SN74AHCT86

QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES

SCLS250J ± OCTOBER 1995 ± REVISED JANUARY 2000

logic symbol²

		1
	1A		= 1	3	1Y
		2
	1B
		4		6
	2A				2Y
		5
	2B
		9
	3A			8
		10			3Y
	3B
		12
	4A			11
		13			4Y
	4B

² This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Pin numbers shown are for the D, DB, DGV, J, N, PW, and W packages.

exclusive-OR logic

An exclusive-OR gate has many applications, some of which can be represented better by alternative logic symbols.

EXCLUSIVE OR

= 1

These are five equivalent exclusive-OR symbols valid for an SN74AHCT86 gate in positive logic; negation may be shown at any two ports.

LOGIC-IDENTITY ELEMENT				EVEN-PARITY ELEMENT			ODD-PARITY ELEMENT
		=			2k			2k + 1
	The output is active (low) if			The output is active (low) if			The output is active (high) if
	all inputs stand at the same			an even number of inputs			an odd number of inputs
	logic level (i.e., A = B).			(i.e., 0 or 2) are active.			(i.e., only 1 of the 2) are
							active.

2	POST OFFICE BOX 655303 •DALLAS, TEXAS 75265