Texas Instruments CD74ACT00M96, CD74ACT00M, CD74ACT00E, CD74AC00M96, CD74AC00M Datasheet
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Data sheet acquired from Harris Semiconductor SCHS223
September 1998
CD74AC00,
CD74ACT00
Quad 2-Input NAND Gate
[ /Title (CD74 AC00, CD74 ACT00
)
/Subject (Quad 2-Input NAND Gate) /Autho r () /Keywords (Harris Semicon- ductor, Advan ced CMOS , Harris Semicon- ductor, Advan ced TTL) /Creator ()
Features
•Typical Propagation Delay
-3.2ns at VCC = 5V, TA = 25oC, CL = 50pF
•Exceeds 2kV ESD Protection MIL-STD-883, Method 3015
•SCR-Latchup-Resistant CMOS Process and Circuit Design
•Speed of Bipolar FAST™/AS/S with Significantly Reduced Power Consumption
•Balanced Propagation Delays
•AC Types Feature 1.5V to 5.5V Operation and Balanced Noise Immunity at 30% of the Supply
•±24mA Output Drive Current
-Fanout to 15 FAST™ ICs
-Drives 50Ω Transmission Lines
Description
The CD74AC00 and CD74ACT00 are quad 2-input NAND gates that utilize the Harris Advanced CMOS Logic technology.
Ordering Information
PART |
TEMP. |
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PKG. |
NUMBER |
RANGE (oC) |
PACKAGE |
NO. |
CD74AC00E |
-55 to 125 |
14 Ld PDIP |
E14.3 |
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CD74ACT00E |
-55 to 125 |
14 Ld PDIP |
E14.3 |
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CD74AC00M |
-55 to 125 |
14 Ld SOIC |
M14.15 |
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CD74ACT00M |
-55 to 125 |
14 Ld SOIC |
M14.15 |
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NOTES: |
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1.When ordering, use the entire part number. Add the suffix 96 to obtain the variant in the tape and reel.
2.Wafer and die for this part number is available which meets all electrical specifications. Please contact your local sales office or Harris customer service for ordering information.
Pinout |
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Functional Diagram |
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CD74AC00, CD74ACT00 |
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(PDIP, SOIC) |
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1 |
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TOP VIEW |
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1A |
3 |
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2 |
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1B |
1Y |
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1A |
1 |
14 |
VCC |
2A |
4 |
6 |
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5 |
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2B |
2Y |
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1B |
2 |
13 |
4A |
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3B |
9 |
8 |
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10 |
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1Y |
3 |
12 |
4B |
3A |
3Y |
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2A |
4 |
11 |
4Y |
4B |
12 |
11 |
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13 |
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4A |
4Y |
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2B |
5 |
10 |
3A |
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GND = 7 |
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2Y |
6 |
9 |
3B |
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VCC = 14 |
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GND |
7 |
8 |
3Y |
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TRUTH TABLE |
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INPUTS |
OUTPUTS |
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A |
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B |
Y |
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L |
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L |
H |
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H |
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L |
H |
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L |
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H |
H |
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H |
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H |
L |
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CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. |
File Number 1855.1 |
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FAST™ is a Trademark of Fairchild Semiconductor. |
1 |
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Copyright © Harris Corporation 1998 |
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CD74AC00, CD74ACT00
Absolute Maximum Ratings
DC Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . |
-0.5V to 6V |
DC Input Diode Current, IIK |
±20mA |
For VI < -0.5V or VI > VCC + 0.5V . . . . . . . . . . . . . . . . . . |
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DC Output Diode Current, IOK |
±50mA |
For VO < -0.5V or VO > VCC + 0.5V . . . . . . . . . . . . . . . . |
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DC Output Source or Sink Current per Output Pin, IO |
±50mA |
For VO > -0.5V or VO < VCC + 0.5V . . . . . . . . . . . . . . . . |
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DC VCC or Ground Current, ICC or IGND (Note 3) . . . . . . |
. . .±100mA |
Thermal Information |
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Thermal Resistance (Typical, Note 5) |
θJA (oC/W) |
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. 90 |
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. 175 |
Maximum Junction Temperature (Plastic Package) . . . |
. . . . . . . 150oC |
Maximum Storage Temperature Range . . . . . . . . . . |
-65oC to 150oC |
Maximum Lead Temperature (Soldering 10s) . . . . . . |
. . . . . . . 300oC |
Operating Conditions
Temperature Range, TA . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC
Supply Voltage Range, VCC (Note 4)
AC Types. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.5V to 5.5V
ACT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V
DC Input or Output Voltage, VI, VO . . . . . . . . . . . . . . . . . 0V to VCC
Input Rise and Fall Slew Rate, dt/dv
AC Types, 1.5V to 3V . . . . . . . . . . . . . . . . . . . . . . . . . 50ns (Max)
AC Types, 3.6V to 5.5V . . . . . . . . . . . . . . . . . . . . . . . . 20ns (Max)
ACT Types, 4.5V to 5.5V. . . . . . . . . . . . . . . . . . . . . . . 10ns (Max)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
3.For up to 4 outputs per device, add ±25mA for each additional output.
4.Unless otherwise specified, all voltages are referenced to ground.
5.θJA is measured with the component mounted on an evaluation PC board in free air.
DC Electrical Specifications
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TEST |
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-40oC TO |
-55oC TO |
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CONDITIONS |
VCC |
25oC |
85oC |
125oC |
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PARAMETER |
SYMBOL |
VI (V) |
IO (mA) |
(V) |
MIN |
MAX |
MIN |
MAX |
MIN |
MAX |
UNITS |
AC TYPES |
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High Level Input Voltage |
VIH |
- |
- |
1.5 |
1.2 |
- |
1.2 |
- |
1.2 |
- |
V |
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3 |
2.1 |
- |
2.1 |
- |
2.1 |
- |
V |
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5.5 |
3.85 |
- |
3.85 |
- |
3.85 |
- |
V |
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Low Level Input Voltage |
VIL |
- |
- |
1.5 |
- |
0.3 |
- |
0.3 |
- |
0.3 |
V |
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3 |
- |
0.9 |
- |
0.9 |
- |
0.9 |
V |
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5.5 |
- |
1.65 |
- |
1.65 |
- |
1.65 |
V |
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High Level Output Voltage |
VOH |
VIH or VIL |
-0.05 |
1.5 |
1.4 |
- |
1.4 |
- |
1.4 |
- |
V |
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-0.05 |
3 |
2.9 |
- |
2.9 |
- |
2.9 |
- |
V |
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-0.05 |
4.5 |
4.4 |
- |
4.4 |
- |
4.4 |
- |
V |
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-4 |
3 |
2.58 |
- |
2.48 |
- |
2.4 |
- |
V |
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-24 |
4.5 |
3.94 |
- |
3.8 |
- |
3.7 |
- |
V |
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-75 |
5.5 |
- |
- |
3.85 |
- |
- |
- |
V |
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(Note 6, 7) |
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-50 |
5.5 |
- |
- |
- |
- |
3.85 |
- |
V |
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(Note 6, 7) |
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