Fairchild Semiconductor 74LVTH2244WMX, 74LVTH2244WM, 74LVTH2244SJX, 74LVTH2244SJ, 74LVTH2244MTCX Datasheet
...
July 1999
Revised August 1999
74LVT2244 • 74LVTH2244
Low Voltage Octal Buffer/Line Driver with 3-STATE Outputs
General Description
The LVT2244 and LVTH2244 are octal buffers and line drivers designed to be employed as memory address drivers, clock drivers and bus oriented transmitters or receivers which provides improved PC board density. The equivalent 25Ω-Series resistors helps reduce output overshoot and undershoot.
The LVTH2244 data inputs include bushold, eliminating the need for external pull-up resistors to hold unused inputs.
These octal buffers and line drivers are designed for lowvoltage (3.3V) VCC applications, but with the capability to provide a TTL interface to a 5V environment. The LVT2244 and LVTH2244 are fabricated with an advanced BiCMOS technology to achieve high speed operation similar to 5V ABT while maintaining low power dissipation.
Features
■Input and output interface capability to systems at 5V VCC
■Equivalent 25Ω-Series resistors on outputs
■Bushold data inputs eliminate the need for external pullup resistors to hold unused inputs (74LVTH2244), also available without bushold feature (74LVT2244).
■Live insertion/extraction permitted
■Power Up/Down high impedance provides glitch-free bus loading
■Outputs source/sink −12 mA/+12 mA
■Latch-up performance exceeds 500 mA
Ordering Code:
Order Number |
Package Number |
Package Description |
|
|
|
74LVT2244WM |
M20B |
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide |
|
|
|
74LVT2244SJ |
M20D |
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide |
|
|
|
74LVT2244MTC |
MTC20 |
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide |
|
|
|
74LVTH2244WM |
M20B |
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide |
|
|
|
74LVTH2244SJ |
M20D |
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide |
|
|
|
74LVTH2244MTC |
MTC20 |
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide |
|
|
|
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol |
Connection Diagram |
|
IEEE/IEC |
Outputs STATE-3 with Driver Buffer/Line Octal Voltage Low 74LVTH2244 • 74LVT2244
© 1999 Fairchild Semiconductor Corporation |
DS012170 |
www.fairchildsemi.com |
74LVT2244 • 74LVTH2244
Pin Descriptions |
Truth Tables |
|
|
||||||||||
|
|
|
|
|
|
|
|
|
|
|
|||
|
|
Pin Names |
Description |
|
|
|
Inputs |
|
Outputs |
||||
|
|
|
|
|
|
|
|
|
|
|
|
|
(Pins 12, 14, 16, 18) |
|
OE1, OE2 |
3-STATE Output Enable Inputs |
|
|
OE |
|
In |
|
|||||
|
|
|
|
|
|
|
|
1 |
|
|
|
||
|
I0–I7 |
Inputs |
|
|
|
|
|
|
|||||
|
|
|
L |
|
L |
L |
|||||||
|
O0–O7 |
Outputs |
|
|
L |
|
H |
H |
|||||
|
|
|
|
|
|
|
|
|
H |
|
X |
Z |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Inputs |
|
Outputs |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
(Pins 3, 5, 7, 9) |
|
|
|
|
|
|
|
|
|
OE2 |
|
In |
|
|
|
|
|
|
|
|
|
|
|
L |
|
L |
L |
|
|
|
|
|
|
|
|
|
|
L |
|
H |
H |
|
|
|
|
|
|
|
|
|
|
H |
|
X |
Z |
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
H |
= HIGH Voltage Level |
|
|
|||
|
|
|
|
|
|
|
L = LOW Voltage Level |
|
|
||||
|
|
|
|
|
|
|
X = Immaterial |
|
|
||||
|
|
|
|
|
|
|
Z = High Impedance |
|
|
||||
www.fairchildsemi.com |
2 |
Loading...