July 1989
Revised November 1999
74ACQ245 • 74ACTQ245
Quiet Series Octal Bidirectional Transceiver with 3-STATE Inputs/Outputs
General Description |
Features |
|
The ACQ/ACTQ245 contains eight non-inverting bidirec- |
■ ICC and IOZ reduced by 50% |
|
tional buffers with 3-STATE outputs and is intended for bus- |
■ Guaranteed simultaneous switching noise level and |
|
oriented applications. Current sinking capability is 24 mA at |
||
dynamic threshold performance |
||
both the A and B ports. The Transmit/Receive (T/R) input |
||
■ Guaranteed pin-to-pin skew AC performance |
||
determines the direction of data flow through the bidirec- |
||
■ Improved latch-up immunity |
||
tional transceiver. Transmit (active-HIGH) enables data |
||
from A Ports to B Ports; Receive (active-LOW) enables |
■ 3-STATE outputs drive bus lines or buffer memory |
|
data from B Ports to A Ports. The Output Enable input, |
address registers |
|
when HIGH, disables both A and B ports by placing them in |
■ Outputs source/sink 24 mA |
|
a HIGH Z condition. |
||
■ Faster prop delays than the standard ACT245 |
||
The ACQ/ACTQ utilizes Fairchild Quiet Series technol- |
||
|
||
ogy to guarantee quiet output switching and improve |
|
|
dynamic threshold performance. FACT Quiet Series fea- |
|
|
tures GTO output control and undershoot corrector in |
|
|
addition to a split ground bus for superior performance. |
|
Ordering Code:
Order Number |
Package Number |
Package Description |
|
|
|
74ACQ245SC |
M20B |
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide Body |
|
|
|
74ACQ245SJ |
M20D |
20-Lead Small Outline Package (SOP) EIAJ TYPE II, 5.3mm Wide |
|
|
|
74ACQ245PC |
N20A |
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide |
|
|
|
74ACTQ245SC |
M20B |
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide Body |
|
|
|
74ACTQ245SJ |
M20D |
20-Lead Small Outline Package (SOP) EIAJ TYPE II, 5.3mm Wide |
|
|
|
74ACTQ245QSC |
MQA20 |
20-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150” Wide |
|
|
|
74ACTQ245MSA |
MSA20 |
20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide |
|
|
|
74ACTQ245MTC |
MTC20 |
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide |
|
|
|
74ACTQ245PC |
N20A |
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide |
|
|
|
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
FACT |
, Quiet Series |
, FACT Quiet Series |
, and GTO are trademarks of Fairchild Semiconductor Corporation. |
Inputs/Outputs STATE-3 with Transceiver Bidirectional Octal Series Quiet 74ACTQ245 • 74ACQ245
© 1999 Fairchild Semiconductor Corporation |
DS010236 |
www.fairchildsemi.com |
74ACQ245 • 74ACTQ245
Connection Diagram
Logic Symbols
IEEE/IEC
Pin Descriptions
Pin Names |
Description |
||||
|
|
|
|
|
|
|
|
|
|
|
Output Enable Input |
|
OE |
|
|
||
|
|
|
|
Transmit/Receive Input |
|
|
T/R |
|
|||
|
A0–A7 |
Side A 3-STATE Inputs or 3-STATE Outputs |
|||
|
B0–B7 |
Side B 3-STATE Inputs or 3-STATE Outputs |
Truth Table
|
|
Inputs |
|
Outputs |
||
|
|
|
|
|
|
|
OE |
|
T/R |
|
|
||
|
|
|
|
|
|
|
|
L |
|
L |
|
Bus B Data to Bus A |
|
|
L |
|
H |
|
Bus A Data to Bus B |
|
|
H |
|
X |
|
HIGH-Z State |
|
|
|
|
|
|
|
|
H = |
HIGH Voltage Level |
L = |
LOW Voltage Level |
X = |
Immaterial |
www.fairchildsemi.com |
2 |
Absolute Maximum Ratings(Note 1)
Supply Voltage (VCC) |
− 0.5V to + 7.0V |
|
DC Input Diode Current (IIK) |
|
|
VI = |
− 0.5V |
− 20 mA |
VI = |
VCC + 0.5V |
+ 20 mA |
DC Input Voltage (VI) |
− 0.5V to VCC + 0.5V |
|
DC Output Diode Current (IOK) |
|
|
VO = |
− 0.5V |
− 20 mA |
VO = |
VCC + 0.5V |
+ 20 mA |
DC Output Voltage (VO) |
− 0.5V to VCC + 0.5V |
|
DC Output Source |
|
|
or Sink Current (IO) |
± 50 mA |
|
DC VCC or Ground Current |
|
|
per Output Pin (ICC or IGND) |
± 50 mA |
|
Storage Temperature (TSTG) |
− 65° C to + 150° C |
|
DC Latch-Up Source or |
|
|
Sink Current |
± 300 mA |
|
Junction Temperature (TJ) |
|
|
PDIP |
140° C |
Recommended Operating
Conditions
Supply Voltage (VCC) |
|
ACQ |
2.0V to 6.0V |
ACTQ |
4.5V to 5.5V |
Input Voltage (VI) |
0V to VCC |
Output Voltage (VO) |
0V to VCC |
Operating Temperature (TA) |
− 40° C to + 85° C |
Minimum Input Edge Rate ∆ V/∆ t |
|
ACQ Devices |
|
VIN from 30% to 70% of VCC |
|
VCC @ 3.0V, 4.5V, 5.5V |
125 mV/ ns |
Minimum Input Edge Rate ∆ V/∆ t |
|
ACTQ Devices |
|
VIN from 0.8V to 2.0V |
|
VCC @ 4.5V, 5.5V |
125 mV/ns |
Note 1: Absolute maximum ratings are those values beyond which damage to the device may occur. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. Fairchild does not recommend operation of FACT circuits outside databook specifications.
DC Electrical Characteristics for ACQ
Symbol |
Parameter |
VCC |
|
TA = + 25° C |
|
TA = − 40° C to + 85° C |
Units |
|
Conditions |
|||
|
|
(V) |
Typ |
|
Guaranteed Limits |
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
|||
VIH |
Minimum HIGH Level |
3.0 |
|
1.5 |
2.1 |
|
2.1 |
|
VOUT = |
0.1V |
||
|
Input Voltage |
4.5 |
|
2.25 |
3.15 |
|
3.15 |
V |
or VCC − |
0.1V |
||
|
|
5.5 |
|
2.75 |
3.85 |
|
3.85 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
VIL |
Maximum LOW Level |
3.0 |
|
1.5 |
0.9 |
|
0.9 |
|
VOUT = |
0.1V |
||
|
Input Voltage |
4.5 |
|
2.25 |
1.35 |
|
1.35 |
V |
or VCC − |
0.1V |
||
|
|
5.5 |
|
2.75 |
1.65 |
|
1.65 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
VOH |
Minimum HIGH Level |
3.0 |
|
2.99 |
2.9 |
|
2.9 |
|
|
|
|
|
|
Output Voltage |
4.5 |
|
4.49 |
4.4 |
|
4.4 |
V |
IOUT = |
− |
50 µ A |
|
|
|
5.5 |
|
5.49 |
5.4 |
|
5.4 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
VIN = |
VIL or VIH |
||
|
|
3.0 |
|
|
2.56 |
|
2.46 |
|
IOH = |
− |
12 mA |
|
|
|
4.5 |
|
|
3.86 |
|
3.76 |
V |
IOH = |
− |
24 mA |
|
|
|
5.5 |
|
|
4.86 |
|
4.76 |
|
IOH = |
− 24 mA (Note 2) |
||
VOL |
Maximum LOW Level |
3.0 |
|
0.002 |
0.1 |
|
0.1 |
|
|
|
|
|
|
Output Voltage |
4.5 |
|
0.001 |
0.1 |
|
0.1 |
V |
IOUT = |
50 µ A |
||
|
|
5.5 |
|
0.001 |
0.1 |
|
0.1 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
VIN = |
VIL or VIH |
||
|
|
3.0 |
|
|
0.36 |
|
0.44 |
|
IOL = |
12 mA |
||
|
|
4.5 |
|
|
0.36 |
|
0.44 |
V |
IOL = |
24 mA |
||
|
|
5.5 |
|
|
0.36 |
|
0.44 |
|
IOL = |
24 mA (Note 2) |
||
IIN |
Maximum Input |
5.5 |
|
|
± 0.1 |
|
± 1.0 |
µ A |
VI = |
VCC, GND |
||
(Note 4) |
Leakage Current |
|
|
|
||||||||
|
|
|
|
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
|
||
IOLD |
Minimum Dynamic |
5.5 |
|
|
|
|
75 |
mA |
VOLD = |
1.65V Max |
||
IOHD |
Output Current (Note 3) |
5.5 |
|
|
|
|
− 75 |
mA |
VOHD = |
|
3.85V Min |
|
ICC |
Maximum Quiescent |
5.5 |
|
|
4.0 |
|
40.0 |
µ A |
VIN = |
VCC |
||
(Note 4) |
Supply Current |
|
|
|
or GND |
|
||||||
|
|
|
|
|
|
|
|
|||||
|
|
|
|
|
|
|
|
|
|
|||
IOZT |
Maximum I/O |
|
|
|
|
|
|
|
VI (OE) = VIL, VIH |
|||
|
Leakage Current |
5.5 |
|
|
± 0.3 |
|
± 3.0 |
µ A |
VI = |
VCC, GND |
||
|
|
|
|
|
|
|
|
|
VO = |
VCC, GND |
74ACTQ245 • 74ACQ245
3 |
www.fairchildsemi.com |
74ACQ245 • 74ACTQ245
DC Electrical Characteristics for ACQ (Continued)
Symbol |
Parameter |
VCC |
TA = + 25° C |
|
TA = − 40° C to + 85° C |
Units |
Conditions |
|
|
|
(V) |
Typ |
|
Guaranteed Limits |
|
|
|
|
|
|
|
|
|
|
|
|
VOLP |
Quiet Output |
5.0 |
1.1 |
1.5 |
|
|
V |
Figure 1, Figure 2 |
|
Maximum Dynamic VOL |
|
|
(Note 5)(Note 6) |
||||
|
|
|
|
|
|
|
||
VOLV |
Quiet Output |
5.0 |
− 0.6 |
− 1.2 |
|
|
V |
Figure 1, Figure 2 |
|
Minimum Dynamic VOL |
|
|
(Note 5)(Note 6) |
||||
|
|
|
|
|
|
|
||
VIHD |
Minimum HIGH Level |
5.0 |
3.1 |
3.5 |
|
|
V |
(Note 5)(Note 7) |
|
Dynamic Input Voltage |
|
|
|||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
VILD |
Maximum LOW Level |
5.0 |
1.9 |
1.5 |
|
|
V |
(Note 5)(Note 7) |
|
Dynamic Input Voltage |
|
|
|||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Note 2: All outputs loaded; thresholds on input associated with output under test.
Note 3: Maximum test duration 2.0 ms, one output loaded at a time.
Note 4: IIN and ICC @ 3.0V are guaranteed to be less than or equal to the respective limit @ 5.5V VCC.
Note 5: DIP package.
Note 6: Max number of outputs defined as (n). Data Inputs are driven 0V to 5V; one output @ GND.
Note 7: Max number of Data Inputs (n) switching. (n− 1) Inputs switching 0V to 5V (ACQ). Input-under-test switching: 5V to threshold (VILD), 0V to threshold (VIHD), f = 1 MHz.
DC Electrical Characteristics for ACTQ
Symbol |
Parameter |
VCC |
TA = + 25° C |
TA = − 40° C to + 85° C |
Units |
|
Conditions |
||||
|
|
(V) |
Typ |
Guaranteed Limits |
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
||
VIH |
Minimum HIGH Level |
4.5 |
1.5 |
2.0 |
|
2.0 |
V |
VOUT = |
0.1V |
||
|
Input Voltage |
5.5 |
1.5 |
2.0 |
|
2.0 |
or VCC − |
0.1V |
|||
|
|
|
|||||||||
VIL |
Maximum LOW Level |
4.5 |
1.5 |
0.8 |
|
0.8 |
V |
VOUT = |
0.1V |
||
|
Input Voltage |
5.5 |
1.5 |
0.8 |
|
0.8 |
or VCC − |
0.1V |
|||
|
|
|
|||||||||
VOH |
Minimum HIGH Level |
4.5 |
4.49 |
4.4 |
|
4.4 |
V |
IOUT = |
− |
50 µ A |
|
|
Output Voltage |
5.5 |
5.49 |
5.4 |
|
5.4 |
|||||
|
|
|
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
VIN = |
VIL or VIH |
||
|
|
4.5 |
|
3.86 |
3.76 |
V |
IOH = |
− |
24 mA |
||
|
|
5.5 |
|
4.86 |
4.76 |
IOH = |
− 24 mA (Note 8) |
||||
|
|
|
|
||||||||
VOL |
Maximum LOW Level |
4.5 |
0.001 |
0.1 |
|
0.1 |
V |
IOUT = |
50 µ A |
||
|
Output Voltage |
5.5 |
0.001 |
0.1 |
|
0.1 |
|||||
|
|
|
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
VIN = |
VIL or VIH |
||
|
|
4.5 |
|
0.36 |
0.44 |
V |
IOL = |
24 mA |
|||
|
|
5.5 |
|
0.36 |
0.44 |
IOL = |
24 mA (Note 8) |
||||
|
|
|
|
||||||||
IIN |
Maximum Input Leakage Current |
5.5 |
|
± 0.1 |
± |
1.0 |
µ A |
VI = |
VCC, GND |
||
IOZT |
Maximum 3-STATE |
5.5 |
|
± 0.3 |
± |
3.0 |
µ A |
VI = |
VIL, VIH |
||
|
Leakage Current |
|
VO = |
VCC, GND |
|||||||
|
|
|
|
|
|
|
|||||
ICCT |
Maximum ICC/Input |
5.5 |
0.6 |
|
|
1.5 |
mA |
VI = |
VCC − 2.1V |
||
IOLD |
Minimum Dynamic |
5.5 |
|
|
|
75 |
mA |
VOLD = |
1.65V Max |
||
IOHD |
Output Current (Note 9) |
5.5 |
|
|
− 75 |
mA |
VOHD = |
|
3.85V Min |
||
ICC |
Maximum Quiescent Supply Current |
5.5 |
|
4.0 |
40.0 |
µ A |
VIN = |
VCC or GND |
|||
VOLP |
Quiet Output |
5.0 |
1.1 |
1.5 |
|
|
V |
Figure 1, Figure 2 |
|||
|
Maximum Dynamic VOL |
|
|
(Note 10)(Note 11) |
|||||||
|
|
|
|
|
|
|
|||||
VOLV |
Quiet Output |
5.0 |
− 0.6 |
− 1.2 |
|
|
V |
Figure 1, Figure 2 |
|||
|
Minimum Dynamic VOL |
|
|
(Note 10)(Note 11) |
|||||||
|
|
|
|
|
|
|
|||||
VIHD |
Minimum HIGH Level Dynamic Input Voltage |
5.0 |
1.9 |
2.2 |
|
|
V |
(Note 10)(Note 12) |
|||
VILD |
Maximum LOW Level Dynamic Input Voltage |
5.0 |
1.2 |
0.8 |
|
|
V |
(Note 10)(Note 12) |
Note 8: All outputs loaded; thresholds on input associated with output under test.
Note 9: Maximum test duration 2.0 ms, one output loaded at a time.
Note 10: DIP package.
Note 11: Max number of outputs defined as (n). n− 1 Data Inputs are driven 0V to 3V; one output @ GND.
Note 12: Max number of Data Inputs (n) switching. (n− 1) Inputs switching 0V to 3V (ACTQ). Input-under-test switching: 3V to threshold (VILD), 0V to threshold (VIHD) f = 1 MHz.
www.fairchildsemi.com |
4 |