Fairchild Semiconductor 74LVTH245WMX, 74LVTH245WM, 74LVTH245SJX, 74LVTH245SJ, 74LVTH245MTC Datasheet

November 1999

Revised January 2000

74LVT245 • 74LVTH245

Low Voltage Octal Bidirectional Transceiver with 3-STATE Inputs/Outputs

General Description

The LVT245 and LVTH245 contain eight non-inverting bidirectional buffers with 3-STATE outputs and are intended for bus-oriented applications. The Transmit/Receive (T/R) input determines the direction of data flow through the bidirectional transceiver. Transmit (active-HIGH) enables data from A ports to B ports; Receive (active-LOW) enables data from B ports to A ports. The Output Enable input, when HIGH, disables both A and B ports by placing them in a HIGH Z condition.

The LVTH245 data inputs include bushold, eliminating the need for external pull-up resistors to hold unused inputs.

These transceivers are designed for low-voltage (3.3V) VCC applications, but with the capability to provide a TTL interface to a 5V environment. The LVT245 and LVTH245 are fabricated with an advanced BiCMOS technology to achieve high speed operation similar to 5V ABT while maintaining a low power dissipation.

Features

■ Input and output interface capability to systems at 5V VCC

■Bushold data inputs eliminate the need for external pullup resistors to hold unused inputs (74LVTH245), also available without bushold feature (74LVT245).

■Live insertion/extraction permitted

■Power Up/Down high impedance provides glitch-free bus loading

■Outputs source/sink, −32 mA/+64 mA

■Latch-up performance exceeds 500 mA

Ordering Code:

Order Number	Package Number	Package Description
74LVT245WM	M20B	20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide
74LVT245SJ	M20D	20-Lead Small Outline Package (SOP), EIAJ TYPE II 5.3mm Wide
74LVT245MSA	MSA20	20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide
74LVT245MTC	MTC20	20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74LVTH245WM	M20B	20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide
74LVTH245SJ	M20D	20-Lead Small Outline Package (SOP), EIAJ TYPE II 5.3mm Wide
74LVTH245MSA	MSA20	20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide
74LVTH245MTC	MTC20	20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.

Logic Symbols

IEEE/IEC

Inputs/Outputs STATE-3 with Transceiver Bidirectional Octal Voltage Low 74LVTH245 • 74LVT245

© 2000 Fairchild Semiconductor Corporation

DS500203

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74LVT245 • 74LVTH245

Connection Diagram

Pin Descriptions

	Pin Names				Description
					Output Enable Input
	OE
					Transmit/Receive Input
	T/R
	A0–A7				Side A Inputs or 3-STATE Outputs
	B0–B7				Side B Inputs or 3-STATE Outputs

Truth Table

		Inputs				Outputs
	OE		T/R
	L		L			Bus B Data to Bus A
	L		H			Bus A Data to Bus B
	H		X			HIGH-Z State

H = HIGH Voltage Level

L = LOW Voltage Level

X = Immaterial

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Absolute Maximum Ratings(Note 1)

Symbol	Parameter	Value		Conditions	Units
VCC	Supply Voltage	−0.5 to +4.6			V
VI	DC Input Voltage	−0.5 to +7.0			V
VO	Output Voltage	−0.5 to +7.0	Output in 3-STATE		V
		−0.5 to +7.0	Output in HIGH or LOW State (Note 2)		V
IIK	DC Input Diode Current	−50	VI < GND		mA
IOK	DC Output Diode Current	−50	VO < GND		mA
IO	DC Output Current	64	VO > VCC	Output at HIGH State	mA
		128	VO > VCC	Output at LOW State
ICC	DC Supply Current per Supply Pin	±64			mA
IGND	DC Ground Current per Ground Pin	±128			mA
TSTG	Storage Temperature	−65 to +150			°C

Recommended Operating Conditions

Symbol	Parameter	Min	Max	Units
VCC	Supply Voltage	2.7	3.6	V
VI	Input Voltage	0	5.5	V
IOH	High-Level Output Current		−32	mA
IOL	Low-Level Output Current		64	mA
TA	Free Air Operating Temperature	−40	+85	°C
t/ V	Input Edge Rate, VIN = 0.8V–2.0V, VCC = 3.0V	0	10	ns/V

Note 1: Absolute Maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute maximum rated conditions is not implied.

Note 2: IO Absolute Maximum Rating must be observed.

DC Electrical Characteristics

Symbol	Parameter		VCC	TA = -40°C to +85°C		Units	Conditions
			(V)	Min	Max
VIK	Input Clamp Diode Voltage		2.7		-1.2	V	II = -18 mA
VIH	Input HIGH Voltage		2.7–3.6	2.0		V	VO £ 0.1V or
VIL	Input LOW Voltage		2.7–3.6		0.8		VO ³ VCC - 0.1V
VOH	Output HIGH Voltage		2.7–3.6	VCC - 0.2		V	IOH = -100 mA
			2.7	2.4		V	IOH = - 8 mA
			3.0	2.0		V	IOH = -32 mA
VOL	Output LOW Voltage		2.7		0.2	V	IOL = 100 mA
			2.7		0.5	V	IOL = 24 mA
			3.0		0.4	V	IOL = 16 mA
			3.0		0.5	V	IOL = 32 mA
			3.0		0.55	V	IOL = 64 mA
II(HOLD)	Bushold Input Minimum Drive		3.0	75		mA	VI = 0.8V
(Note 3)				-75		mA	VI = 2.0V
II(OD)	Bushold Input Over-Drive		3.0	500		mA	(Note 4)
(Note 3)	Current to Change State			-500		mA	(Note 5)
II	Input Current		3.6		10	mA	VI = 5.5V
		Control Pins	3.6		±1	mA	VI = 0V or VCC
		Data Pins	3.6		-5	mA	VI = 0V
					1	mA	VI = VCC
IOFF	Power Off Leakage Current		0		±100	mA	0V £ VI or VO £ 5.5V
IPU/PD	Power Up/Down		0–1.5V		±100	mA	VO = 0.5V to VCC
	3-STATE Current						VI = GND to VCC
IOZL	3-STATE Output Leakage Current		3.6		-5	mA	VO = 0.5V
IOZL (Note 3)	3-STATE Output Leakage Current		3.6		-5	mA	VO = 0.0V
IOZH	3-STATE Output Leakage Current		3.6		5	mA	VO = 3.0V

74LVTH245 • 74LVT245

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