© 1999 Fairchild Semiconductor Corporation DS010933 www.fairchildsemi.com
June 1991
Revised November 1999
74ACTQ652 Quiet Series Transceiver/Register
74ACTQ652
Quiet Series Transceiver/Register
General Description
The ACTQ652 consists of bus transceiver circuits with D-
type flip-flops, and control circuitry arranged for multiplexed
transmission of data directly from the input bus or from
internal registers. Data on the A or B bus will be clocked
into the registers a s the appropr iate clock pin g oes to the
HIGH logic level. Output Enable pins (OEAB, OEBA
) are
provided to control the transceiver function.
The ACTQ652 utilizes Fairchild FACT Quiet Series tech-
nology to guarantee quiet output switching and improved
dynamic threshold performance. FACT Quiet Series fea-
tures GTO output control and undershoot corrector in
addition to split ground bus for superior performance.
Features
■ Guaranteed simultaneous switching noise level and
dynamic threshold performan ce
■ Guarante ed pin-to-pin skew AC performance
■ Independent registers for A and B buses
■ Multiplexed real-time and stored data
■ Outputs source/sink 24 mA
■ TTL-compatible inputs
Ordering Code:
Device also available in Tape and Reel. Specify by appending s uffix let te r “X” to the ordering code.
Logic Symbols
IEEE/IEC
Connection Diagram
Pin Descriptions
FACT, Qui et Series , FACT Quiet Series and GTO are trademarks of Fairchild Semiconductor Corporation.
Order Number Package Number Package Description
74ACTQ652SC M24B 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide Body
74ACTQ652MTC MTC24 24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74ACTQ652SPC N24C 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-100, 0.300” Wide
Pin Names Description
A
0
–A
7
, B
0
–B
7
A and B Inputs/3-STATE Outputs
CPAB, CPBA Clock Inputs
SAB, SBA Select Inputs
OEAB, OEBA
Output Enable Inputs