Fairchild Semiconductor 74ACTQ543SPC, 74ACTQ543SCX, 74ACTQ543SC, 74ACTQ543QSCX, 74ACTQ543QSC Datasheet
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January 1990
Revised August 2000
74ACQ543• 74ACTQ543
Quiet Series Octal Registered Transceiver with 3-STATE Outputs
General Description
The ACQ/ACTQ543 is a non-inverting octal transceiver containing two sets of D-type registers for temporary storage of data flowing in either direction. Separate Latch Enable and Output Enable inputs are provided for each register to permit independent input and output control in either direction of data flow.
The ACQ/ACTQ utilizes Fairchild Quiet Series technology to guarantee quiet output switching and improved dynamic threshold performance FACT Quiet Series features GTO output control and undershoot corrector in addition to a split ground bus for superior performance.
Features
■Guaranteed simultaneous switching noise level and dynamic threshold performance
■Guaranteed pin-to-pin skew AC performance
■8-bit octal latched transceiver
■Separate controls for data flow in each direction
■Back-to-back registers for storage
■Outputs source/sink 24 mA
■300 mil slim PDIP/SOIC
Ordering Code:
Order Number |
Package Number |
Package Description |
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74ACQ543SC |
M24B |
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide |
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74ACQ543SPC |
N24C |
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide |
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74ACTQ543SC |
M24B |
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide |
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74ACTQ543QSC |
MQA24 |
24-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide |
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74ACTQ543SPC |
N24C |
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide |
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Device also available in Tape and Reel. Specify by appending suffix letter “X” to the order code.
Connection Diagram |
Pin Descriptions |
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Pin Names |
Description |
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A-to-B Output Enable Input (Active LOW) |
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OEAB |
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B-to-A Output Enable Input (Active LOW) |
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OEBA |
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A-to-B Enable Input (Active LOW) |
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CEAB |
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B-to-A Enable Input (Active LOW) |
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CEBA |
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A-to-B Latch Enable Input (Active LOW) |
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LEAB |
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B-to-A Latch Enable Input (Active LOW) |
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LEBA |
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A0–A7 |
A-to-B Data Inputs or |
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B-to-A 3-STATE Outputs |
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B0–B7 |
B-to-A Data Inputs or |
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A-to-B 3-STATE Outputs |
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FACT , Quiet Series , FACT Quiet Series and GTO are trademarks of Fairchild Semiconductor Corporation.
Outputs STATE-3 with Transceiver Registered Octal Series Quiet 74ACTQ543 74ACQ543•
© 2000 Fairchild Semiconductor Corporation |
DS010154 |
www.fairchildsemi.com |
74ACQ543• 74ACTQ543
Logic Symbols |
Functional Description |
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The ACQ/ACTQ543 contains two sets of eight D-type |
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latches, with separate input and output controls for each |
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set. For data flow from A to B, for example, the A-to-B |
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Enable (CEAB) input must be LOW in order to enter data |
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from A0–A7 or take data from B0–B7, as indicated in the |
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Data I/O Control Table. With |
CEAB |
LOW, a LOW signal on |
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the A-to-B Latch Enable (LEAB) input makes the A-to-B |
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latches transparent; a subsequent LOW-to-HIGH transition |
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of the LEAB signal puts the A latches in the storage mode |
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and their outputs no longer change with the A inputs. With |
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CEAB and OEAB both LOW, the 3-STATE B output buffers |
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are active and reflect the data present at the output of the A |
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latches. Control of data flow from B to A is similar, but using |
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the CEBA, LEBA and OEBA inputs |
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IEEE/IEC |
Data I/O Control Table |
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Inputs |
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Latch Status |
Output Buffers |
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CEAB |
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LEAB |
OEAB |
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H |
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X |
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X |
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Latched |
High Z |
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X |
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H |
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X |
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Latched |
— |
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L |
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L |
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X |
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Transparent |
— |
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X |
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X |
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H |
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— |
High Z |
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L |
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X |
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L |
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— |
Driving |
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H = HIGH Voltage Level |
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L = LOW Voltage Level |
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X = Immaterial |
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A-to-B data flow shown; B-to-A flow control is the same, except using |
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CEBA, |
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LEBA |
and |
OEBA |
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Logic Diagram |
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Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
www.fairchildsemi.com |
2 |
Absolute Maximum Ratings(Note 1)
Supply Voltage (VCC) |
− 0.5V to + 7.0V |
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DC Input Diode Current (IIK) |
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VI = |
− 0.5V |
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− 20 mA |
VI = |
VCC + 0.5V |
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+ 20 mA |
DC Input Voltage (VI) |
− 0.5V to VCC + 0.5V |
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DC Output Diode Current (IOK) |
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VO = |
− 0.5V |
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− 20 mA |
VO = |
VCC + 0.5V |
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+ 20 mA |
DC Output Voltage (VO) |
− 0.5V to VCC + 0.5V |
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DC Output Source |
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or Sink Current (IO) |
± |
50 mA |
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DC VCC or Ground Current |
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per Output Pin (ICC or IGND) |
± |
50 mA |
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Storage Temperature (TSTG) |
− 65° C to + 150° C |
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DC Latch-up Source or |
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Sink Current |
± |
300 mA |
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Junction Temperature (TJ) |
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PDIP |
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140° C |
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Recommended Operating
Conditions
Supply Voltage VCC |
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ACQ |
2.0V to 6.0V |
ACTQ |
4.5V to 5.5V |
Input Voltage (VI) |
0V to VCC |
Output Voltage (VO) |
0V to VCC |
Operating Temperature (TA) |
− 40° C to + 85° C |
Minimum Input Edge Rate ∆ V/∆ t |
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ACQ Devices |
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VIN from 30% to 70% of VCC |
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VCC @3.0V, 4.5V, 5.5V |
125 mV/ns |
Minimum Input Edge Rate ∆ V/∆ t |
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ACTQ Devices |
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VIN from 0.8V to 2.0V |
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VCC @ 4.5V, 5.5V |
125 mV/ns |
Note 1: Absolute maximum ratings are those values beyond which damage to the device may occur. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. Fairchild does not recommend operation of FACT circuits outside databook specifications.
DC Electrical Characteristics for ACQ
Symbol |
Parameter |
VCC |
TA = + 25° C |
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TA = − 40° C to + 85° C |
Units |
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Conditions |
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(V) |
Typ |
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Guaranteed Limits |
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VIH |
Minimum HIGH Level |
3.0 |
1.5 |
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2.1 |
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2.1 |
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VOUT = |
0.1V |
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Input Voltage |
4.5 |
2.25 |
3.15 |
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3.15 |
V |
or VCC − |
0.1V |
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5.5 |
2.75 |
3.85 |
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3.85 |
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VIL |
Maximum LOW Level |
3.0 |
1.5 |
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0.9 |
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0.9 |
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VOUT = |
0.1V |
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Input Voltage |
4.5 |
2.25 |
1.35 |
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1.35 |
V |
or VCC − |
0.1V |
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5.5 |
2.75 |
1.65 |
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1.65 |
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VOH |
Minimum HIGH Level |
3.0 |
2.99 |
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2.9 |
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2.9 |
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Output Voltage |
4.5 |
4.49 |
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4.4 |
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4.4 |
V |
IOUT = |
− |
50 µ A |
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5.5 |
5.49 |
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5.4 |
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5.4 |
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VIN = |
VIL or VIH |
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3.0 |
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2.56 |
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2.46 |
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IOH = − 12 mA |
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4.5 |
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3.86 |
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3.76 |
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IOH = − 24 mA |
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5.5 |
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4.86 |
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4.76 |
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IOH = − 24 mA (Note 2) |
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VOL |
Maximum LOW Level |
3.0 |
0.002 |
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0.1 |
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0.1 |
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Output Voltage |
4.5 |
0.001 |
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0.1 |
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0.1 |
V |
IOUT = |
50 µ A |
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5.5 |
0.001 |
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0.1 |
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0.1 |
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VIN = |
VIL or VIH |
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3.0 |
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0.36 |
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0.44 |
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IOL = 12 mA |
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4.5 |
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0.36 |
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0.44 |
V |
IOL = 24 mA |
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5.5 |
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0.36 |
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0.44 |
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IOL = 24 mA (Note 2) |
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IIN |
Maximum Input |
5.5 |
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± |
0.1 |
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± 1.0 |
µ A |
VI = |
VCC, |
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(Note 4) |
Leakage Current |
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GND |
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IOLD |
Minimum Dynamic |
5.5 |
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75 |
mA |
VOLD = |
1.65V Max |
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IOHD |
Output Current (Note 3) |
5.5 |
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− 75 |
mA |
VOHD = |
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3.85V Min |
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ICC |
Maximum Quiescent |
5.5 |
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8.0 |
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80.0 |
µ A |
VIN = |
VCC |
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(Note 4) |
Supply Current |
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or GND |
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IOZT |
Maximum I/O |
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VI (OE) = VIL, VIH |
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Leakage Current |
5.5 |
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± |
0.6 |
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± 6.0 |
µ A |
VI = |
VCC, GND |
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VO = |
VCC, GND |
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74ACTQ543 74ACQ543•
3 |
www.fairchildsemi.com |
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