Fairchild Semiconductor 74ACTQ541SCX, 74ACTQ541SC, 74ACTQ541PC, 74ACTQ541MTCX, 74ACTQ541MTC Datasheet

March 1993

Revised November 1999

74ACTQ541

Quiet Series Octal Buffer/Line Driver with 3-STATE Outputs

General Description

The 74ACTQ541 is an octal buffer/line driver designed to be employed as memory and address drivers, clock drivers and bus oriented transmitter/receivers.

This device is similar in function to the 74ACTQ244 while providing flow-through architecture (inputs on opposite side from outputs). This pinout arrangement makes this device especially useful as an output port for microprocessors, allowing ease of layout and greater PC board density.

The 74ACTQ541 utilizes FACT Quiet Series technology to guarantee quiet output switching and improved dynamic threshold performance. FACT Quiet Series features GTO output control and undershoot corrector in addition to split ground bus for superior performance.

Features

■ICC and IOZ reduced by 50%

■Guaranteed simultaneous switching noise level and dynamic threshold performance

■Guaranteed pin-to-pin skew AC performance

■Inputs and outputs on opposite sides of package for easy board layout

■Non-inverting 3-STATE outputs

■Guaranteed 4 kV minimum ESD immunity

■TTL compatible inputs

■Outputs source/sink 24 mA

Ordering Code:

Order Number	Package Number	Package Description
74ACTQ541SC	M20B	20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
74ACTQ541MTC	MTC20	20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74ACTQ541PC	N20A	20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

Device also available in Tape and Reel. Specify by appending suffix letter “X” to the order code.

Logic Symbol	Connection Diagram
	IEEE/IEC

Pin Descriptions

Truth Table

Inputs

Pin Name

Pin Description

Outputs

OE1

OE2

I

OE1 – OE2

3-STATE Output Enable (Active-LOW)

L

L

H

H

I0 –I7

Inputs

H

X

X

Z

O1 – O7

Outputs

X

H

X

Z

L

L

L

L

H = HIGH

Voltage Level

X =

Immaterial

L = LOW Voltage Level

Z =

High Impedance

FACT , FACT Quiet Series and GTO

are trademarks of Fairchild Semiconductor Corporation.

Outputs STATE-3 with Driver Buffer/Line Octal Series Quiet 74ACTQ541

© 1999 Fairchild Semiconductor Corporation

DS010932

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74ACTQ541

Absolute Maximum Ratings(Note 1)

Supply Voltage (VCC)		− 0.5V to + 7.0V
DC Input Diode Current (IIK)
VI =	− 0.5V	− 20 mA
VI =	VCC + 0.5V	+ 20 mA
DC Input Voltage (VI)		− 0.5V to VCC + 0.5V
DC Output Diode Current (IOK)
VO =	− 0.5V	− 20 mA
VO =	VCC + 0.5V	+ 20 mA
DC Output Voltage (VO)		− 0.5V to VCC + 0.5V
DC Output Source or Sink Current (IO)		± 50 mA
DC VCC or Ground Current
per Output Pin (ICC or IGND)		± 50 mA
Storage Temperature (TSTG)		− 65° C to + 150° C
DC Latch-up Source or Sink Current		± 300 mA
Junction Temperature (TJ)		140° C

Recommended Operating

Conditions

Supply Voltage VCC	4.5V to 5.5V
Input Voltage (VI)	0V to VCC
Output Voltage (VO)	0V to VCC
Operating Temperature (TA)	− 40° C to + 85° C
Minimum Input Edge Rate ∆ V/∆ t
VIN from 0.8V to 2.0V
VCC @ 4.5V, 5.5V	125 mV/ns

Note 1: Absolute maximum ratings are those values beyond which damage to the device may occur. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. Fairchild does not recommend operation of FACT circuits outside databook specifications.

DC Electrical Characteristics

Symbol

Parameter

VCC

TA = + 25° C

TA = − 40° C to + 85° C

Units

Conditions

(V)

Typ

Guaranteed Limits

VIH

Minimum HIGH Level

4.5

1.5

2.0

2.0

V

VOUT =

0.1V

Input Voltage

5.5

1.5

2.0

2.0

or VCC −

0.1V

VIL

Maximum LOW Level

4.5

1.5

0.8

0.8

V

VOUT =

0.1V

Input Voltage

5.5

1.5

0.8

0.8

or VCC −

0.1V

VOH

Minimum HIGH Level

3.0

2.99

2.9

2.9

V

IOUT =

−

50 µ A

Output Voltage

4.5

4.49

4.4

4.4

4.5

3.86

3.76

VIN =

VIL or VIH (Note 2)

5.5

4.86

4.76

V

IOH = − 24 mA

−

24 mA

VOL

Maximum LOW Level

3.0

0.002

0.1

0.1

V

IOUT =

50 µ A

Output Voltage

4.5

0.001

0.1

0.1

4.5

0.36

0.44

VIN =

VIL or VIH (Note 2)

5.5

0.36

0.44

V

IOH = 24 mA

24 mA

IIN

Maximum Input Leakage Current

5.5

±

0.1

±

1.0

µ A

VI =

VCC, GND

IOZ

Maximum 3-STATE

5.5

±

0.25

±

2.5

µ A

VI = VIL, VIH

Leakage Current

VO =

VCC, GND

ICCT

Maximum ICC/Input

5.5

0.6

1.5

mA

VI =

VCC − 2.1V

IOLD

Minimum Dynamic

5.5

75

mA

VOLD =

1.65V Max

IOHD

Output Current (Note 3)

5.5

− 75

mA

VOHD =

3.85V Min

ICC

Maximum Quiescent

5.5

4.0

40.0

µ A

VIN =

VCC or GND

Supply Current

VOLP

Quiet Output

5.0

1.1

1.5

V

Figure 1, Figure 2

Maximum Dynamic VOL

(Note 4)(Note 5)

VOLV

Quiet Output

5.0

− 0.6

− 1.2

V

Figure 1, Figure 2

Minimum Dynamic VOL

(Note 4)(Note 5)

VIHD

Minimum HIGH Level

5.0

1.9

2.2

V

(Note 4)(Note 6)

Dynamic Input Voltage

VILD

Maximum LOW Level

5.0

1.2

0.8

V

(Note 4)(Note 6)

Dynamic Input Voltage

Note 2: All outputs loaded; thresholds on input associated with output under test.

Note 3: Maximum test duration 2.0 ms, one output loaded at a time.

Note 4: Plastic DIP package.

Note 5: Max number of outputs defined as (n). Data inputs are driven 0V to 3V. One output @ GND.

Note 6: Max number of Data Inputs (n) switching. (n–1) Inputs switching 0V to 5V (ACQ). Input-under-test switching: 5V to threshold (VILD), 0V to threshold (VIHD), f = 1 MHz.

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AC Electrical Characteristics

			VCC		TA = + 25° C		TA = − 40° C to + 85° C
	Symbol	Parameter	(V)		CL = 50 pF		CL = 50 pF		Units
			(Note 7)	Min	Typ	Max	Min	Max
	tPLH	Propagation Delay	5.0	2.0	4.5	7.0	2.0	7.5	ns
	tPHL	Data to Output		2.0	5.5	7.0	2.0	7.5
	tPZH	Output Enable Time	5.0	2.0	5.0	9.0	2.0	9.5	ns
	tPZL			2.0	6.5	9.0	2.0	9.5
	tPHZ	Output Disable Time	5.0	1.5	5.5	7.5	1.5	8.0	ns
	tPLZ			1.5	5.5	7.5	1.5	8.0
	tOSHL	Output to Output			0.5	1.0		1.0	ns
	tOSLH	Skew Data to Output (Note 8)			0.5	1.0		1.0
	Note 7: Voltage Range 5.0 is 5.0V ± 0.5V

Note 8: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH). Parameter guaranteed by design.

Capacitance

Symbol	Parameter	Typ	Units		Conditions
CIN	Input Capacitance	4.5	pF	VCC =	OPEN
CPD	Power Dissipation Capacitance	70	pF	VCC =	5.0V

74ACTQ541

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