Fairchild Semiconductor 74ABT125CSJX, 74ABT125CSJ, 74ABT125CSCX, 74ABT125CSC, 74ABT125CMTCX Datasheet
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March 1994
Revised November 1999
74ABT125
Quad Buffer with 3-STATE Outputs
General Description
The ABT125 contains four independent non-inverting buffers with 3-STATE outputs.
Features
■Non-inverting buffers
■Output sink capability of 64 mA, source capability of 32 mA
■Guaranteed latchup protection
■High impedance glitch free bus loading during entire power up and power down cycle
■Nondestructive hot insertion capability
■Disable time less than enable time to avoid bus contention
Ordering Code:
Order Number |
Package Number |
Package Description |
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74ABT125CSC |
M14A |
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow Body |
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74ABT125CSJ |
M14D |
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide |
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74ABT125CMTC |
MTC14 |
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153,4.4mm Wide |
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Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Connection Diagram |
Pin Descriptions |
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Pin Names |
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Descriptions |
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n, Bn |
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Inputs |
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A |
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On |
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Outputs |
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Function Table |
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Inputs |
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Output |
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An |
Bn |
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On |
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L |
L |
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L |
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L |
H |
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H |
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H |
X |
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Z |
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H = |
HIGH Voltage Level |
L = |
LOW Voltage Level |
Z = |
HIGH Impedance |
X = |
Immaterial |
Outputs STATE-3 with Buffer Quad 74ABT125
© 1999 Fairchild Semiconductor Corporation |
DS011667 |
www.fairchildsemi.com |
74ABT125
Absolute Maximum Ratings(Note 1)
Storage Temperature |
− 65° C to + 150° C |
Ambient Temperature under Bias |
− 55° C to + 125° C |
Junction Temperature under Bias |
− 55° C to + 150° C |
VCC Pin Potential to |
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Ground Pin |
− 0.5V to + 7.0V |
Input Voltage (Note 2) |
− 0.5V to + 7.0V |
Input Current (Note 2) |
− 30 mA to + 5.0 mA |
Voltage Applied to Any Output |
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in the Disabled or |
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Power-Off State |
− 0.5V to 5.5V |
in the HIGH State |
− 0.5V to VCC |
Current Applied to Output |
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in LOW State (Max) |
twice the rated IOL (mA) |
DC Latchup Source Current |
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(Across Comm Operating Range) |
− 300 mA |
Over Voltage Latchup (I/O) |
10V |
Recommended Operating
Conditions
Free Air Ambient Temperature |
− 40° C to + 85° C |
Supply Voltage |
+ 4.5V to + 5.5V |
Minimum Input Edge Rate (∆ V/∆ t) |
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Data Input |
50 mV/ns |
Enable Input |
20 mV/ns |
Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied.
Note 2: Either voltage limit or current limit is sufficient to protect inputs.
DC Electrical Characteristics
Symbol |
Parameter |
Min |
Typ |
Max |
Units |
VCC |
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Conditions |
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VIH |
Input HIGH Voltage |
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V |
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Recognized HIGH Signal |
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VIL |
Input LOW Voltage |
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0.8 |
V |
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Recognized LOW Signal |
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VCD |
Input Clamp Diode Voltage |
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− 1.2 |
V |
Min |
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IIN = |
− 18 mA |
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VOH |
Output HIGH Voltage |
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2.5 |
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V |
Min |
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IOH = |
− |
3 mA |
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2.0 |
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V |
Min |
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IOH = |
− |
32 mA |
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VOL |
Output LOW Voltage |
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0.55 |
V |
Min |
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IOL = |
64 mA |
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IIH |
Input HIGH Current |
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1 |
µ A |
Max |
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VIN = |
2.7V (Note 3) |
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1 |
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VIN = |
VCC |
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IBVI |
Input HIGH Current Breakdown Test |
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7 |
µ A |
Max |
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VIN = |
7.0V |
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IIL |
Input LOW Current |
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− 1 |
µ A |
Max |
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VIN = |
0.5V (Note 3) |
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− 1 |
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VIN = |
0.0V |
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VID |
Input Leakage Test |
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V |
0.0 |
IID = |
1.9 µ A, All Other Pin Grounded |
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IOZH |
Output Leakage Current |
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10 |
µ A |
0− 5.5V |
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VOUT = |
2.7V; |
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n = |
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OE |
2.0V |
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IOZL |
Output Leakage Current |
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− 10 |
µ A |
0− 5.5V |
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VOUT = |
0.5V; |
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n = |
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OE |
2.0V |
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IOS |
Output Short-Circuit Current |
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− 275 |
mA |
Max |
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VOUT = |
0.0V |
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ICEX |
Output HIGH Leakage Current |
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50 |
µ A |
Max |
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VOUT = |
VCC |
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IZZ |
Bus Drainage Test |
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100 |
µ A |
0.0 |
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VOUT = |
5.5V; All Others GND |
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ICCH |
Power Supply Current |
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50 |
µ A |
Max |
All Outputs HIGH |
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ICCL |
Power Supply Current |
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15 |
mA |
Max |
All Outputs LOW |
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ICCZ |
Power Supply Current |
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50 |
µ A |
Max |
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n = |
VCC; |
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OE |
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All Others at VCC or Ground |
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ICCT |
Additional ICC /Input |
Outputs Enabled |
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1.5 |
mA |
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VI = |
V CC − 2.1V |
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Outputs 3-STATE |
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1.5 |
mA |
Max |
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Enable Input VI = VCC − 2.1V |
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Outputs 3-STATE |
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50 |
µ A |
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Data Input V I = VCC − 2.1V |
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All Others at VCC or Ground |
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ICCD |
Dynamic ICC |
No Load |
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mA/ |
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Outputs Open |
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(Note 3) |
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0.1 |
MHz |
Max |
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n = |
GND, (Note 4) |
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OE |
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One Bit Toggling, 50% Duty Cycle |
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Note 3: Guaranteed, but not tested. |
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Note 4: For 8 bits toggling, ICCD < 0.8 mA/MHz. |
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www.fairchildsemi.com |
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