Fairchild Semiconductor 74ABT2952CSPC, 74ABT2952CSCX, 74ABT2952CSC, 74ABT2952CMTCX, 74ABT2952CMTC Datasheet

January 1992

Revised November 1999

74ABT2952

Octal Registered Transceiver

General Description

The ABT2952 is an octal registered transceiver. Two 8-bit back to back registers store data flowing in both directions between two bidirectional buses. Separate clock, clock enable and 3-STATE output enable signals are provided for each register. The output pins are guaranteed to source 32 mA and to sink 64 mA.

Features

■Separate clock, clock enable and 3-STATE output enable provided for each register

■A and B output sink capability of 64 mA source capability of 32 mA

■Guaranteed output skew

■Guaranteed multiple output switching specifications

■Output switching specified for both 50 pF and 250 pF loads

■Guaranteed simultaneous switching noise level and dynamic threshold performance

■Guaranteed latchup protection

■High impedance glitch free bus loading during entire power up and power down cycle

■Nondestructive hot insertion capability

Ordering Code:

Order Number	Package Number	Package Description
74ABT2952CSC	M24B	24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide Body
74ABT2952CMSA	MSA24	24-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide
74ABT2952CMTC	MTC24	24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

Device also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Connection Diagram	Pin Descriptions
				Pin Names			Description
			A0–A7				A-Register Inputs/B-Register
							3-STATE Outputs
			B0–B7				B-Register Inputs/A-Register
							3-STATE Outputs
							Output Enable A-Register
				OEA
			CPA				A-Register Clock
							A-Register Clock Enable
			CEA
							Output Enable B-Register
			OEB
			CPB				B-Register Clock
							B-Register Clock Enable
			CEB

Transceiver Registered Octal 74ABT2952

© 1999 Fairchild Semiconductor Corporation

DS010969

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74ABT2952

Truth Table

Output Control

					Internal
			OE			Output	Function
					Q
			H		X	Z	Disable Outputs
			L		L	L	Enable Outputs
			L		H	H
H =
	HIGH Voltage Level
L =	LOW Voltage Level
X =	Immaterial
Z =	HIGH Impedance
=		LOW-to-HIGH Transition
NC =		No Change

Block Diagram

Register Function Table (Applies to A or B Register)

	Inputs				Internal	Function
D	CP	CE			Q
X	X		H		NC	Hold Data
L			L		L	Load Data
H			L		H

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Absolute Maximum Ratings(Note 1)

Storage Temperature	− 65° C to + 150° C
Ambient Temperature under Bias	− 55° C to + 125° C
Junction Temperature under Bias	− 55° C to + 150° C
VCC Pin Potential to Ground Pin	− 0.5V to + 7.0V
Input Voltage (Note 2)	− 0.5V to + 7.0V
Input Current (Note 2)	− 30 mA to + 5.0 mA
Voltage Applied to Any Output
in the Disable or
Power-Off State	− 0.5V to + 5.5V
in the HIGH State	− 0.5V to VCC
Current Applied to Output
in LOW State (Max)	twice the rated IOL (mA)
DC Latchup Source Current	− 500 mA
Over Voltage Latchup (I/O)	10V

Recommended Operating

Conditions

Free Air Ambient Temperature	− 40° C to + 85° C
Supply Voltage	+ 4.5V to + 5.5V
Minimum Input Edge Rate (∆ V/∆ t)
Data Input	50 mV/ns
Enable Input	20 mV/ns
Clock Input	100 mV/ns

Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied.

Note 2: Either voltage limit or current limit is sufficient to protect inputs.

DC Electrical Characteristics

Symbol

Parameter

Min

Typ

Max

Units

VCC

Conditions

VIH

Input HIGH Voltage

2.0

V

Recognized HIGH Signal

VIL

Input LOW Voltage

0.8

V

Recognized LOW Signal

VCD

Input Clamp Diode Voltage

− 1.2

V

Min

IIN =

− 18 mA (Non I/O Pins)

VOH

Output HIGH Voltage

2.5

IOH =

− 3 mA (An, Bn)

2.0

IOH =

− 32 mA (An, Bn)

VOL

Output LOW Voltage

0.55

V

Min

IOL =

64 mA (An, Bn)

VID

Input Leakage Test

4.75

V

0.0

IID =

1.9 µ A (Non-I/O Pins)

All Other Pins Grounded

IIH

Input HIGH Current

1

µ A

Max

VIN =

2.7V (Non-I/O Pins) (Note 3)

1

VIN =

VCC (Non-I/O Pins)

IBVI

Input HIGH Current Breakdown Test

7

µ A

Max

VIN =

7.0V (Non-I/O Pins)

IBVIT

Input HIGH Current Breakdown Test (I/O)

100

µ A

Max

VIN =

5.5V (An, Bn)

IIL

Input LOW Current

− 1

µ A

Max

VIN =

0.5V (Non-I/O Pins) (Note 3)

− 1

VIN =

0.0V (Non-I/O Pins)

IIH +

IOZH

Output Leakage Current

10

µ A

0V–5.5V

VOUT =

2.7V (An, Bn);

OEA

or

OEB

= 2.0V

IIL +

IOZL

Output Leakage Current

− 10

µ A

0V–5.5V

VOUT =

0.5V (An, Bn);

or

= 2.0V

OEA

OEB

IOS

Output Short-Circuit Current

− 100

− 275

mA

Max

VOUT =

0V (An, Bn)

ICEX

Output HIGH Leakage Current

50

µ A

Max

VOUT =

VCC (An, Bn)

IZZ

Bus Drainage Test

100

µ A

0.0V

VOUT =

5.5V (An, Bn);

All Others GND

ICCH

Power Supply Current

250

µ A

Max

All Outputs HIGH

ICCL

Power Supply Current

30

mA

Max

All Outputs LOW

ICCZ

Power Supply Current

50

µ A

Max

Outputs 3-STATE;

All Others GND

ICCT

Additional ICC/Input

2.5

mA

Max

VI =

VCC − 2.1V; All Others

at VCC or GND

ICCD

Dynamic ICC

No Load

0.18

mA/MHz

Max

Outputs Open

(Note 4)

OEA

or

OEB

= GND,

Non-I/O = GND or VCC

One Bit toggling, 50% duty cycle

(Note 4)

Note 3: Guaranteed, but not tested.

Note 4: For 8-bit toggling, ICCD <

1.4 mA/MHz.

74ABT2952

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