February 1990
Revised November 1999
100395
Low Power 9-Bit ECL-to-TTL Translator with Registers
General Description
The 100395 is a 9-bit translator for converting F100K logic levels to TTL logic levels. A HIGH on the output enable (OE) holds the TTL outputs in a high impedance state. Two separate clock inputs are available for multiplexing and system level testing.
The 100395 is designed with TTL 64 mA outputs for bus driving capability. All inputs have 50 kΩ pull down resistors. When the inputs are either unconnected or at the same potential, the outputs will go LOW.
Features
■64 mA IOL drive capability
■2000V ESD protection
■− 4.2V to − 5.7V operating range
■Registered outputs
■TTL outputs
Ordering Code:
Order Number |
Package Number |
Package Description |
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100395QC |
V28A |
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square |
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Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol |
Connection Diagram |
Pin Descriptions |
Truth Table |
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Pin Names |
Description |
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Inputs |
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Outputs |
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D0–D8 |
Data Inputs (ECL) |
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CP1 |
CP2 |
OE |
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DN |
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QN |
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Q0–Q8 |
Data Outputs (TTL) |
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L |
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L |
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L |
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L |
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OE |
Output Enable (ECL) |
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L |
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L |
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L |
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L |
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CP1, CP2 |
Clock Inputs (ECL) |
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L |
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L |
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H |
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H |
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L |
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L |
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H |
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H |
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H |
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X |
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X |
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X |
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NC |
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X |
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H |
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X |
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X |
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NC |
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L |
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L |
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X |
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X |
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NC |
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X |
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X |
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H |
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X |
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Z |
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H = HIGH Voltage Level |
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Z = |
High Impedance |
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L = LOW Voltage Level |
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NC = No Change |
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X = Don't Care |
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Registers with Translator TTL-to-ECL Bit-9 Power Low 100395
© 1999 Fairchild Semiconductor Corporation |
DS010651 |
www.fairchildsemi.com |
100395
Logic Diagram
www.fairchildsemi.com |
2 |
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