October 1993
Revised January 1999
74ABT16543
16-Bit Registered Transceiver with 3-STATE Outputs
General Description
The ABT16543 16-bit transceiver contains two sets of D- type latches for temporary storage of data flowing in either direction. Separate Latch Enable and Output Enable inputs are provided for each register to permit independent control of inputting and outputting in either direction of data flow. Each byte has separate control inputs, which can be shorted together for full 16-bit operation.
Features
■Back-to-back registers for storage
■Bidirectional data path
■A and B outputs have current sourcing capability of 32 mA and current sinking capability of 64 mA
■Separate control logic for each byte
■16-bit version of the ABT543
■Separate controls for data flow in each direction
■Guaranteed latchup protection
■High impedance glitch free bus loading during entire power up and power down cycle
■Nondestructive hot insertion capability
Ordering Code:
Order Number |
Package Number |
Package Description |
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74ABT16543CSSC |
MS56A |
56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300” Wide |
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74ABT16543CMTD |
MTD56 |
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide |
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Devices also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram |
Pin Descriptions |
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Pin Assignment for SSOP and TSSOP |
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Pin Names |
Description |
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n |
A-to-B Output Enable Input (Active LOW) |
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OEAB |
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n |
B-to-A Output Enable Input (Active LOW) |
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OEBA |
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n |
A-to-B Enable Input (Active LOW) |
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CEAB |
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n |
B-to-A Enable Input (Active LOW) |
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CEBA |
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n |
A-to-B Latch Enable Input (Active LOW) |
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LEAB |
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n |
B-to-A Latch Enable Input (Active LOW) |
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LEBA |
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A0–A15 |
A-to-B Data Inputs or |
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B-to-A 3-STATE Outputs |
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B0–B15 |
B-to-A Data Inputs or |
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A-to-B 3-STATE Outputs |
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Outputs STATE-3 with Transceiver Registered Bit-16 74ABT16543
© 1999 Fairchild Semiconductor Corporation |
DS011646.prf |
www.fairchildsemi.com |
74ABT16543
Logic Symbol
Functional Description
The ABT16543 contains two sets of D-type latches, with separate input and output controls for each. For data flow from A to B, for example, the A to B Enable (CEAB) input must be low in order to enter data from the A port or take data from the B-Port as indicated in the Data I/O Control Table. With CEAB low, a low signal on (LEAB) input makes the A to B latches transparent; a subsequent low to high transition of the LEAB line puts the A latches in the storage
Logic Diagrams
Byte 1 (0:7)
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
Data I/O Control Table
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Inputs |
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Latch Status |
Output Buffers |
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n |
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CEAB |
LEAB |
OEAB |
(Byte n) |
(Byte n) |
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H |
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X |
X |
Latched |
HIGH Z |
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X |
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H |
X |
Latched |
— |
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L |
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L |
X |
Transparent |
— |
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X |
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X |
H |
— |
HIGH Z |
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L |
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X |
L |
— |
Driving |
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H = HIGH Voltage Level
L = LOW Voltage Level X = Immaterial
A-to-B data flow shown;
B-to-A flow control is the same, except using CEBAn, LEBAn and OEBAn
mode and their outputs no longer change with the A inputs. With CEAB and OEAB both low, the B output buffers are active and reflect the data present on the output of the A latches. Control of data flow from B to A is similar, but using the CEBA, LEBA and OEBA. Each byte has separate control inputs, allowing the device to be used as two 8-bit transceivers or as one 16-bit transceiver.
Byte 2 (8:15)
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
www.fairchildsemi.com |
2 |
Absolute Maximum Ratings(Note 1)
Storage Temperature |
−65°C to +150°C |
Ambient Temperature under Bias |
−55°C to +125°C |
Junction Temperature under Bias |
−55°C to +150°C |
VCC Pin Potential to |
−0.5V to +7.0V |
Ground Pin |
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Input Voltage (Note 2) |
−0.5V to +7.0V |
Input Current (Note 2) |
−30 mA to +5.0 mA |
Voltage Applied to Any Output |
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in the Disable or |
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Power-Off State |
−0.5V to +5.5V |
in the HIGH State |
−0.5V to VCC |
Current Applied to Output |
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in LOW State (Max) |
twice the rated IOL (mA) |
DC Latchup Source Current |
−500 mA |
Over Voltage Latchup (I/O) |
10V |
Recommended Operating
Conditions
Free Air Ambient Temperature |
−40°C to +85°C |
Supply Voltage |
+4.5V to +5.5V |
Minimum Input Edge Rate ( V/ |
t) |
Data Input |
50 mV/ns |
Enable Input |
20 mV/ns |
Clock Input |
100 mV/ns |
Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied.
Note 2: Either voltage limit or current limit is sufficient to protect inputs.
DC Electrical Characteristics
Symbol |
Parameter |
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Min |
Typ |
Max |
Units |
VCC |
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Conditions |
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VIH |
Input HIGH Voltage |
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2.0 |
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V |
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Recognized HIGH Signal |
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VIL |
Input LOW Voltage |
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0.8 |
V |
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Recognized LOW Signal |
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VCD |
Input Clamp Diode Voltage |
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−1.2 |
V |
Min |
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IIN = −18 mA (Non I/O Pins) |
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VOH |
Output HIGH Voltage |
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2.5 |
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IOH = −3 mA, (An, Bn) |
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2.0 |
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IOH = −32 mA, (An, Bn) |
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VOL |
Output LOW Voltage |
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0.55 |
V |
Min |
IOL = 64 mA, (An, Bn) |
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VID |
Input Leakage Test |
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4.75 |
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V |
0.0 |
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IID = 1.9 μA, (Non-I/O Pins) |
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All Other Pins Grounded |
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IIH |
Input HIGH Current |
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1 |
μA |
Max |
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VIN = 2.7V (Non-I/O Pins) ((Note 3) |
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1 |
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VIN = VCC (Non-I/O Pins) |
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IBVI |
Input HIGH Current Breakdown Test |
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7 |
μA |
Max |
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VIN = 7.0V (Non-I/O Pins) |
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IBVIT |
Input HIGH Current |
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100 |
μA |
Max |
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VIN = 5.5V (An, Bn) |
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Breakdown Test (I/O) |
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IIL |
Input LOW Current |
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−1 |
μA |
Max |
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VIN = 0.5V (Non-I/O Pins) (Note 3) |
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−1 |
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VIN = 0.0V (Non-I/O Pins) |
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IIH + IOZH |
Output Leakage Current |
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10 |
μA |
0V–5.5V |
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VOUT = 2.7V (An, Bn); |
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or |
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= 2V |
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OEAB |
CEAB |
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IIL + IOZL |
Output Leakage Current |
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−10 |
μA |
0V–5.5V |
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VOUT = 0.5V (An, Bn); |
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or |
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= 2V |
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OEAB |
CEAB |
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IOS |
Output Short-Circuit Current |
−100 |
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−275 |
mA |
Max |
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VOUT = 0V (An, Bn) |
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ICEX |
Output HIGH Leakage Current |
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50 |
μA |
Max |
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VOUT = VCC (An, Bn) |
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IZZ |
Bus Drainage Test |
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100 |
μA |
0.0V |
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VOUT = 5.5V (An, Bn); All Others GND |
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ICCH |
Power Supply Current |
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1.0 |
mA |
Max |
All Outputs HIGH |
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ICCL |
Power Supply Current |
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60 |
mA |
Max |
All Outputs LOW |
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ICCZ |
Power Supply Current |
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1.0 |
mA |
Max |
Outputs 3-STATE |
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All Others at VCC or GND |
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ICCT |
Additional ICC/Input |
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2.5 |
mA |
Max |
VI = VCC − 2.1V |
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All Others at VCC or GND |
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ICCD |
Dynamic ICC |
No Load |
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Outputs Open, |
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= GND, |
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CEAB, |
OEAB, |
LEAB |
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(Note 3) |
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0.25 |
mA/MHz |
Max |
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= VCC, One Bit Toggling, |
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CEBA |
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50% Duty Cycle |
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Note 3: Guaranteed but not tested.
74ABT16543
3 |
www.fairchildsemi.com |
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