Fairchild Semiconductor 74ABT16245CSSC, 74ABT16245CMTDX, 74ABT16245CMTD, 74ABT16245CSSCX Datasheet

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Fairchild Semiconductor 74ABT16245CSSC, 74ABT16245CMTDX, 74ABT16245CMTD, 74ABT16245CSSCX Datasheet

April 1992

Revised November 1999

74ABT16245

16-Bit Transceiver with 3-STATE Outputs

General Description

The ABT16245 contains sixteen non-inverting bidirectional buffers with 3-STATE outputs and is intended for bus oriented applications. The device is byte controlled. Each byte has separate control inputs which can be shorted together for full 16-bit operation. The T/R inputs determine the direction of data flow through the device. The OE inputs disable both the A and B ports by placing them in a high impedance state.

Features

Bidirectional non-inverting buffers

Separate control logic for each byte

16-bit version of the ABT245

A and B output sink capability of 64 mA, source capability of 32 mA

Guaranteed output skew

Guaranteed multiple output switching specifications

Output switching specified for both 50 pF and 250 pF loads

Guaranteed simultaneous switching noise level and dynamic threshold performance

Guaranteed latchup protection

High impedance glitch free bus loading during entire power up and power down cycle

Non-destructive hot insertion capability

Ordering Code:

Order Number

Package Number

Package Description

 

 

 

74ABT16245CSSC

MS48A

48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300” Wide

 

 

 

74ABT16245CMTD

MTD48

48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

 

 

 

Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.

Logic Symbol

Connection Diagram

Pin Descriptions

 

Pin Names

Description

 

 

 

 

 

 

 

 

n

Output Enable Input (Active LOW)

 

OE

 

 

 

 

Transmit/Receive Input

 

T/R

n

 

A0–A15

Side A Inputs/Outputs

 

B0–B15

Side B Inputs/Outputs

Outputs STATE-3 with Transceiver Bit-16 74ABT16245

© 1999 Fairchild Semiconductor Corporation

DS010986

www.fairchildsemi.com

74ABT16245

Truth Tables

 

Logic Diagrams

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Inputs

Outputs

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

OE1

T/R1

 

 

 

 

L

 

L

Bus B0–B7 Data to Bus A0–A7

 

 

 

L

 

H

Bus A0–A7 Data to Bus B0–B7

 

 

 

H

 

X

HIGH-Z State on A0–A7, B0–B 7

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Inputs

 

Outputs

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

OE2

T/R2

 

 

 

 

 

L

L

 

Bus B8–B15 Data to Bus A8–A 15

 

 

 

L

H

 

Bus A8–A15 Data to Bus B8–B 15

 

 

 

H

X

 

HIGH-Z State on A8–A15, B8–B 15

 

H =

HIGH Voltage Level

L =

LOW Voltage Level

X =

Immaterial

Z =

High Impedance

Functional Description

The ABT16245 contains sixteen non-inverting bidirectional buffers with 3-STATE outputs. The device is byte controlled with each byte functioning identically, but independent of the other. The control pins can be shorted together to obtain full 16-bit operation.

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Absolute Maximum Ratings(Note 1)

Storage Temperature

− 65° C to + 150° C

Ambient Temperature under Bias

− 55° C to + 125° C

Junction Temperature under Bias

− 55° C to + 150° C

VCC Pin Potential to Ground Pin

− 0.5V to + 7.0V

Input Voltage (Note 2)

− 0.5V to + 7.0V

Input Current (Note 2)

− 30 mA to + 5.0 mA

Voltage Applied to Any Output

 

in the Disabled or

 

Power-Off State

− 0.5V to 5.5V

in the HIGH State

− 0.5V to VCC

Current Applied to Output

 

in LOW State (Max)

twice the rated IOL (mA)

DC Latchup Source Current

− 500 mA

Over Voltage Latchup (I/O)

10V

Recommended Operating

Conditions

Free Air Ambient Temperature

− 40° C to + 85° C

Supply Voltage

+ 4.5V to + 5.5V

Minimum Input Edge Rate (∆ V/∆ t)

 

Data Input

50 mV/ns

Enable Input

20 mV/ns

Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied.

Note 2: Either voltage limit or current limit is sufficient to protect inputs.

DC Electrical Characteristics

Symbol

Parameter

Min

Typ

Max

Units

VCC

 

 

 

 

 

 

Conditions

 

VIH

 

Input HIGH Voltage

 

2.0

 

 

V

 

 

 

Recognized HIGH Signal

 

VIL

 

Input LOW Voltage

 

 

 

0.8

V

 

 

 

Recognized LOW Signal

 

VCD

 

Input Clamp Diode Voltage

 

 

− 1.2

V

Min

 

IIN =

− 18 mA

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

n)

 

 

 

 

(OE

n, T/R

 

VOH

 

Output HIGH Voltage

 

2.5

 

 

V

Min

 

IOH =

− 3 mA (An, Bn)

 

 

 

 

 

 

 

 

 

2.0

 

 

V

Min

 

IOH =

− 32 mA (An, Bn)

 

 

 

 

 

VOL

 

Output LOW Voltage

 

 

 

0.55

V

Min

 

IOL =

64 mA (An, Bn)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

IIH

 

Input HIGH Current

 

 

 

1

 

 

 

 

VIN =

2.7V

 

 

 

 

 

 

 

 

 

 

 

 

 

n) (Note 3)

 

 

 

 

µ A

Max

(OE

n, T/R

 

 

 

 

 

 

1

 

VIN =

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VCC

(OE

n, T/R

n)

 

 

 

 

 

IBVI

 

Input HIGH Current Breakdown Test

 

 

7

µ A

Max

 

VIN =

7.0V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

n)

 

 

 

 

(OE

n, T/R

 

IBVIT

 

Input HIGH Current Breakdown Test (I/O)

 

 

100

µ A

Max

 

VIN =

5.5V (An, Bn)

 

 

 

 

 

IIL

 

Input LOW Current

 

 

 

− 1

 

 

 

 

VIN =

0.5V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

n) (Note 3)

 

 

 

 

µ A

Max

(OE

n, T/R

 

 

 

 

 

 

− 1

 

VIN =

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0.0V

(OE

n, T/R

n)

 

VID

 

Input Leakage Test

 

4.75

 

 

V

 

0.0

 

IID =

1.9 µ A

 

 

 

 

 

 

 

 

 

 

 

 

 

 

n)

 

 

 

 

 

 

(OE

n, T/R

 

 

 

 

 

 

 

 

 

 

 

 

All Other Pins Grounded

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

IIH +

I OZH

Output Leakage Current

 

 

 

10

µ A

0 −

5.5V

 

VOUT =

 

2.7V (An, Bn);

 

 

=

2.0V

 

 

 

OE

IIL +

I OZL

Output Leakage Current

 

 

 

− 10

µ A

0 −

5.5V

 

VOUT =

 

0.5V (An, Bn);

 

 

 

=

2.0V

 

 

 

OE

IOS

 

Output Short-Circuit Current

− 100

 

− 275

mA

Max

 

VOUT =

 

0.0V (An, Bn)

 

 

 

 

 

ICEX

 

Output HIGH Leakage Current

 

 

50

µ A

Max

 

VOUT =

 

VCC (An, Bn)

 

 

 

 

 

IZZ

 

Bus Drainage Test

 

 

 

100

µ A

 

0.0

 

VOUT =

 

5.50V (An, Bn);

 

 

 

 

 

 

 

 

 

 

 

 

All Others GND

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

ICCH

 

Power Supply Current

 

 

 

100

µ A

Max

All Outputs HIGH

 

 

 

 

 

ICCL

 

Power Supply Current

 

 

 

60

mA

Max

All Outputs LOW

 

 

 

 

 

ICCZ

 

Power Supply Current

 

 

 

100

µ A

Max

 

 

n =

 

 

 

 

 

 

 

 

 

 

n = GND or VCC

 

 

 

 

 

OE

VCC, T/R

 

 

 

 

 

 

 

 

 

 

 

All others at VCC or GND

 

ICCT

 

Additional ICC/Input

Outputs Enabled

 

 

2.5

mA

 

 

 

VI =

VCC − 2.1V

 

 

 

 

 

 

 

 

Outputs 3-STATE

 

 

2.5

mA

Max

 

 

 

n VI =

VCC

 

 

 

 

 

 

 

 

OE

n, T/

R

2.1V

 

 

 

 

Outputs 3-STATE

 

 

50

µ A

 

 

 

Data Input VI =

VCC

2.1V

 

 

 

 

 

 

 

 

 

 

 

 

All others at VCC or GND

 

ICCD

 

Dynamic ICC

No Load

 

 

 

mA/

Max

 

Outputs OPEN

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

(Note 3)

 

 

 

0.1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

MHz

 

OEn =

GND, T/Rn = GND or VCC

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

One Bit Toggling, 50% Duty Cycle

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Note 3: Guaranteed, but not tested.

74ABT16245

3

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