April 1992
Revised November 1999
74ABT16245
16-Bit Transceiver with 3-STATE Outputs
General Description
The ABT16245 contains sixteen non-inverting bidirectional buffers with 3-STATE outputs and is intended for bus oriented applications. The device is byte controlled. Each byte has separate control inputs which can be shorted together for full 16-bit operation. The T/R inputs determine the direction of data flow through the device. The OE inputs disable both the A and B ports by placing them in a high impedance state.
Features
■Bidirectional non-inverting buffers
■Separate control logic for each byte
■16-bit version of the ABT245
■A and B output sink capability of 64 mA, source capability of 32 mA
■Guaranteed output skew
■Guaranteed multiple output switching specifications
■Output switching specified for both 50 pF and 250 pF loads
■Guaranteed simultaneous switching noise level and dynamic threshold performance
■Guaranteed latchup protection
■High impedance glitch free bus loading during entire power up and power down cycle
■Non-destructive hot insertion capability
Ordering Code:
Order Number |
Package Number |
Package Description |
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74ABT16245CSSC |
MS48A |
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300” Wide |
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74ABT16245CMTD |
MTD48 |
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide |
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Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol |
Connection Diagram |
Pin Descriptions
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Pin Names |
Description |
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n |
Output Enable Input (Active LOW) |
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OE |
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Transmit/Receive Input |
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T/R |
n |
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A0–A15 |
Side A Inputs/Outputs |
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B0–B15 |
Side B Inputs/Outputs |
Outputs STATE-3 with Transceiver Bit-16 74ABT16245
© 1999 Fairchild Semiconductor Corporation |
DS010986 |
www.fairchildsemi.com |
74ABT16245
Truth Tables |
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Logic Diagrams |
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Inputs |
Outputs |
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OE1 |
T/R1 |
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L |
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L |
Bus B0–B7 Data to Bus A0–A7 |
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L |
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H |
Bus A0–A7 Data to Bus B0–B7 |
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H |
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X |
HIGH-Z State on A0–A7, B0–B 7 |
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Inputs |
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Outputs |
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OE2 |
T/R2 |
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L |
L |
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Bus B8–B15 Data to Bus A8–A 15 |
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L |
H |
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Bus A8–A15 Data to Bus B8–B 15 |
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H |
X |
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HIGH-Z State on A8–A15, B8–B 15 |
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H = |
HIGH Voltage Level |
L = |
LOW Voltage Level |
X = |
Immaterial |
Z = |
High Impedance |
Functional Description
The ABT16245 contains sixteen non-inverting bidirectional buffers with 3-STATE outputs. The device is byte controlled with each byte functioning identically, but independent of the other. The control pins can be shorted together to obtain full 16-bit operation.
www.fairchildsemi.com |
2 |
Absolute Maximum Ratings(Note 1)
Storage Temperature |
− 65° C to + 150° C |
Ambient Temperature under Bias |
− 55° C to + 125° C |
Junction Temperature under Bias |
− 55° C to + 150° C |
VCC Pin Potential to Ground Pin |
− 0.5V to + 7.0V |
Input Voltage (Note 2) |
− 0.5V to + 7.0V |
Input Current (Note 2) |
− 30 mA to + 5.0 mA |
Voltage Applied to Any Output |
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in the Disabled or |
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Power-Off State |
− 0.5V to 5.5V |
in the HIGH State |
− 0.5V to VCC |
Current Applied to Output |
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in LOW State (Max) |
twice the rated IOL (mA) |
DC Latchup Source Current |
− 500 mA |
Over Voltage Latchup (I/O) |
10V |
Recommended Operating
Conditions
Free Air Ambient Temperature |
− 40° C to + 85° C |
Supply Voltage |
+ 4.5V to + 5.5V |
Minimum Input Edge Rate (∆ V/∆ t) |
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Data Input |
50 mV/ns |
Enable Input |
20 mV/ns |
Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied.
Note 2: Either voltage limit or current limit is sufficient to protect inputs.
DC Electrical Characteristics
Symbol |
Parameter |
Min |
Typ |
Max |
Units |
VCC |
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Conditions |
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VIH |
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Input HIGH Voltage |
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2.0 |
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V |
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Recognized HIGH Signal |
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VIL |
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Input LOW Voltage |
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0.8 |
V |
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Recognized LOW Signal |
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VCD |
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Input Clamp Diode Voltage |
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− 1.2 |
V |
Min |
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IIN = |
− 18 mA |
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n) |
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(OE |
n, T/R |
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VOH |
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Output HIGH Voltage |
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2.5 |
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V |
Min |
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IOH = |
− 3 mA (An, Bn) |
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2.0 |
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V |
Min |
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IOH = |
− 32 mA (An, Bn) |
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VOL |
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Output LOW Voltage |
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0.55 |
V |
Min |
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IOL = |
64 mA (An, Bn) |
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IIH |
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Input HIGH Current |
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1 |
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VIN = |
2.7V |
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n) (Note 3) |
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µ A |
Max |
(OE |
n, T/R |
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1 |
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VIN = |
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VCC |
(OE |
n, T/R |
n) |
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IBVI |
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Input HIGH Current Breakdown Test |
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7 |
µ A |
Max |
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VIN = |
7.0V |
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n) |
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(OE |
n, T/R |
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IBVIT |
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Input HIGH Current Breakdown Test (I/O) |
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100 |
µ A |
Max |
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VIN = |
5.5V (An, Bn) |
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IIL |
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Input LOW Current |
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− 1 |
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VIN = |
0.5V |
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n) (Note 3) |
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µ A |
Max |
(OE |
n, T/R |
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− 1 |
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VIN = |
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0.0V |
(OE |
n, T/R |
n) |
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VID |
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Input Leakage Test |
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4.75 |
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V |
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0.0 |
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IID = |
1.9 µ A |
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n) |
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(OE |
n, T/R |
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All Other Pins Grounded |
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IIH + |
I OZH |
Output Leakage Current |
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10 |
µ A |
0 − |
5.5V |
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VOUT = |
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2.7V (An, Bn); |
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2.0V |
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OE |
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IIL + |
I OZL |
Output Leakage Current |
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− 10 |
µ A |
0 − |
5.5V |
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VOUT = |
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0.5V (An, Bn); |
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2.0V |
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OE |
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IOS |
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Output Short-Circuit Current |
− 100 |
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− 275 |
mA |
Max |
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VOUT = |
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0.0V (An, Bn) |
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ICEX |
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Output HIGH Leakage Current |
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50 |
µ A |
Max |
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VOUT = |
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VCC (An, Bn) |
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IZZ |
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Bus Drainage Test |
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100 |
µ A |
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0.0 |
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VOUT = |
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5.50V (An, Bn); |
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All Others GND |
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ICCH |
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Power Supply Current |
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100 |
µ A |
Max |
All Outputs HIGH |
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ICCL |
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Power Supply Current |
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60 |
mA |
Max |
All Outputs LOW |
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ICCZ |
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Power Supply Current |
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100 |
µ A |
Max |
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n = |
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n = GND or VCC |
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OE |
VCC, T/R |
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All others at VCC or GND |
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ICCT |
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Additional ICC/Input |
Outputs Enabled |
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2.5 |
mA |
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VI = |
VCC − 2.1V |
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Outputs 3-STATE |
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2.5 |
mA |
Max |
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n VI = |
VCC − |
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OE |
n, T/ |
R |
2.1V |
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Outputs 3-STATE |
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50 |
µ A |
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Data Input VI = |
VCC − |
2.1V |
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All others at VCC or GND |
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ICCD |
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Dynamic ICC |
No Load |
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mA/ |
Max |
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Outputs OPEN |
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(Note 3) |
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0.1 |
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MHz |
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OEn = |
GND, T/Rn = GND or VCC |
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One Bit Toggling, 50% Duty Cycle |
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Note 3: Guaranteed, but not tested.
74ABT16245
3 |
www.fairchildsemi.com |