March 1990
Revised November 1999
74AC125 • 74ACT125
Quad Buffer with 3-STATE Outputs
General Description |
Features |
The AC/ACT125 contains four independent non-inverting |
■ ICC reduced by 50% |
buffers with 3-STATE outputs. |
■ Outputs source/sink 24 mA |
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■ ACT125 has TTL-compatible outputs |
Ordering Code:
Order Number |
Package Number |
Package Description |
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74AC125SC |
M14A |
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow Body |
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74AC125SJ |
M14D |
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide |
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74AC125MTC |
MTC14 |
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide |
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74AC125PC |
N14A |
14-Lead Plastic Dual-in-Line Package (PDIP), JEDEC MS-001, 0.300” Wide |
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74ACT125SC |
M14A |
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow Body |
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74ACT125SJ |
M14D |
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide |
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74ACT125MTC |
MTC14 |
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide |
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74ACT125PC |
N14A |
14-Lead Plastic Dual-in-Line Package (PDIP), JEDEC MS-001, 0.300” Wide |
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Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol |
Connection Diagram |
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IEEE/IEC |
Pin Descriptions |
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Function Table |
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Inputs |
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Output |
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Pin Names |
Description |
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An |
Bn |
On |
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An, Bn |
Inputs |
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L |
L |
L |
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On |
Outputs |
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L |
H |
H |
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H |
X |
Z |
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H = HIGH Voltage Level |
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L = LOW Voltage Level |
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Z = HIGH Impedance |
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X = Immaterial |
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FACT is a trademark of Fairchild Semiconductor Corporation.
Outputs STATE-3 with Buffer Quad 74ACT125 • 74AC125
© 1999 Fairchild Semiconductor Corporation |
DS010692 |
www.fairchildsemi.com |
74AC125 • 74ACT125
Absolute Maximum Ratings(Note 1)
Supply Voltage (VCC) |
− 0.5V to + 7.0V |
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DC Input Diode Current (IK) |
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VI = |
− 0.5V |
− 20 mA |
VI = |
VCC + 0.5V |
+ 20 mA |
DC Input Voltage (VI) |
− 0.5V to VCC + 0.5V |
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DC Output Diode Current (IOK) |
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VO = |
− 0.5V |
− 20 mA |
VO = |
VCC + 0.5V |
+ 20 mA |
DC Output Voltage (VO) |
− 0.5V to VCC + 0.5V |
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DC Output Source |
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or Sink Current (IO) |
± 50 mA |
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DC VCC or Ground Current |
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per Output Pin (ICC or IGND) |
± 50 mA |
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Storage Temperature (TSTG) |
− 65° C to + 150° C |
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Junction Temperature (TJ) |
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PDIP |
140° C |
Recommended Operating
Conditions
Supply Voltage (VCC) |
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AC |
2.0V to 6.0V |
ACT |
4.5V to 5.5V |
Input Voltage (VI) |
0V to VCC |
Output Voltage (VO) |
0V to VCC |
Operating Temperature (TA) |
− 40° C to + 85° C |
Minimum Input Edge Rate (∆ V/∆ t) |
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AC Devices |
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VIN from 30% to 70% of VCC |
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VCC @ 3.3V, 4.5V, 5.5V |
125 mV/ns |
Minimum Input Edge Rate (∆ V/∆ t) |
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ACT Devices |
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VIN from 0.8V to 2.0V |
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VCC @ 4.5V, 5.5V |
125 mV/ns |
Note 1: Absolute maximum ratings are those values beyond which damage to the device may occur. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. Fairchild does not recommend operation of FACT circuits outside databook specifications.
DC Electrical Characteristics for AC
Symbol |
Parameter |
VCC |
TA = + 25° C |
TA = − 40° C to + 85° C |
Units |
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Conditions |
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(V) |
Typ |
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Guaranteed Limits |
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VIH |
Minimum HIGH Level |
3.0 |
1.5 |
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2.1 |
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2.1 |
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VOUT = |
0.1V |
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Input Voltage |
4.5 |
2.25 |
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3.15 |
3.15 |
V |
or VCC − |
0.1V |
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5.5 |
2.75 |
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3.85 |
3.85 |
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VIL |
Maximum LOW Level |
3.0 |
1.5 |
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0.9 |
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0.9 |
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VOUT = |
0.1V |
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Input Voltage |
4.5 |
2.25 |
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1.35 |
1.35 |
V |
or VCC − |
0.1V |
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5.5 |
2.75 |
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1.65 |
1.65 |
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VOH |
Minimum HIGH Level |
3.0 |
2.99 |
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2.9 |
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2.9 |
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Output Voltage |
4.5 |
4.49 |
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4.4 |
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4.4 |
V |
IOUT = |
− |
50 µ A |
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5.5 |
5.49 |
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5.4 |
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5.4 |
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VIN = |
VIL or VIH |
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3.0 |
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2.56 |
2.46 |
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IOH = |
− |
12 mA |
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4.5 |
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3.86 |
3.76 |
V |
IOH = |
− |
24 mA |
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5.5 |
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4.86 |
4.76 |
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IOH = |
− 24 mA (Note 2) |
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VOL |
Maximum LOW Level |
3.0 |
0.002 |
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0.1 |
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0.1 |
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Output Voltage |
4.5 |
0.001 |
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0.1 |
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0.1 |
V |
IOUT = |
50 µ A |
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5.5 |
0.001 |
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0.1 |
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0.1 |
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VIN = |
VIL or VIH |
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3.0 |
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0.36 |
0.44 |
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IOL = |
12 mA |
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4.5 |
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0.36 |
0.44 |
V |
IOL = 24 mA |
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5.5 |
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0.36 |
0.44 |
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IOL = |
24 mA (Note 2) |
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IIN (Note 4) |
Maximum Input Leakage Current |
5.5 |
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± 0.1 |
± |
1.0 |
µ A |
VI = |
VCC, GND |
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IOZ |
Maximum 3-STATE Current |
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VI (OE) = VIL, VIH |
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5.5 |
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± |
0.25 |
± |
2.5 |
µ A |
VI = |
VCC, VGND |
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VO = |
VCC, GND |
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IOLD |
Minimum Dynamic |
5.5 |
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75 |
mA |
VOLD = |
1.65V Max |
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IOHD |
Output Current (Note 3) |
5.5 |
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− 75 |
mA |
VOHD = |
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3.85V Min |
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ICC (Note 4) |
Maximum Quiescent Supply Current |
5.5 |
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4.0 |
40.0 |
µ A |
VIN = |
VCC or GND |
Note 2: All outputs loaded; thresholds on input associated with output under test.
Note 3: Maximum test duration 2.0 ms, one output loaded at a time.
Note 4: Note: IIN and ICC@ 3.0V are guaranteed to be less than or equal to the respective limit @ 5.5V VCC.
www.fairchildsemi.com |
2 |
DC Electrical Characteristics for ACT
Symbol |
Parameter |
VCC |
TA = + 25° C |
TA = − 40° C to + 85° C |
Units |
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Conditions |
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(V) |
Typ |
Guaranteed Limits |
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VIH |
Minimum HIGH Level |
4.5 |
1.5 |
2.0 |
2.0 |
V |
VOUT = |
0.1V |
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Input Voltage |
5.5 |
1.5 |
2.0 |
2.0 |
or VCC − |
0.1V |
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VIL |
Maximum LOW Level |
4.5 |
1.5 |
0.8 |
0.8 |
V |
VOUT = |
0.1V |
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Input Voltage |
5.5 |
1.5 |
0.8 |
0.8 |
or VCC − |
0.1V |
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VOH |
Minimum HIGH Level |
4.5 |
4.49 |
4.4 |
4.4 |
V |
IOUT = |
− |
50 µ A |
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Output Voltage |
5.5 |
5.49 |
5.4 |
5.4 |
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VIN = |
VIL or VIH |
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4.5 |
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3.86 |
3.76 |
V |
IOH = |
− |
24 mA |
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5.5 |
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4.86 |
4.76 |
IOH = |
− 24 mA (Note 5) |
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VOL |
Maximum LOW Level |
4.5 |
0.001 |
0.1 |
0.1 |
V |
IOUT = |
50 µ A |
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Output Voltage |
5.5 |
0.001 |
0.1 |
0.1 |
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VIN = |
VIL or VIH |
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4.5 |
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0.36 |
0.44 |
V |
IOL = |
24 mA |
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5.5 |
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0.36 |
0.44 |
IOL = |
24 mA (Note 5) |
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IIN |
Maximum Input |
5.5 |
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± 0.1 |
± 1.0 |
µ A |
VI = |
VCC, GND |
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Leakage Current |
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IOZ |
Maximum 3-STATE |
5.5 |
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± 0.5 |
± 5.0 |
µ A |
VI = |
VIL, VIH |
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Current |
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VO = |
VCC, GND |
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ICCT |
Maximum ICC/Input |
5.5 |
0.6 |
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1.5 |
mA |
VI = |
VCC − 2.1V (Note 7) |
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IOLD |
Minimum Dynamic |
5.5 |
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75 |
mA |
VOLD = |
1.65V Max |
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IOHD |
Output Current (Note 6) |
5.5 |
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− 75 |
mA |
VOHD = |
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3.85V Min |
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ICC |
Maximum Quiescent |
5.5 |
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4.0 |
40.0 |
µ A |
VIN = |
VCC |
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Supply Current |
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or GND |
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Note 5: All outputs loaded; thresholds on input associated with output under test.
Note 6: Maximum test duration 2.0 ms, one output loaded at a time.
Note 7: May be measured per the JEDEC Alternate Method.
74ACT125 • 74AC125
3 |
www.fairchildsemi.com |