Fairchild Semiconductor 74AC125SJX, 74AC125SJ, 74AC125SCX, 74AC125SC, 74AC125PC Datasheet

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Fairchild Semiconductor 74AC125SJX, 74AC125SJ, 74AC125SCX, 74AC125SC, 74AC125PC Datasheet

March 1990

Revised November 1999

74AC125 • 74ACT125

Quad Buffer with 3-STATE Outputs

General Description

Features

The AC/ACT125 contains four independent non-inverting

■ ICC reduced by 50%

buffers with 3-STATE outputs.

■ Outputs source/sink 24 mA

 

 

■ ACT125 has TTL-compatible outputs

Ordering Code:

Order Number

Package Number

Package Description

 

 

 

74AC125SC

M14A

14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow Body

 

 

 

74AC125SJ

M14D

14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

 

 

 

74AC125MTC

MTC14

14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

 

 

 

74AC125PC

N14A

14-Lead Plastic Dual-in-Line Package (PDIP), JEDEC MS-001, 0.300” Wide

 

 

 

74ACT125SC

M14A

14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow Body

 

 

 

74ACT125SJ

M14D

14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

 

 

 

74ACT125MTC

MTC14

14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

 

 

 

74ACT125PC

N14A

14-Lead Plastic Dual-in-Line Package (PDIP), JEDEC MS-001, 0.300” Wide

 

 

 

Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.

Logic Symbol

Connection Diagram

 

IEEE/IEC

Pin Descriptions

 

Function Table

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Inputs

 

Output

 

 

 

Pin Names

Description

 

 

 

 

 

 

 

 

 

 

 

 

 

 

An

Bn

On

 

 

 

 

 

 

An, Bn

Inputs

 

 

L

L

L

 

On

Outputs

 

 

 

L

H

H

 

 

 

 

 

 

H

X

Z

 

 

 

 

 

 

 

 

 

 

 

 

 

 

H = HIGH Voltage Level

 

 

 

 

 

 

 

L = LOW Voltage Level

 

 

 

 

 

 

 

Z = HIGH Impedance

 

 

 

 

 

 

 

X = Immaterial

 

 

FACT is a trademark of Fairchild Semiconductor Corporation.

Outputs STATE-3 with Buffer Quad 74ACT125 • 74AC125

© 1999 Fairchild Semiconductor Corporation

DS010692

www.fairchildsemi.com

74AC125 • 74ACT125

Absolute Maximum Ratings(Note 1)

Supply Voltage (VCC)

− 0.5V to + 7.0V

DC Input Diode Current (IK)

 

VI =

− 0.5V

− 20 mA

VI =

VCC + 0.5V

+ 20 mA

DC Input Voltage (VI)

− 0.5V to VCC + 0.5V

DC Output Diode Current (IOK)

 

VO =

− 0.5V

− 20 mA

VO =

VCC + 0.5V

+ 20 mA

DC Output Voltage (VO)

− 0.5V to VCC + 0.5V

DC Output Source

 

or Sink Current (IO)

± 50 mA

DC VCC or Ground Current

 

per Output Pin (ICC or IGND)

± 50 mA

Storage Temperature (TSTG)

− 65° C to + 150° C

Junction Temperature (TJ)

 

PDIP

140° C

Recommended Operating

Conditions

Supply Voltage (VCC)

 

AC

2.0V to 6.0V

ACT

4.5V to 5.5V

Input Voltage (VI)

0V to VCC

Output Voltage (VO)

0V to VCC

Operating Temperature (TA)

− 40° C to + 85° C

Minimum Input Edge Rate (∆ V/∆ t)

 

AC Devices

 

VIN from 30% to 70% of VCC

 

VCC @ 3.3V, 4.5V, 5.5V

125 mV/ns

Minimum Input Edge Rate (∆ V/∆ t)

 

ACT Devices

 

VIN from 0.8V to 2.0V

 

VCC @ 4.5V, 5.5V

125 mV/ns

Note 1: Absolute maximum ratings are those values beyond which damage to the device may occur. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. Fairchild does not recommend operation of FACT circuits outside databook specifications.

DC Electrical Characteristics for AC

Symbol

Parameter

VCC

TA = + 25° C

TA = − 40° C to + 85° C

Units

 

Conditions

 

 

(V)

Typ

 

Guaranteed Limits

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VIH

Minimum HIGH Level

3.0

1.5

 

2.1

 

2.1

 

VOUT =

0.1V

 

Input Voltage

4.5

2.25

 

3.15

3.15

V

or VCC

0.1V

 

 

5.5

2.75

 

3.85

3.85

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VIL

Maximum LOW Level

3.0

1.5

 

0.9

 

0.9

 

VOUT =

0.1V

 

Input Voltage

4.5

2.25

 

1.35

1.35

V

or VCC

0.1V

 

 

5.5

2.75

 

1.65

1.65

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VOH

Minimum HIGH Level

3.0

2.99

 

2.9

 

2.9

 

 

 

 

 

 

Output Voltage

4.5

4.49

 

4.4

 

4.4

V

IOUT =

50 µ A

 

 

5.5

5.49

 

5.4

 

5.4

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VIN =

VIL or VIH

 

 

3.0

 

 

2.56

2.46

 

IOH =

12 mA

 

 

4.5

 

 

3.86

3.76

V

IOH =

24 mA

 

 

5.5

 

 

4.86

4.76

 

IOH =

− 24 mA (Note 2)

VOL

Maximum LOW Level

3.0

0.002

 

0.1

 

0.1

 

 

 

 

 

 

Output Voltage

4.5

0.001

 

0.1

 

0.1

V

IOUT =

50 µ A

 

 

5.5

0.001

 

0.1

 

0.1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VIN =

VIL or VIH

 

 

3.0

 

 

0.36

0.44

 

IOL =

12 mA

 

 

4.5

 

 

0.36

0.44

V

IOL = 24 mA

 

 

5.5

 

 

0.36

0.44

 

IOL =

24 mA (Note 2)

IIN (Note 4)

Maximum Input Leakage Current

5.5

 

 

± 0.1

±

1.0

µ A

VI =

VCC, GND

IOZ

Maximum 3-STATE Current

 

 

 

 

 

 

 

VI (OE) = VIL, VIH

 

 

5.5

 

±

0.25

±

2.5

µ A

VI =

VCC, VGND

 

 

 

 

 

 

 

 

 

VO =

VCC, GND

IOLD

Minimum Dynamic

5.5

 

 

 

 

75

mA

VOLD =

1.65V Max

IOHD

Output Current (Note 3)

5.5

 

 

 

 

− 75

mA

VOHD =

 

3.85V Min

ICC (Note 4)

Maximum Quiescent Supply Current

5.5

 

 

4.0

40.0

µ A

VIN =

VCC or GND

Note 2: All outputs loaded; thresholds on input associated with output under test.

Note 3: Maximum test duration 2.0 ms, one output loaded at a time.

Note 4: Note: IIN and ICC@ 3.0V are guaranteed to be less than or equal to the respective limit @ 5.5V VCC.

www.fairchildsemi.com

2

DC Electrical Characteristics for ACT

Symbol

Parameter

VCC

TA = + 25° C

TA = − 40° C to + 85° C

Units

 

 

 

Conditions

 

 

(V)

Typ

Guaranteed Limits

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VIH

Minimum HIGH Level

4.5

1.5

2.0

2.0

V

VOUT =

0.1V

 

Input Voltage

5.5

1.5

2.0

2.0

or VCC

0.1V

 

 

VIL

Maximum LOW Level

4.5

1.5

0.8

0.8

V

VOUT =

0.1V

 

Input Voltage

5.5

1.5

0.8

0.8

or VCC

0.1V

 

 

VOH

Minimum HIGH Level

4.5

4.49

4.4

4.4

V

IOUT =

50 µ A

 

Output Voltage

5.5

5.49

5.4

5.4

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VIN =

VIL or VIH

 

 

4.5

 

3.86

3.76

V

IOH =

24 mA

 

 

5.5

 

4.86

4.76

IOH =

− 24 mA (Note 5)

 

 

 

 

VOL

Maximum LOW Level

4.5

0.001

0.1

0.1

V

IOUT =

50 µ A

 

Output Voltage

5.5

0.001

0.1

0.1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VIN =

VIL or VIH

 

 

4.5

 

0.36

0.44

V

IOL =

24 mA

 

 

5.5

 

0.36

0.44

IOL =

24 mA (Note 5)

 

 

 

 

IIN

Maximum Input

5.5

 

± 0.1

± 1.0

µ A

VI =

VCC, GND

 

Leakage Current

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

IOZ

Maximum 3-STATE

5.5

 

± 0.5

± 5.0

µ A

VI =

VIL, VIH

 

Current

 

VO =

VCC, GND

 

 

 

 

 

 

ICCT

Maximum ICC/Input

5.5

0.6

 

1.5

mA

VI =

VCC − 2.1V (Note 7)

IOLD

Minimum Dynamic

5.5

 

 

75

mA

VOLD =

1.65V Max

IOHD

Output Current (Note 6)

5.5

 

 

− 75

mA

VOHD =

 

3.85V Min

ICC

Maximum Quiescent

5.5

 

4.0

40.0

µ A

VIN =

VCC

 

Supply Current

 

or GND

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Note 5: All outputs loaded; thresholds on input associated with output under test.

Note 6: Maximum test duration 2.0 ms, one output loaded at a time.

Note 7: May be measured per the JEDEC Alternate Method.

74ACT125 • 74AC125

3

www.fairchildsemi.com

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