Fairchild Semiconductor 74AC00SJ, 74AC00SCX, 74AC00SC, 74AC00PC, 74AC00MTCX Datasheet

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November 1988 Revised November 1999

74AC00 • 74ACT00 Quad 2-Input NAND Gate

General Description

The AC/ACT00 contains four 2-input NAND gates.

Features

■ ICC reduced by 50% ■ Outputs source/sink 24 mA

■ ACT00 has TTL-compatible inputs

Ordering Code:

Device also available in Tape and Reel. Specify by appending s uffix let te r “X” to the ordering form. (PC not available in Tape and Reel.)

Logic Symbol

IEEE/IEC

Connection Diagram

Pin Descriptions

FACT is a trademark of Fairchild Semiconductor Corporation.

Order Number Package Number Package Description

74AC00SC M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow Body 74AC00SJ M14D 14-Lead Small Outline Package (SOP), EIAJ Type II, 5.3mm Wide 74AC00MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74AC00PC N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide 74ACT00SC M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow Body 74ACT00SJ M14D 14-Lead Small Outline Package (SOP), EIAJ Type II, 5.3mm Wide 74ACT00MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74ACT00PC N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide

Pin Names Description

, B

Inputs

Outputs

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74AC00 • 74ACT00

Absolute Maximum Ratings(Note 1) Recommended Operating

Conditions

Note 1: Absolute maximum ratings are those values beyond which damage

to the device may occur. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and ou tput/inp ut loadi ng varia bles. Fairchild does no t recommend operat ion of FACT circuits outside da t abook specifications.

DC Electrical Characteristics for AC

Note 2: All outputs loaded; thresholds on input assoc iat ed with output under tes t. Note 3: I

and ICC @ 3.0V are guaranteed to be less than or equa l to th e respective limit @ 5.5V VCC.

Note 4: Maximum test duratio n 2. 0 ms, one output loaded at a time.

Supply Voltage (VCC) −0.5V to +7.0V DC Input Diode Current (I

)

= −0.5V −20 mA

= VCC + 0.5V +20 mA

DC Input Voltage (V

) −0.5V to VCC + 0.5V

DC Output Diode Current (I

)

= −0.5V −20 mA

= VCC + 0.5V +20 mA

DC Output Voltage (V

) −0.5V to VCC + 0.5V

DC Output Source

or Sink Current (I

) ±50 mA

DC V

or Ground Current

per Output Pin (I

or I

GND

) ±50 mA

Storage Temperature (T

STG

) −65°C to +150°C

Junction Temperature (T

)

PDIP 140°C

Supply Voltage (V

) AC 2.0V to 6.0V ACT 4.5V to 5.5V Input Voltage (V

) 0V to V

Output Voltage (VO) 0V to V

Operating Temperature (TA) −40°C to +85°C Minimum Input Edge Rate (∆V/∆t)

AC Devices V

from 30% to 70% of V

VCC @ 3.3V, 4.5V, 5.5V 125 mV/ns

Minimum Input Edge Rate (∆V/∆t)

ACT Devices V

from 0.8V to 2.0V

@ 4.5V, 5.5V 125 mV/ns

Symbol Parameter

TA = +25°CT

= −40°C to +85°C

Units Conditions

(V) Typ Guaranteed Limits

Minimum HIGH Level 3.0 1.5 2.1 2.1 V

OUT

= 0.1V

Input Voltage 4.5 2.25 3.15 3.15 V or VCC − 0.1V

5.5 2.75 3.85 3.85

Maximum LOW Level 3.0 1.5 0.9 0.9 V

OUT

= 0.1V

Input Voltage 4.5 2.25 1.35 1.35 V or VCC − 0.1V

5.5 2.75 1.65 1.65

Minimum HIGH Level 3.0 2.99 2.9 2.9 Output Voltage 4.5 4.49 4.4 4.4 V I

OUT

= −50 µA

5.5 5.49 5.4 5.4 VIN = V

or V

3.0 2.56 2.46 IOH = −12 mA

4.5 3.86 3.76 V I

= −24 mA

5.5 4.86 4.76 I

= −24 mA (Note 2)

Maximum LOW Level 3.0 0.002 0.1 0.1 Output Voltage 4.5 0.001 0.1 0.1 V I

OUT

= 50 µA

5.5 0.001 0.1 0.1 VIN = VIL or V

3.0 0.36 0.44 IOL = 12 mA

4.5 0.36 0.44 V IOL = 24 mA

5.5 0.36 0.44 IOL = 24 mA (Note 2)

Maximum Input

5.5 ±0.1 ±1.0 µAVI = VCC, GND

(Note 3) Leakage Current I

OLD

Minimum Dynamic 5.5 75 mA V

OLD

= 1.65V Max

OHD

Output Current (Note 4) 5.5 −75 mA V

OHD

= 3.85V Min ICC Maximum Quiescent Supply Current 5.5 2.0 20.0 µAVIN = VCC or GND (Note 3)

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74AC00 • 74ACT00

DC Electrical Characteristics for ACT

Note 5: All outputs loaded; thres holds on input associate d w it h output under test. Note 6: Maximum test duration 2.0 ms, one output loaded at a time.

AC Electrical Characteristics for AC

Note 7: Voltage Range 3.3 is 3.3V ± 0.3V

Voltage Range 5.0 is 5.0V ± 0.5V

AC Electrical Characteristics for ACT

Note 8: Voltage Range 5.0 is 5.0V ±0.5V

Capacitance

Symbol Parameter

TA = +25°C TA = −40°C to +85°C

Units Conditions

(V) Typ Guaranteed Limits

Minimum HIGH Level 4.5 1.5 2.0 2.0

OUT

= 0.1V

Input Voltage 5.5 1.5 2.0 2.0 or VCC − 0.1V

Maximum LOW Level 4.5 1.5 0.8 0.8

OUT

= 0.1V

Input Voltage 5.5 1.5 0.8 0.8 or V

− 0.1V

Minimum HIGH Level 4.5 4.49 4.4 4.4

OUT

= −50 µA

Output Voltage 5.5 5.49 5.4 5.4

VIN = V

or V

4.5 3.86 3.76 V

IOH = −24 mA

5.5 4.86 4.76 I

= −24 mA (Note 5)

Maximum LOW Level 4.5 0.001 0.1 0.1

OUT

= 50 µA

Output Voltage 5.5 0.001 0.1 0.1

VIN = V

or V

4.5 0.36 0.44 V IOL = 24 mA

5.5 0.36 0.44 IOL = 24 mA (Note 5)

Maximum Input

5.5 ±0.1 ±1.0 µAVI = VCC, GND

Leakage Current

CCT

Maximum ICC/Input 5.5 0.6 1.5 mA VI = VCC − 2.1V

OLD

Minimum Dynamic 5.5 75 mA V

OLD

= 1.65V Max

OHD

Output Current (Note 6) 5.5 −75 mA V

OHD

= 3.85V Min

Maximum Quiescent

5.5 2.0 20.0 µA

VIN = V

Supply Current or GND

TA = +25°CT

= −40°C to +85°C

Symbol Parameter (V)

= 50 pF CL = 50 pF

Units

(Note 7) Min Typ Max Min Max

PLH

Propagation Delay 3.3 2.0 7.0 9.5 2.0 10.0

5.0 1.5 6.0 8.0 1.5 8.5

PHL

Propagation Delay 3.3 1.5 5.5 8.0 1.0 8.5

5.0 1.5 4.5 6.5 1.0 7.0

TA = +25°CT

= −40°C to +85°C

Symbol Parameter (V)

CL = 50 pF CL = 50 pF

Units

(Note 8) Min Typ Max Min Max

PLH

Propagation Delay 5.0 1.5 5.5 9.0 1.0 9.5 ns

PHL

Propagation Delay 5.0 1.5 4.0 7.0 1.0 8.0 ns

Symbol Parameter Typ Units Conditions

Input Capacitance 4.5 pF VCC = Open

Power Dissipation Capacitance 30.0 pF VCC = 5.0V

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