July 1988
Revised August 2000
100344
Low Power 8-Bit Latch with Cut-Off Drivers
General Description
The 100344 contains eight D-type latches, individual inputs (Dn), outputs (Qn), a common enable pin (E), latch enable
(LE), and output enable pin (OEN). A Q output follows its D input when both E and LE are LOW. When either E or LE (or both) are HIGH, a latch stores the last valid data present on its D input prior to E or LE going HIGH.
A HIGH on OEN holds the outputs in a cut-off state. The cut-off state is designed to be more negative than a normal ECL LOW level. This allows the output emitter-followers to turn off when the termination supply is − 2.0V, presenting a high impedance to the data bus. This high impedance reduces termination power and prevents loss of low state noise margin when several loads share the bus.
The 100344 outputs are designed to drive a doubly terminated 50Ω transmission line (25Ω load impedance). All inputs have 50 kΩ pull-down resistors.
Features
■Cut-off drivers
■Drives 25Ω load
■Low power operation
■2000V ESD protection
■Voltage compensated operating range = − 4.2V to − 5.7V
Ordering Code:
Order Number |
Package Number |
Package Description |
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100344PC |
N24E |
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide |
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100344QC |
V28A |
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square |
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100344QI |
V28A |
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square |
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Industrial Temperature Range (− 40° C to + 85° C) |
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Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagrams
24-Pin DIP 28-Pin PLCC
Logic Symbol
Drivers Off-Cut with Latch Bit-8 Power Low 100344
© 2000 Fairchild Semiconductor Corporation |
DS009883 |
www.fairchildsemi.com |
100344
Pin Descriptions
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Pin Names |
Description |
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D0–D7 |
Data Inputs |
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Enable Input |
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E |
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Latch Enable Input |
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LE |
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Output Enable Input |
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OEN |
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Q0–Q7 |
Data Outputs |
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Logic Diagram
Truth Table
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Inputs |
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Outputs |
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Dn |
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E |
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LE |
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OEN |
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Qn |
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L |
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L |
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L |
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L |
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L |
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H |
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L |
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L |
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L |
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H |
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X |
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H |
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X |
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L |
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Latched (Note 1) |
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X |
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X |
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H |
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L |
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Latched (Note 1) |
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X |
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X |
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X |
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H |
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Cutoff |
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H = HIGH Voltage level |
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L = LOW Voltage level |
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Cutoff = |
lower-than-LOW state |
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X = Don’t Care
Note 1: Retains data present before either LE or E go HIGH.
www.fairchildsemi.com |
2 |
Absolute Maximum Ratings(Note 2)
Storage Temperature (TSTG) |
− 65° C to + 150° C |
Maximum Junction Temperature (TJ) |
+ 150° C |
VEE Pin Potential to Ground Pin |
− 7.0V to + 0.5V |
Input Voltage (DC) |
VEE to + 0.5V |
Output Current (DC Output HIGH) |
− 100 mA |
ESD (Note 3) |
≥ 2000V |
Recommended Operating
Conditions
Case Temperature (TC) |
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Commercial |
0° C to + 85° C |
Industrial |
− 40° C to + 85° |
Supply Voltage (VEE) |
− 5.7V to − 4.2V |
Note 2: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum rating. The “Recommended Operating Conditions” table will define the conditions for actual device operation.
Note 3: ESD testing conforms to MIL-STD-883, Method 3015.
Commercial Version |
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DC Electrical Characteristics |
(Note 4) |
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VEE = − 4.2V to − 5.7V, VCC = VCCA = |
GND, TC = 0° C to + 85° C |
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Symbol |
Parameter |
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Min |
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Typ |
Max |
Units |
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Conditions |
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VOH |
Output HIGH Voltage |
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− 1025 |
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− 955 |
− 870 |
mV |
VIN = |
VIH (Max) |
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Loading with |
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VOL |
Output LOW Voltage |
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− 1830 |
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− 1705 |
− 1620 |
mV |
or VIL (Min) |
25Ω to − 2.0V |
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VOHC |
Output HIGH Voltage |
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− 1035 |
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mV |
VIN = |
VIH (Min) |
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Loading with |
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VOLC |
Output LOW Voltage |
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− 1610 |
mV |
or VIL (Max) |
25Ω to − 2.0V |
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− 1950 |
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VIN = |
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= HIGH |
VOLZ |
Cutoff LOW Voltage |
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mV |
VIH (Min) |
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OEN |
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or VIL (Max) |
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VIH |
Input HIGH Voltage |
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− 1165 |
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− 870 |
mV |
Guaranteed HIGH Signal for All Inputs |
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VIL |
Input LOW Voltage |
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− 1830 |
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− 1475 |
mV |
Guaranteed LOW Signal for All Inputs |
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IIL |
Input LOW Current |
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0.50 |
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µ A |
VIN = |
VIL (Min) |
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IIH |
Input HIGH Current |
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240 |
µ A |
VIN = |
VIH (Max) |
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IEE |
Power Supply Current |
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Inputs Open |
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− 178 |
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− 85 |
mA |
VEE = |
− 4.2V to − 4.8V |
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− 185 |
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− 85 |
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VEE = |
− 4.2V to − 5.7V |
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Note 4: The specified limits represent the “worst case” value for the parameter. Since these values normally occur at the temperature extremes, additional noise immunity and guardbanding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are chosen to guarantee operation under “worst case” conditions.
AC Electrical Characteristics
VEE = − 4.2V to − 5.7V, VCC = |
VCCA = GND |
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Symbol |
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Parameter |
TC = 0° C |
TC = + 25° C |
TC = + 85° C |
Units |
Conditions |
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Min |
Max |
Min |
Max |
Min |
Max |
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tPLH |
Propagation Delay |
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0.90 |
2.10 |
0.90 |
2.10 |
1.00 |
2.30 |
ns |
Figures 1, 2 |
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tPHL |
Dn to Output |
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(Note 5) |
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tPLH |
Propagation Delay |
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1.60 |
3.10 |
1.60 |
3.10 |
1.80 |
3.40 |
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Figures 1, 4 |
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tPHL |
LE, E to Output |
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(Note 5) |
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tPZH |
Propagation Delay |
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1.60 |
4.20 |
1.60 |
4.20 |
1.60 |
4.20 |
ns |
Figures 1, 2 |
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tPHZ |
OEN to Output |
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1.00 |
2.70 |
1.00 |
2.70 |
1.00 |
2.70 |
(Note 5) |
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tTLH |
Transition Time |
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0.45 |
2.00 |
0.45 |
2.00 |
0.45 |
2.00 |
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Figures 1, 3 |
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tTHL |
20% to 80%, 80% to 20% |
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tS |
Setup Time |
D0–D7 |
1.00 |
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1.00 |
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1.10 |
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ns |
Figures 1, 3 |
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tH |
Hold Time |
D0–D7 |
0.10 |
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0.10 |
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0.10 |
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ns |
Figures 1, 3 |
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tPW(H) |
Pulse Width HIGH |
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2.00 |
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2.00 |
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2.00 |
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Figures 1, 3 |
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LE, E |
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Note 5: The propagation delay specified is for single output switching. Delays may vary up to 300 ps with multiple outputs switching.
100344
3 |
www.fairchildsemi.com |