Fairchild Semiconductor 100352QIX, 100352QI, 100352QCX, 100352QC, 100352PC Datasheet

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Fairchild Semiconductor 100352QIX, 100352QI, 100352QCX, 100352QC, 100352PC Datasheet

October 1989

Revised August 2000

100352

Low Power 8-Bit Buffer with Cut-Off Drivers

General Description

The 100352 contains an 8-bit buffer, individual inputs (Dn),

outputs (Qn), and a data output enable pin (OEN). A Q out-

put follows its D input when the OEN pin is LOW. A HIGH on OEN holds the outputs in a cut-off state. The cut-off state is designed to be more negative than a normal ECL LOW level. This allows the output emitter-followers to turn off when the termination supply is − 2.0V, presenting a high impedance to the data bus. This high impedance reduces termination power and prevents loss of low state noise margin when several loads share the bus.

The 100352 outputs are designed to drive a doubly terminated 50Ω transmission line (25Ω load impedance). All inputs have 50 kΩ pull-down resistors.

Features

Cut-off drivers

Drives 25Ω load

Low power operation

2000V ESD protection

Voltage compensated operating range = − 4.2V to − 5.7V

Available to industrial grade temperature range

Ordering Code:

Order Number

Package Number

Package Description

 

 

 

100352PC

N24E

24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide

 

 

 

100352QC

V28A

28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square

 

 

 

100352QI

V28A

28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square

 

 

Industrial Temperature Range (− 40° C to + 85° C)

 

 

 

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Logic Symbol

Connection Diagrams

 

24-Pin DIP

Pin Descriptions

28-Pin PLCC

 

 

 

 

 

 

 

Pin Names

Description

 

 

 

 

 

 

 

 

D0–D7

Data Inputs

 

 

 

 

Output Enable Input

 

 

 

OEN

 

 

 

 

Q0–Q7

Data Outputs

 

 

 

NC

No Connect

 

 

 

 

 

 

 

Drivers Off-Cut with Buffer Bit-8 Power Low 100352

© 2000 Fairchild Semiconductor Corporation

DS010248

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100352

Truth Table

 

Inputs

 

Outputs

 

 

 

 

 

 

Dn

 

 

OEN

 

Qn

L

 

 

L

 

L

 

 

 

 

 

 

H

 

 

L

 

H

 

 

 

 

 

 

X

 

 

H

 

Cutoff

 

 

 

 

 

 

H = HIGH Voltage Level

L = LOW Voltage Level

Cutoff = Lower-than-LOW State

X = Don’t Care

Logic Diagram

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2

Absolute Maximum Ratings(Note 1)

Storage Temperature (TSTG)

− 65° C to + 150° C

Maximum Junction Temperature (TJ)

+ 150° C

VEE Pin Potential to Ground Pin

− 7.0V to + 0.5V

Input Voltage (DC)

VEE to + 0.5V

Output Current (DC Output HIGH)

− 100 mA

ESD (Note 2)

≥ 2000V

Recommended Operating

Conditions

Case Temperature (TC)

 

Commercial

0° C to + 85° C

Industrial

− 40° C to + 85° C

Supply Voltage (VEE)

− 5.7V to − 4.2V

Note 1: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum rating. The “Recommended Operating Conditions” table will define the conditions for actual device operation.

Note 2: ESD testing conforms to MIL-STD-883, Method 3015.

Commercial Version

DC Electrical Characteristics (Note 3)

VEE = − 4.2V to − 5.7V, VCC = VCCA =

GND, TC = 0° C to + 85° C

 

 

 

 

 

 

 

Symbol

Parameter

 

Min

Typ

Max

Units

 

Conditions

 

 

 

 

 

 

 

 

 

 

 

 

VOH

Output HIGH Voltage

 

− 1025

− 955

− 870

mV

VIN =

VIH (Max)

 

Loading with

VOL

Output LOW Voltage

 

− 1830

− 1705

− 1620

or VIL (Min)

 

25Ω to − 2.0V

 

 

 

VOHC

Output HIGH Voltage

 

− 1035

 

 

mV

VIN =

VIH (Min)

 

Loading with

VOLC

Output LOW Voltage

 

 

 

− 1610

 

or VIL (Max)

 

25Ω to − 2.0V

 

 

 

 

 

− 1950

 

VIN =

 

 

 

= HIGH

VOLZ

Cut-Off LOW Voltage

 

 

 

mV

VIH (Min)

 

OEN

 

 

 

 

 

 

 

or VIL (Max)

 

 

 

VIH

Input HIGH Voltage

 

− 1165

 

− 870

mV

Guaranteed HIGH Signal

 

 

 

 

 

 

 

 

 

for All Inputs

 

 

 

 

 

 

 

 

 

 

 

 

VIL

Input LOW Voltage

 

− 1830

 

− 1475

mV

Guaranteed LOW Signal

 

 

 

 

 

 

 

 

 

for All Inputs

 

 

 

 

 

 

 

 

 

 

 

 

 

IIL

Input LOW Current

 

0.50

 

 

µ A

VIN =

VIL (Min)

 

 

IIH

Input HIGH Current

 

 

 

240

µ A

VIN =

VIH (Max)

 

 

IEE

Power Supply Current

 

 

 

 

 

Inputs Open

 

 

 

 

 

− 138

 

− 70

mA

VEE =

− 4.2V to − 4.8V

 

 

 

 

 

− 143

 

− 70

 

VEE =

− 4.2V to − 5.7V

 

 

Note 3: The specified limits represent the “worst case” value for the parameter. Since these values normally occur at the temperature extremes, additional noise immunity and guardbanding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are chosen to guarantee operation under “worst case” conditions.

DIP AC Electrical Characteristics

VEE = − 4.2V to − 5.7V, VCC = VCCA =

GND

 

 

 

 

 

 

 

Symbol

 

 

Parameter

 

TC = 0° C

TC = + 25° C

TC = + 85° C

Units

Conditions

 

 

 

 

 

Min

Max

Min

Max

Min

Max

 

 

 

 

 

 

 

 

 

 

 

 

 

tPLH

Propagation Delay

 

0.70

2.00

0.70

2.00

0.70

2.20

ns

Figures 1, 2

tPHL

Dn to Output

 

(Note 4)

 

 

 

 

 

 

 

 

tPZH

Propagation Delay

 

1.60

4.20

1.60

4.20

1.60

4.20

ns

Figures 1, 2

 

 

 

 

 

 

 

 

 

 

 

 

tPHZ

OEN to Output

 

1.00

2.70

1.00

2.70

1.00

2.70

(Note 4)

 

 

tTLH

Transition Time

 

0.45

2.00

0.45

2.00

0.45

2.00

ns

Figures 1, 2

tTHL

20% to 80%, 80% to 20%

 

 

 

 

 

 

 

 

 

 

Note 4: The propagation delay specified is for single output switching. Delays may vary up to 300 ps with multiple outputs switching.

100352

3

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