September 1992
Revised November 1999
74ABT2541
Octal Buffer/Line Driver with
25Ω Series Resistors in the Outputs
General Description
The ABT2541 is an octal buffer and line driver designed to drive the capacitive inputs of MOS memory drivers, address drivers, clock drivers, and bus-oriented transmitters/receivers. Functionally identical to the ABT541.
The 25Ω series resistors in the outputs reduce ringing and eliminate the need for external resistors.
Features
■Guaranteed output skew
■Guaranteed multiple output switching specifications
■Output switching specified for both 50 pF and 250 pF loads
■Guaranteed simultaneously switching noise level and dynamic threshold performance
■Guaranteed latchup protection
■High impedance glitch free bus loading during entire power up and power down cycle
■Nondestructive hot insertion capability
■Disable time less than enable time to avoid bus contention
Ordering Code:
Order Number |
Package Number |
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Package Description |
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74ABT2541CSC |
M20B |
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide Body |
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74ABT2541CSJ |
M20D |
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide |
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74ABT2541CMSA |
MSA20 |
20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide |
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74ABT2541CMTC |
MTC20 |
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide |
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Devices also available in Tape and Reel. Specify by appending “X” to the ordering code. |
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Connection Diagram |
Pin Descriptions |
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Pin Names |
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Description |
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1, |
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2 |
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Output Enable Input (Active LOW) |
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OE |
OE |
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I0–I7 |
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Inputs |
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O0–O7 |
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Outputs |
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Truth Table |
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Schematic of Each Output |
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Inputs |
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Outputs |
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OE1 |
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OE2 |
I |
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L |
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L |
H |
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H |
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H |
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X |
X |
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Z |
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X |
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H |
X |
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Z |
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L |
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L |
L |
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L |
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H = |
HIGH Voltage Level |
L = |
LOW Voltage Level |
X = |
Immaterial |
Z = |
High Impedance |
Outputs the in Resistors Series Ω25 with Driver Buffer/Line Octal 74ABT2541
© 1999 Fairchild Semiconductor Corporation |
DS011502 |
www.fairchildsemi.com |
74ABT2541
Absolute Maximum Ratings(Note 1)
Storage Temperature |
− 65° C to + 150° C |
Ambient Temperature under Bias |
− 55° C to + 125° C |
Junction Temperature under Bias |
− 55° C to + 150° C |
VCC Pin Potential to Ground Pin |
− 0.5V to + 7.0V |
Input Voltage (Note 2) |
− 0.5V to + 7.0V |
Input Current (Note 2) |
− 30 mA to + 5.0 mA |
Voltage Applied to Any Output |
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in the Disabled or |
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Power-Off State |
− 0.5V to 5.5V |
in the HIGH State |
− 0.5V to VCC |
Current Applied to Output |
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in LOW State (Max) |
twice the rated IOL (mA) |
DC Latchup Source Current |
− 500 mA |
Over Voltage Latchup (I/O) |
10V |
Recommended Operating
Conditions
Free Air Ambient Temperature |
− 40° C to + 85° C |
Supply Voltage |
+ 4.5V to + 5.5V |
Minimum Input Edge Rate (∆ V/∆ t) |
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Data Input |
50 mV/ns |
Enable Input |
20 mV/ns |
Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied.
Note 2: Either voltage limit or current limit is sufficient to protect inputs.
DC Electrical Characteristics
Symbol |
Parameter |
Min |
Typ |
Max |
Units |
VCC |
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Conditions |
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VIH |
Input HIGH Voltage |
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2.0 |
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V |
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Recognized HIGH Signal |
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VIL |
Input LOW Voltage |
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0.8 |
V |
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Recognized LOW Signal |
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VCD |
Input Clamp Diode Voltage |
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− 1.2 |
V |
Min |
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IIN = |
− 18 mA |
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VOH |
Output HIGH Voltage |
2.5 |
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V |
Min |
IOH = |
− |
3 mA |
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2.0 |
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V |
Min |
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IOH = |
− |
32 mA |
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VOL |
Output LOW Voltage |
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0.8 |
V |
Min |
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IOL = |
15 mA |
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IIH |
Input HIGH Current |
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1 |
µ A |
Max |
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VIN = |
2.7V (Note 3) |
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1 |
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VIN = |
VCC |
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IBVI |
Input HIGH Current |
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7 |
µ A |
Max |
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VIN = |
7.0V |
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Breakdown Test |
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IIL |
Input LOW Current |
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− 1 |
µ A |
Max |
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VIN = |
0.5V (Note 3) |
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− 1 |
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VIN = |
0.0V |
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VID |
Input Leakage Test |
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4.75 |
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V |
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0.0 |
IID = |
1.9 µ A |
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All Other Pins Grounded |
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IOZH |
Output Leakage Current |
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10 |
µ A |
0 − |
5.5V |
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VOUT = |
2.7V; |
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n = |
2.0V |
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OE |
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IOZL |
Output Leakage Current |
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− 10 |
µ A |
0 − |
5.5V |
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VOUT = |
0.5V; |
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n = |
2.0V |
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OE |
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IOS |
Output Short-Circuit Current |
− 100 |
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− 275 |
mA |
Max |
VOUT = |
0.0V |
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ICEX |
Output High Leakage Current |
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50 |
µ A |
Max |
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VOUT = |
VCC |
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IZZ |
Bus Drainage Test |
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100 |
µ A |
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0.0 |
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VOUT = |
5.5V; All Others GND |
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ICCH |
Power Supply Current |
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50 |
µ A |
Max |
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All Outputs HIGH |
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ICCL |
Power Supply Current |
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30 |
mA |
Max |
All Outputs LOW |
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ICCZ |
Power Supply Current |
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50 |
µ A |
Max |
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n = |
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OE |
VCC; |
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All Others at VCC or GND |
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ICCT |
Additional ICC/Input |
Outputs Enabled |
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2.5 |
mA |
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VI = |
VCC − 2.1V |
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Outputs 3-STATE |
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2.5 |
mA |
Max |
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Enable Input VI = VCC − 2.1V |
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Outputs 3-STATE |
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50 |
µ A |
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Data Input VI = VCC − 2.1V |
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All Others at VCC or GND |
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ICCD |
Dynamic ICC |
No Load |
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mA/ |
Max |
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Outputs OPEN |
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(Note 4) |
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0.1 |
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MHz |
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OEn = |
GND (Note 3) |
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One Bit Toggling, 50% Duty Cycle |
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Note 3: Guaranteed, but not tested. |
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Note 4: For 8 bit toggling, ICCD < |
0.8 mA/MHz. |
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www.fairchildsemi.com |
2 |
DC Electrical Characteristics
(SOIC Package)
Symbol |
Parameter |
Min |
Typ |
Max |
Units |
VCC |
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Conditions |
CL = 50 pF, RL = 500Ω |
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VOLP |
Quiet Output Maximum Dynamic VOL |
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0.6 |
0.8 |
V |
5.0 |
TA = |
25° C (Note 5) |
VOLV |
Quiet Output Minimum Dynamic VOL |
− 0.5 |
− 0.4 |
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V |
5.0 |
TA = |
25° C (Note 5) |
VOHV |
Minimum HIGH Level Dynamic Output Voltage |
2.7 |
3.1 |
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V |
5.0 |
TA = |
25° C (Note 6) |
VIHD |
Minimum HIGH Level Dynamic Input Voltage |
2.0 |
1.4 |
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V |
5.0 |
TA = |
25° C (Note 7) |
VILD |
Maximum LOW Level Dynamic Input Voltage |
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1.2 |
0.8 |
V |
5.0 |
TA = |
25° C (Note 7) |
Note 5: Max number of outputs defined as (n). n-1 data inputs are driven 0V to 3V. One output at LOW. Guaranteed, but not tested.
Note 6: Max number of data inputs (n) switching. n-1 inputs switching 0V to 3V. Input-under-test switching: 3V to threshold (VILD), 0V to threshold (VIHD). Guaranteed, but not tested.
Note 7: Max number of outputs defined as (n). n − 1 data inputs are driven 0V to 3V. One output HIGH. Guaranteed, but not tested.
AC Electrical Characteristics
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TA = + 25° C |
TA = − 40° C to + 85° C |
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Symbol |
Parameter |
VCC = + |
5V |
VCC = |
4.5V–5.5V |
Units |
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CL |
= 50 pF |
CL = |
50 pF |
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Min |
Typ |
Max |
Min |
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Max |
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tPLH |
Propagation Delay Data to Outputs |
1.0 |
2.3 |
3.6 |
1.0 |
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3.6 |
ns |
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tPHL |
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1.0 |
3.3 |
4.1 |
1.0 |
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4.1 |
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tPZH |
Output Enable Time |
1.5 |
3.7 |
6.0 |
1.5 |
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6.0 |
ns |
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tPZL |
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1.5 |
4.3 |
6.5 |
1.5 |
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6.5 |
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tPHZ |
Output Disable Time |
1.0 |
3.5 |
6.0 |
1.0 |
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6.0 |
ns |
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tPLZ |
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1.0 |
3.7 |
5.6 |
1.0 |
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5.6 |
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Extended AC Electrical Characteristics
(SOIC Package) |
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− 40° C to + 85° C |
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TA = − 40° C to + 85° C |
TA = − 40° C to + 85° C |
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VCC = |
4.5V–5.5V |
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VCC = |
4.5V–5.5V |
VCC = |
4.5V–5.5V |
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Symbol |
Parameter |
CL = 50 pF |
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CL = |
250 pF |
CL = |
250 pF |
Units |
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8 Outputs Switching |
1 Output Switching |
8 Outputs Switching |
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(Note 8) |
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(Note 9) |
(Note 10) |
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Min |
Typ |
Max |
Min |
Max |
Min |
Max |
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fTOGGLE |
Maximum Toggle Frequency |
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100 |
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MHz |
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tPLH |
Propagation Delay |
1.5 |
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5.0 |
1.5 |
6.0 |
2.5 |
8.5 |
ns |
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tPHL |
Data to Outputs |
1.5 |
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5.5 |
1.5 |
10.0 |
2.5 |
11.0 |
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tPZH |
Output Enable Time |
1.5 |
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6.5 |
2.5 |
7.5 |
2.5 |
9.5 |
ns |
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tPZL |
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1.5 |
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7.0 |
2.5 |
11.0 |
2.5 |
12.5 |
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tPHZ |
Output Disable Time |
1.0 |
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6.0 |
(Note 11) |
(Note 11) |
ns |
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tPLZ |
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1.0 |
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6.0 |
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Note 8: This specification is guaranteed but not tested. The limits apply to propagation delays for all paths described switching in phase (i.e., all LOW-to-HIGH, HIGH-to-LOW, etc.).
Note 9: This specification is guaranteed but not tested. The limits represent propagation delay with 250 pF load capacitors in place of the 50 pF load capacitors in the standard AC load. This specification pertains to single output switching only.
Note 10: This specification is guaranteed but not tested. The limits represent propagation delays for all paths described switching in phase (i.e., all LOW-to-HIGH, HIGH-to-LOW, etc.) with 250 pF load capacitors in place of the 50 pF load capacitors in the standard AC load.
Note 11: The 3-STATE delays are dominated by the RC network (500Ω , 250 pF) on the output and have been excluded from the datasheet.
74ABT2541
3 |
www.fairchildsemi.com |